Populate the gic_kvm_info struct based on support for
FEAT_GCIE_LEGACY. The struct is used by KVM to probe for a compatible
GIC.
Co-authored-by: Timothy Hayes <timothy.hayes@arm.com>
Signed-off-by: Timothy Hayes <timothy.hayes@arm.com>
Signed-off-by: Sascha Bischoff <sascha.bischoff@arm.com>
---
drivers/irqchip/irq-gic-v5.c | 34 +++++++++++++++++++++++++++
include/linux/irqchip/arm-vgic-info.h | 4 ++++
2 files changed, 38 insertions(+)
diff --git a/drivers/irqchip/irq-gic-v5.c b/drivers/irqchip/irq-gic-v5.c
index 28853d51a2ea..6aecd2343fee 100644
--- a/drivers/irqchip/irq-gic-v5.c
+++ b/drivers/irqchip/irq-gic-v5.c
@@ -13,6 +13,7 @@
#include <linux/irqchip.h>
#include <linux/irqchip/arm-gic-v5.h>
+#include <linux/irqchip/arm-vgic-info.h>
#include <asm/cpufeature.h>
#include <asm/exception.h>
@@ -1049,6 +1050,37 @@ static void gicv5_set_cpuif_idbits(void)
}
}
+#ifdef CONFIG_KVM
+static struct gic_kvm_info gic_v5_kvm_info __initdata;
+
+static bool gicv5_cpuif_has_gcie_legacy(void)
+{
+ u64 idr0 = read_sysreg_s(SYS_ICC_IDR0_EL1);
+
+ return !!FIELD_GET(ICC_IDR0_EL1_GCIE_LEGACY, idr0);
+}
+
+static void __init gic_of_setup_kvm_info(struct device_node *node)
+{
+ gic_v5_kvm_info.type = GIC_V5;
+ gic_v5_kvm_info.has_gcie_v3_compat = gicv5_cpuif_has_gcie_legacy();
+
+ /* GIC Virtual CPU interface maintenance interrupt */
+ gic_v5_kvm_info.no_maint_irq_mask = false;
+ gic_v5_kvm_info.maint_irq = irq_of_parse_and_map(node, 0);
+ if (!gic_v5_kvm_info.maint_irq) {
+ pr_warn("cannot find GICv5 virtual CPU interface maintenance interrupt\n");
+ return;
+ }
+
+ vgic_set_kvm_info(&gic_v5_kvm_info);
+}
+#else
+static void __init gic_of_setup_kvm_info(struct device_node *node)
+{
+}
+#endif // CONFIG_KVM
+
static int __init gicv5_of_init(struct device_node *node, struct device_node *parent)
{
int ret = gicv5_irs_of_probe(node);
@@ -1081,6 +1113,8 @@ static int __init gicv5_of_init(struct device_node *node, struct device_node *pa
gicv5_irs_its_probe();
+ gic_of_setup_kvm_info(node);
+
return 0;
out_int:
gicv5_cpu_disable_interrupts();
diff --git a/include/linux/irqchip/arm-vgic-info.h b/include/linux/irqchip/arm-vgic-info.h
index a75b2c7de69d..ca1713fac6e3 100644
--- a/include/linux/irqchip/arm-vgic-info.h
+++ b/include/linux/irqchip/arm-vgic-info.h
@@ -15,6 +15,8 @@ enum gic_type {
GIC_V2,
/* Full GICv3, optionally with v2 compat */
GIC_V3,
+ /* Full GICv5, optionally with v3 compat */
+ GIC_V5,
};
struct gic_kvm_info {
@@ -34,6 +36,8 @@ struct gic_kvm_info {
bool has_v4_1;
/* Deactivation impared, subpar stuff */
bool no_hw_deactivation;
+ /* v3 compat support (GICv5 hosts, only) */
+ bool has_gcie_v3_compat;
};
#ifdef CONFIG_KVM
--
2.34.1
On Fri, Jun 20, 2025 at 04:07:51PM +0000, Sascha Bischoff wrote:
> Populate the gic_kvm_info struct based on support for
> FEAT_GCIE_LEGACY. The struct is used by KVM to probe for a compatible
> GIC.
>
> Co-authored-by: Timothy Hayes <timothy.hayes@arm.com>
> Signed-off-by: Timothy Hayes <timothy.hayes@arm.com>
> Signed-off-by: Sascha Bischoff <sascha.bischoff@arm.com>
> ---
> drivers/irqchip/irq-gic-v5.c | 34 +++++++++++++++++++++++++++
> include/linux/irqchip/arm-vgic-info.h | 4 ++++
> 2 files changed, 38 insertions(+)
>
> diff --git a/drivers/irqchip/irq-gic-v5.c b/drivers/irqchip/irq-gic-v5.c
> index 28853d51a2ea..6aecd2343fee 100644
> --- a/drivers/irqchip/irq-gic-v5.c
> +++ b/drivers/irqchip/irq-gic-v5.c
> @@ -13,6 +13,7 @@
>
> #include <linux/irqchip.h>
> #include <linux/irqchip/arm-gic-v5.h>
> +#include <linux/irqchip/arm-vgic-info.h>
>
> #include <asm/cpufeature.h>
> #include <asm/exception.h>
> @@ -1049,6 +1050,37 @@ static void gicv5_set_cpuif_idbits(void)
> }
> }
>
> +#ifdef CONFIG_KVM
> +static struct gic_kvm_info gic_v5_kvm_info __initdata;
> +
> +static bool gicv5_cpuif_has_gcie_legacy(void)
__init ?
> +{
> + u64 idr0 = read_sysreg_s(SYS_ICC_IDR0_EL1);
> +
> + return !!FIELD_GET(ICC_IDR0_EL1_GCIE_LEGACY, idr0);
> +}
> +
> +static void __init gic_of_setup_kvm_info(struct device_node *node)
> +{
> + gic_v5_kvm_info.type = GIC_V5;
> + gic_v5_kvm_info.has_gcie_v3_compat = gicv5_cpuif_has_gcie_legacy();
> +
> + /* GIC Virtual CPU interface maintenance interrupt */
> + gic_v5_kvm_info.no_maint_irq_mask = false;
> + gic_v5_kvm_info.maint_irq = irq_of_parse_and_map(node, 0);
> + if (!gic_v5_kvm_info.maint_irq) {
> + pr_warn("cannot find GICv5 virtual CPU interface maintenance interrupt\n");
> + return;
> + }
> +
> + vgic_set_kvm_info(&gic_v5_kvm_info);
> +}
> +#else
> +static void __init gic_of_setup_kvm_info(struct device_node *node)
static inline
Thanks,
Lorenzo
> +{
> +}
> +#endif // CONFIG_KVM
> +
> static int __init gicv5_of_init(struct device_node *node, struct device_node *parent)
> {
> int ret = gicv5_irs_of_probe(node);
> @@ -1081,6 +1113,8 @@ static int __init gicv5_of_init(struct device_node *node, struct device_node *pa
>
> gicv5_irs_its_probe();
>
> + gic_of_setup_kvm_info(node);
> +
> return 0;
> out_int:
> gicv5_cpu_disable_interrupts();
> diff --git a/include/linux/irqchip/arm-vgic-info.h b/include/linux/irqchip/arm-vgic-info.h
> index a75b2c7de69d..ca1713fac6e3 100644
> --- a/include/linux/irqchip/arm-vgic-info.h
> +++ b/include/linux/irqchip/arm-vgic-info.h
> @@ -15,6 +15,8 @@ enum gic_type {
> GIC_V2,
> /* Full GICv3, optionally with v2 compat */
> GIC_V3,
> + /* Full GICv5, optionally with v3 compat */
> + GIC_V5,
> };
>
> struct gic_kvm_info {
> @@ -34,6 +36,8 @@ struct gic_kvm_info {
> bool has_v4_1;
> /* Deactivation impared, subpar stuff */
> bool no_hw_deactivation;
> + /* v3 compat support (GICv5 hosts, only) */
> + bool has_gcie_v3_compat;
> };
>
> #ifdef CONFIG_KVM
> --
> 2.34.1
On Mon, 2025-06-23 at 17:14 +0200, Lorenzo Pieralisi wrote: > On Fri, Jun 20, 2025 at 04:07:51PM +0000, Sascha Bischoff wrote: > > > > +#ifdef CONFIG_KVM > > +static struct gic_kvm_info gic_v5_kvm_info __initdata; > > + > > +static bool gicv5_cpuif_has_gcie_legacy(void) > > __init ? Done. > > > > +} > > +#else > > +static void __init gic_of_setup_kvm_info(struct device_node *node) > > static inline Done. Thanks, Sascha
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