Reset the bit 12 in PHY's LRE Control register upon initialization.
According to the datasheet, this bit must be written to zero after
every device reset.
Signed-off-by: Kamil Horák (2N) <kamilh@axis.com>
---
drivers/net/phy/broadcom.c | 22 ++++++++++++++++++++--
include/linux/brcmphy.h | 1 +
2 files changed, 21 insertions(+), 2 deletions(-)
diff --git a/drivers/net/phy/broadcom.c b/drivers/net/phy/broadcom.c
index 9b1de54fd483..75dbb88bec5a 100644
--- a/drivers/net/phy/broadcom.c
+++ b/drivers/net/phy/broadcom.c
@@ -420,11 +420,29 @@ static int bcm54811_config_init(struct phy_device *phydev)
return err;
}
+ err = bcm5481x_set_brrmode(phydev, priv->brr_mode);
+ if (err < 0)
+ return err;
+
/* With BCM54811, BroadR-Reach implies no autoneg */
- if (priv->brr_mode)
+ if (priv->brr_mode) {
phydev->autoneg = 0;
+ /* Disable Long Distance Signaling, the BRR mode autoneg */
+ err = phy_modify(phydev, MII_BCM54XX_LRECR, LRECR_LDSEN, 0);
+ if (err < 0)
+ return err;
+ }
- return bcm5481x_set_brrmode(phydev, priv->brr_mode);
+ if (!phy_interface_is_rgmii(phydev) ||
+ phydev->interface == PHY_INTERFACE_MODE_MII) {
+ /* Misc Control: GMII/MII Mode (not RGMII) */
+ err = bcm54xx_auxctl_write(phydev,
+ MII_BCM54XX_AUXCTL_SHDWSEL_MISC,
+ MII_BCM54XX_AUXCTL_SHDWSEL_MISC_RGMII_SKEW_EN |
+ MII_BCM54XX_AUXCTL_SHDWSEL_MISC_RSVD
+ );
+ }
+ return err;
}
static int bcm54xx_config_init(struct phy_device *phydev)
diff --git a/include/linux/brcmphy.h b/include/linux/brcmphy.h
index 028b3e00378e..350846b010e9 100644
--- a/include/linux/brcmphy.h
+++ b/include/linux/brcmphy.h
@@ -137,6 +137,7 @@
#define MII_BCM54XX_AUXCTL_SHDWSEL_MISC 0x07
#define MII_BCM54XX_AUXCTL_SHDWSEL_MISC_WIRESPEED_EN 0x0010
+#define MII_BCM54XX_AUXCTL_SHDWSEL_MISC_RSVD 0x0060
#define MII_BCM54XX_AUXCTL_SHDWSEL_MISC_RGMII_EN 0x0080
#define MII_BCM54XX_AUXCTL_SHDWSEL_MISC_RGMII_SKEW_EN 0x0100
#define MII_BCM54XX_AUXCTL_MISC_FORCE_AMDIX 0x0200
--
2.39.5