From: Darren Ye <darren.ye@mediatek.com>
This patch adds initial support for the audio AFE(Audio Front End) controller
on the mediatek MT8196 platform.
Signed-off-by: Darren Ye <darren.ye@mediatek.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
---
.../bindings/sound/mediatek,mt8196-afe.yaml | 157 ++++++++++++++++++
1 file changed, 157 insertions(+)
create mode 100644 Documentation/devicetree/bindings/sound/mediatek,mt8196-afe.yaml
diff --git a/Documentation/devicetree/bindings/sound/mediatek,mt8196-afe.yaml b/Documentation/devicetree/bindings/sound/mediatek,mt8196-afe.yaml
new file mode 100644
index 000000000000..fe147eddf5e7
--- /dev/null
+++ b/Documentation/devicetree/bindings/sound/mediatek,mt8196-afe.yaml
@@ -0,0 +1,157 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/sound/mediatek,mt8196-afe.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: MediaTek Audio Front End PCM controller for MT8196
+
+maintainers:
+ - Darren Ye <darren.ye@mediatek.com>
+
+properties:
+ compatible:
+ const: mediatek,mt8196-afe
+
+ reg:
+ maxItems: 1
+
+ interrupts:
+ maxItems: 1
+
+ memory-region:
+ maxItems: 1
+
+ mediatek,vlpcksys:
+ $ref: /schemas/types.yaml#/definitions/phandle
+ description: To set up the apll12 tuner
+
+ power-domains:
+ maxItems: 1
+
+ clocks:
+ items:
+ - description: mux for audio intbus
+ - description: mux for audio engen1
+ - description: mux for audio engen2
+ - description: mux for audio h
+ - description: vlp 26m clock
+ - description: audio apll1 clock
+ - description: audio apll2 clock
+ - description: audio apll1 divide4
+ - description: audio apll2 divide4
+ - description: audio apll12 divide for i2sin0
+ - description: audio apll12 divide for i2sin1
+ - description: audio apll12 divide for fmi2s
+ - description: audio apll12 divide for tdmout mck
+ - description: audio apll12 divide for tdmout bck
+ - description: mux for audio apll1
+ - description: mux for audio apll2
+ - description: mux for i2sin0 mck
+ - description: mux for i2sin1 mck
+ - description: mux for fmi2s mck
+ - description: mux for tdmout mck
+ - description: mux for adsp clock
+ - description: 26m clock
+
+ clock-names:
+ items:
+ - const: top_aud_intbus
+ - const: top_aud_eng1
+ - const: top_aud_eng2
+ - const: top_aud_h
+ - const: vlp_clk26m
+ - const: apll1
+ - const: apll2
+ - const: apll1_d4
+ - const: apll2_d4
+ - const: apll12_div_i2sin0
+ - const: apll12_div_i2sin1
+ - const: apll12_div_fmi2s
+ - const: apll12_div_tdmout_m
+ - const: apll12_div_tdmout_b
+ - const: top_apll1
+ - const: top_apll2
+ - const: top_i2sin0
+ - const: top_i2sin1
+ - const: top_fmi2s
+ - const: top_tdmout
+ - const: top_adsp
+ - const: clk26m
+
+required:
+ - compatible
+ - reg
+ - interrupts
+ - memory-region
+ - mediatek,vlpcksys
+ - power-domains
+ - clocks
+ - clock-names
+
+additionalProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+ #include <dt-bindings/interrupt-controller/irq.h>
+
+ soc {
+ #address-cells = <2>;
+ #size-cells = <2>;
+
+ afe@1a110000 {
+ compatible = "mediatek,mt8196-afe";
+ reg = <0 0x1a110000 0 0x9000>;
+ interrupts = <GIC_SPI 351 IRQ_TYPE_LEVEL_HIGH 0>;
+ memory-region = <&afe_dma_mem_reserved>;
+ mediatek,vlpcksys = <&vlp_cksys_clk>;
+ power-domains = <&scpsys 14>; //MT8196_POWER_DOMAIN_AUDIO
+ clocks = <&vlp_cksys_clk 40>, //CLK_VLP_CK_AUD_INTBUS_SEL
+ <&vlp_cksys_clk 38>, //CLK_VLP_CK_AUD_ENGEN1_SEL
+ <&vlp_cksys_clk 39>, //CLK_VLP_CK_AUD_ENGEN2_SEL
+ <&vlp_cksys_clk 37>, //CLK_VLP_CK_AUDIO_H_SEL
+ <&vlp_cksys_clk 45>, //CLK_VLP_CK_CLKSQ
+ <&cksys_clk 129>, //CLK_CK_APLL1
+ <&cksys_clk 132>, //CLK_CK_APLL2
+ <&cksys_clk 130>, //CLK_CK_APLL1_D4
+ <&cksys_clk 133>, //CLK_CK_APLL2_D4
+ <&cksys_clk 80>, //CLK_CK_APLL12_CK_DIV_I2SIN0
+ <&cksys_clk 81>, //CLK_CK_APLL12_CK_DIV_I2SIN1
+ <&cksys_clk 92>, //CLK_CK_APLL12_CK_DIV_FMI2S
+ <&cksys_clk 93>, //CLK_CK_APLL12_CK_DIV_TDMOUT_M
+ <&cksys_clk 94>, //CLK_CK_APLL12_CK_DIV_TDMOUT_B
+ <&cksys_clk 43>, //CLK_CK_AUD_1_SEL
+ <&cksys_clk 44>, //CLK_CK_AUD_2_SEL
+ <&cksys_clk 66>, //CLK_CK_APLL_I2SIN0_MCK_SEL
+ <&cksys_clk 67>, //CLK_CK_APLL_I2SIN1_MCK_SEL
+ <&cksys_clk 78>, //CLK_CK_APLL_FMI2S_MCK_SEL
+ <&cksys_clk 79>, //CLK_CK_APLL_TDMOUT_MCK_SEL
+ <&cksys_clk 45>, //CLK_CK_ADSP_SEL
+ <&cksys_clk 140>; //CLK_CK_TCK_26M_MX9
+ clock-names = "top_aud_intbus",
+ "top_aud_eng1",
+ "top_aud_eng2",
+ "top_aud_h",
+ "vlp_clk26m",
+ "apll1",
+ "apll2",
+ "apll1_d4",
+ "apll2_d4",
+ "apll12_div_i2sin0",
+ "apll12_div_i2sin1",
+ "apll12_div_fmi2s",
+ "apll12_div_tdmout_m",
+ "apll12_div_tdmout_b",
+ "top_apll1",
+ "top_apll2",
+ "top_i2sin0",
+ "top_i2sin1",
+ "top_fmi2s",
+ "top_tdmout",
+ "top_adsp",
+ "clk26m";
+ };
+ };
+
+...
--
2.45.2On 20/06/2025 11:40, Darren.Ye wrote: > From: Darren Ye <darren.ye@mediatek.com> > > This patch adds initial support for the audio AFE(Audio Front End) controller Why this was changed to undesired 'This patch' (see submitting patches)? I think you are circling back to previous versions, reintroducing issues fixed in between. > on the mediatek MT8196 platform. > > Signed-off-by: Darren Ye <darren.ye@mediatek.com> > Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Subject: I asked to drop document, because the rest was correct and you totally rewritten it to unnecessary too long subject. Well, at least the rest you implemented, but I just don't get why, when asked to change something you change several things to less desired style. Best regards, Krzysztof
On Sun, 2025-06-22 at 11:43 +0200, Krzysztof Kozlowski wrote: > External email : Please do not click links or open attachments until > you have verified the sender or the content. > > > On 20/06/2025 11:40, Darren.Ye wrote: > > From: Darren Ye <darren.ye@mediatek.com> > > > > This patch adds initial support for the audio AFE(Audio Front End) > > controller > > Why this was changed to undesired 'This patch' (see submitting > patches)? > I think you are circling back to previous versions, reintroducing > issues > fixed in between. Thanks for you feedback. Just to confirm, for the next version, should I revert the subject/description back to previous version and only drop the document part, whitout making other changes? Please see the following change: ASoC: dt-bindings: mediatek,mt8196-afe: add audio AFE Add mt8196 audio AFE. Please let me know if this is correct. Best regards, Darren > > > on the mediatek MT8196 platform. > > > > Signed-off-by: Darren Ye <darren.ye@mediatek.com> > > Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> > > > Subject: I asked to drop document, because the rest was correct and > you > totally rewritten it to unnecessary too long subject. > > Well, at least the rest you implemented, but I just don't get why, > when > asked to change something you change several things to less desired > style. > > Best regards, > Krzysztof
On 23/06/2025 08:52, Darren Ye (叶飞) wrote: >>> This patch adds initial support for the audio AFE(Audio Front End) >>> controller >> >> Why this was changed to undesired 'This patch' (see submitting >> patches)? >> I think you are circling back to previous versions, reintroducing >> issues >> fixed in between. > > Thanks for you feedback. Just to confirm, for the next version, should > I revert the subject/description back to previous version and only drop > the document part, whitout making other changes? > > > Please see the following change: > > ASoC: dt-bindings: mediatek,mt8196-afe: add audio AFE Yes > > Add mt8196 audio AFE. This can be longer, but just read submitting patches regarding preferred style. Changing to less preferred makes me thinking you did not read that document. Anyway, don't send new version just for that. Best regards, Krzysztof
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