This patch series adds cache configuration for Microchip SAMA7D and SAMA7G MPUs.
The cache configuration is described in datasheet chapter 15.2.

Changelog:

v2 -> v3:
- Remove the l1-cache node
- Move the L1 cache properties in the cpu node
- Align with device node requirements for cpu: 
  https://devicetree-specification.readthedocs.io/en/latest/chapter3-devicenodes.html#internal-l1-cache-properties

v1 -> v2:
- Remove the cache-unified property from l1-cache node

Mihai Sain (2):
  ARM: dts: microchip: sama7d65: Add cache configuration for cpu node
  ARM: dts: microchip: sama7g5: Add cache configuration for cpu node

 arch/arm/boot/dts/microchip/sama7d65.dtsi | 10 ++++++++++
 arch/arm/boot/dts/microchip/sama7g5.dtsi  | 10 ++++++++++
 2 files changed, 20 insertions(+)


base-commit: fb4d33ab452ea254e2c319bac5703d1b56d895bf
-- 
2.50.0

On 19.06.2025 10:06, Mihai Sain wrote:
> Mihai Sain (2):
>   ARM: dts: microchip: sama7d65: Add cache configuration for cpu node
>   ARM: dts: microchip: sama7g5: Add cache configuration for cpu node

Applied to at91-dt, thanks!