expose FEAT_MTE_TAGGED_FAR feature to guest.
Signed-off-by: Yeoreum Yun <yeoreum.yun@arm.com>
---
arch/arm64/kvm/sys_regs.c | 14 ++++++++++----
1 file changed, 10 insertions(+), 4 deletions(-)
diff --git a/arch/arm64/kvm/sys_regs.c b/arch/arm64/kvm/sys_regs.c
index 76c2f0da821f..c8c92cb9da01 100644
--- a/arch/arm64/kvm/sys_regs.c
+++ b/arch/arm64/kvm/sys_regs.c
@@ -1586,7 +1586,7 @@ static u64 __kvm_read_sanitised_id_reg(const struct kvm_vcpu *vcpu,
const struct sys_reg_desc *r)
{
u32 id = reg_to_encoding(r);
- u64 val;
+ u64 val, mask;
if (sysreg_visible_as_raz(vcpu, r))
return 0;
@@ -1617,8 +1617,12 @@ static u64 __kvm_read_sanitised_id_reg(const struct kvm_vcpu *vcpu,
val &= ~ARM64_FEATURE_MASK(ID_AA64PFR1_EL1_MPAM_frac);
break;
case SYS_ID_AA64PFR2_EL1:
- /* We only expose FPMR */
- val &= ID_AA64PFR2_EL1_FPMR;
+ mask = ID_AA64PFR2_EL1_FPMR;
+
+ if (kvm_has_mte(vcpu->kvm))
+ mask |= ID_AA64PFR2_EL1_MTEFAR;
+
+ val &= mask;
break;
case SYS_ID_AA64ISAR1_EL1:
if (!vcpu_has_ptrauth(vcpu))
@@ -2878,7 +2882,9 @@ static const struct sys_reg_desc sys_reg_descs[] = {
ID_AA64PFR1_EL1_MPAM_frac |
ID_AA64PFR1_EL1_RAS_frac |
ID_AA64PFR1_EL1_MTE)),
- ID_WRITABLE(ID_AA64PFR2_EL1, ID_AA64PFR2_EL1_FPMR),
+ ID_WRITABLE(ID_AA64PFR2_EL1,
+ ID_AA64PFR2_EL1_FPMR |
+ ID_AA64PFR2_EL1_MTEFAR),
ID_UNALLOCATED(4,3),
ID_WRITABLE(ID_AA64ZFR0_EL1, ~ID_AA64ZFR0_EL1_RES0),
ID_HIDDEN(ID_AA64SMFR0_EL1),
--
LEVI:{C3F47F37-75D8-414A-A8BA-3980EC8A46D7}
In general, please use a patch title format that matches the one used
for the subsystem. For KVM, that'd be "KVM: arm64: Expose ..."/
On Wed, 18 Jun 2025 09:45:06 +0100,
Yeoreum Yun <yeoreum.yun@arm.com> wrote:
>
> expose FEAT_MTE_TAGGED_FAR feature to guest.
>
> Signed-off-by: Yeoreum Yun <yeoreum.yun@arm.com>
> ---
> arch/arm64/kvm/sys_regs.c | 14 ++++++++++----
> 1 file changed, 10 insertions(+), 4 deletions(-)
>
> diff --git a/arch/arm64/kvm/sys_regs.c b/arch/arm64/kvm/sys_regs.c
> index 76c2f0da821f..c8c92cb9da01 100644
> --- a/arch/arm64/kvm/sys_regs.c
> +++ b/arch/arm64/kvm/sys_regs.c
> @@ -1586,7 +1586,7 @@ static u64 __kvm_read_sanitised_id_reg(const struct kvm_vcpu *vcpu,
> const struct sys_reg_desc *r)
> {
> u32 id = reg_to_encoding(r);
> - u64 val;
> + u64 val, mask;
>
> if (sysreg_visible_as_raz(vcpu, r))
> return 0;
> @@ -1617,8 +1617,12 @@ static u64 __kvm_read_sanitised_id_reg(const struct kvm_vcpu *vcpu,
> val &= ~ARM64_FEATURE_MASK(ID_AA64PFR1_EL1_MPAM_frac);
> break;
> case SYS_ID_AA64PFR2_EL1:
> - /* We only expose FPMR */
> - val &= ID_AA64PFR2_EL1_FPMR;
> + mask = ID_AA64PFR2_EL1_FPMR;
> +
> + if (kvm_has_mte(vcpu->kvm))
> + mask |= ID_AA64PFR2_EL1_MTEFAR;
> +
> + val &= mask;
I don't think there is a need for an extra variable, and you could
follow the pattern established in this file by writing this as:
val &= (ID_AA64PFR2_EL1_FPMR |
(kvm_has_mte(vcpu->kvm) ? ID_AA64PFR2_EL1_MTEFAR : 0));
Not a big deal though.
Thanks,
M.
--
Without deviation from the norm, progress is not possible.
Hi Marc, On Wed, Jun 18, 2025 at 05:43:07PM +0100, Marc Zyngier wrote: > In general, please use a patch title format that matches the one used > for the subsystem. For KVM, that'd be "KVM: arm64: Expose ..."/ [...] > > case SYS_ID_AA64PFR2_EL1: > > - /* We only expose FPMR */ > > - val &= ID_AA64PFR2_EL1_FPMR; > > + mask = ID_AA64PFR2_EL1_FPMR; > > + > > + if (kvm_has_mte(vcpu->kvm)) > > + mask |= ID_AA64PFR2_EL1_MTEFAR; > > + > > + val &= mask; > > I don't think there is a need for an extra variable, and you could > follow the pattern established in this file by writing this as: > > val &= (ID_AA64PFR2_EL1_FPMR | > (kvm_has_mte(vcpu->kvm) ? ID_AA64PFR2_EL1_MTEFAR : 0)); > > Not a big deal though. I can make the changes locally. Are you ok with the patch otherwise? -- Catalin
On Tue, 24 Jun 2025 17:33:52 +0100, Catalin Marinas <catalin.marinas@arm.com> wrote: > > Hi Marc, > > On Wed, Jun 18, 2025 at 05:43:07PM +0100, Marc Zyngier wrote: > > In general, please use a patch title format that matches the one used > > for the subsystem. For KVM, that'd be "KVM: arm64: Expose ..."/ > [...] > > > case SYS_ID_AA64PFR2_EL1: > > > - /* We only expose FPMR */ > > > - val &= ID_AA64PFR2_EL1_FPMR; > > > + mask = ID_AA64PFR2_EL1_FPMR; > > > + > > > + if (kvm_has_mte(vcpu->kvm)) > > > + mask |= ID_AA64PFR2_EL1_MTEFAR; > > > + > > > + val &= mask; > > > > I don't think there is a need for an extra variable, and you could > > follow the pattern established in this file by writing this as: > > > > val &= (ID_AA64PFR2_EL1_FPMR | > > (kvm_has_mte(vcpu->kvm) ? ID_AA64PFR2_EL1_MTEFAR : 0)); > > > > Not a big deal though. > > I can make the changes locally. Are you ok with the patch otherwise? Yup, that'd fine by me. With this fixed: Acked-by: Marc Zyngier <maz@kernel.org> M. -- Jazz isn't dead. It just smells funny.
Hi Marc,
> In general, please use a patch title format that matches the one used
> for the subsystem. For KVM, that'd be "KVM: arm64: Expose ..."/
>
> On Wed, 18 Jun 2025 09:45:06 +0100,
> Yeoreum Yun <yeoreum.yun@arm.com> wrote:
> >
> > expose FEAT_MTE_TAGGED_FAR feature to guest.
> >
> > Signed-off-by: Yeoreum Yun <yeoreum.yun@arm.com>
> > ---
> > arch/arm64/kvm/sys_regs.c | 14 ++++++++++----
> > 1 file changed, 10 insertions(+), 4 deletions(-)
> >
> > diff --git a/arch/arm64/kvm/sys_regs.c b/arch/arm64/kvm/sys_regs.c
> > index 76c2f0da821f..c8c92cb9da01 100644
> > --- a/arch/arm64/kvm/sys_regs.c
> > +++ b/arch/arm64/kvm/sys_regs.c
> > @@ -1586,7 +1586,7 @@ static u64 __kvm_read_sanitised_id_reg(const struct kvm_vcpu *vcpu,
> > const struct sys_reg_desc *r)
> > {
> > u32 id = reg_to_encoding(r);
> > - u64 val;
> > + u64 val, mask;
> >
> > if (sysreg_visible_as_raz(vcpu, r))
> > return 0;
> > @@ -1617,8 +1617,12 @@ static u64 __kvm_read_sanitised_id_reg(const struct kvm_vcpu *vcpu,
> > val &= ~ARM64_FEATURE_MASK(ID_AA64PFR1_EL1_MPAM_frac);
> > break;
> > case SYS_ID_AA64PFR2_EL1:
> > - /* We only expose FPMR */
> > - val &= ID_AA64PFR2_EL1_FPMR;
> > + mask = ID_AA64PFR2_EL1_FPMR;
> > +
> > + if (kvm_has_mte(vcpu->kvm))
> > + mask |= ID_AA64PFR2_EL1_MTEFAR;
> > +
> > + val &= mask;
>
> I don't think there is a need for an extra variable, and you could
> follow the pattern established in this file by writing this as:
>
> val &= (ID_AA64PFR2_EL1_FPMR |
> (kvm_has_mte(vcpu->kvm) ? ID_AA64PFR2_EL1_MTEFAR : 0));
>
> Not a big deal though.
Thanks for your suggestion. I'll apply this with STORE_ONLY patch too
in end of this day.
--
Sincerely,
Yeoreum Yun
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