[v1] LoongArch: KVM: INTC: Add IOCSR MISC register emulation

[PATCH 0/2] LoongArch: KVM: INTC: Add IOCSR MISC register emulation

Bibo Mao posted 2 patches 7 months, 3 weeks ago

Diff against v2
Download series mbox

There is a newer version of this series

arch/loongarch/include/asm/kvm_eiointc.h |   4 +
arch/loongarch/include/asm/loongarch.h   |   1 +
arch/loongarch/kvm/intc/eiointc.c        | 144 ++++++++++++++++++++++-
3 files changed, 144 insertions(+), 5 deletions(-)

Expand all Fold all

[PATCH 0/2] LoongArch: KVM: INTC: Add IOCSR MISC register emulation

Posted by Bibo Mao 7 months, 3 weeks ago

IOCSR MISC register 0x420 controlls some features of eiointc, such as
BIT 48 enables eiointc and BIT 49 set interrupt encoding mode. 

When kernel irqchip is set, IOCSR MISC register should be emulated in
kernel also. Here add IOCSR MISC register emulation in eiointc driver.

Bibo Mao (2):
  LoongArch: KVM: INTC: Remove local variable device1
  LoongArch: KVM: INTC: Add IOCSR MISC register emulation

 arch/loongarch/include/asm/kvm_eiointc.h |   4 +
 arch/loongarch/include/asm/loongarch.h   |   1 +
 arch/loongarch/kvm/intc/eiointc.c        | 144 ++++++++++++++++++++++-
 3 files changed, 144 insertions(+), 5 deletions(-)


base-commit: e04c78d86a9699d136910cfc0bdcf01087e3267e
-- 
2.39.3