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[PATCH v4 1/2] dt-bindings: phy: Add Sophgo CV1800 USB phy

Inochi Amaoto posted 2 patches 8 months ago
There is a newer version of this series
[PATCH v4 1/2] dt-bindings: phy: Add Sophgo CV1800 USB phy
Posted by Inochi Amaoto 8 months ago 
The USB phy of Sophgo CV18XX series SoC needs to sense a pin called
"VBUS_DET" to get the right operation mode. If this pin is not
connected, it only supports setting the mode manually.

Add USB phy bindings for Sophgo CV18XX/SG200X series SoC.

Signed-off-by: Inochi Amaoto <inochiama@gmail.com>
---
 .../bindings/phy/sophgo,cv1800b-usb2-phy.yaml | 54 +++++++++++++++++++
 1 file changed, 54 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/phy/sophgo,cv1800b-usb2-phy.yaml

diff --git a/Documentation/devicetree/bindings/phy/sophgo,cv1800b-usb2-phy.yaml b/Documentation/devicetree/bindings/phy/sophgo,cv1800b-usb2-phy.yaml
new file mode 100644
index 000000000000..2ff8f85d0282
--- /dev/null
+++ b/Documentation/devicetree/bindings/phy/sophgo,cv1800b-usb2-phy.yaml
@@ -0,0 +1,54 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/phy/sophgo,cv1800b-usb2-phy.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Sophgo CV18XX/SG200X USB 2.0 PHY
+
+maintainers:
+  - Inochi Amaoto <inochiama@gmail.com>
+
+properties:
+  compatible:
+    const: sophgo,cv1800b-usb2-phy
+
+  reg:
+    maxItems: 1
+
+  "#phy-cells":
+    const: 0
+
+  clocks:
+    items:
+      - description: PHY app clock
+      - description: PHY stb clock
+      - description: PHY lpm clock
+
+  clock-names:
+    items:
+      - const: app
+      - const: stb
+      - const: lpm
+
+  resets:
+    maxItems: 1
+
+required:
+  - compatible
+  - "#phy-cells"
+  - clocks
+  - clock-names
+
+additionalProperties: false
+
+examples:
+  - |
+    phy@48 {
+      compatible = "sophgo,cv1800b-usb2-phy";
+      reg = <0x48 0x4>;
+      #phy-cells = <0>;
+      clocks = <&clk 93>, <&clk 94>, <&clk 95>;
+      clock-names = "app", "stb", "lpm";
+      resets = <&rst 58>;
+    };
-- 
2.49.0
Re: [PATCH v4 1/2] dt-bindings: phy: Add Sophgo CV1800 USB phy
Posted by Conor Dooley 8 months ago 
On Wed, Jun 11, 2025 at 04:18:02PM +0800, Inochi Amaoto wrote:
> The USB phy of Sophgo CV18XX series SoC needs to sense a pin called
> "VBUS_DET" to get the right operation mode. If this pin is not
> connected, it only supports setting the mode manually.
> 
> Add USB phy bindings for Sophgo CV18XX/SG200X series SoC.
> 
> Signed-off-by: Inochi Amaoto <inochiama@gmail.com>

I'm having a bit of trouble finding the v3 etc, could you provide a
link?
I think what is here is sane, but I want to make sure that review
comments on previous versions have been addressed. "dfn:" searches for
both driver and binding filenames turned up nothing.

> ---
>  .../bindings/phy/sophgo,cv1800b-usb2-phy.yaml | 54 +++++++++++++++++++
>  1 file changed, 54 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/phy/sophgo,cv1800b-usb2-phy.yaml
> 
> diff --git a/Documentation/devicetree/bindings/phy/sophgo,cv1800b-usb2-phy.yaml b/Documentation/devicetree/bindings/phy/sophgo,cv1800b-usb2-phy.yaml
> new file mode 100644
> index 000000000000..2ff8f85d0282
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/phy/sophgo,cv1800b-usb2-phy.yaml
> @@ -0,0 +1,54 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/phy/sophgo,cv1800b-usb2-phy.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Sophgo CV18XX/SG200X USB 2.0 PHY
> +
> +maintainers:
> +  - Inochi Amaoto <inochiama@gmail.com>
> +
> +properties:
> +  compatible:
> +    const: sophgo,cv1800b-usb2-phy
> +
> +  reg:
> +    maxItems: 1
> +
> +  "#phy-cells":
> +    const: 0
> +
> +  clocks:
> +    items:
> +      - description: PHY app clock
> +      - description: PHY stb clock
> +      - description: PHY lpm clock
> +
> +  clock-names:
> +    items:
> +      - const: app
> +      - const: stb
> +      - const: lpm
> +
> +  resets:
> +    maxItems: 1
> +
> +required:
> +  - compatible
> +  - "#phy-cells"
> +  - clocks
> +  - clock-names
> +
> +additionalProperties: false
> +
> +examples:
> +  - |
> +    phy@48 {
> +      compatible = "sophgo,cv1800b-usb2-phy";
> +      reg = <0x48 0x4>;
> +      #phy-cells = <0>;
> +      clocks = <&clk 93>, <&clk 94>, <&clk 95>;
> +      clock-names = "app", "stb", "lpm";
> +      resets = <&rst 58>;
> +    };
> -- 
> 2.49.0
>
Re: [PATCH v4 1/2] dt-bindings: phy: Add Sophgo CV1800 USB phy
Posted by Inochi Amaoto 8 months ago 
On Thu, Jun 12, 2025 at 05:07:37PM +0100, Conor Dooley wrote:
> On Wed, Jun 11, 2025 at 04:18:02PM +0800, Inochi Amaoto wrote:
> > The USB phy of Sophgo CV18XX series SoC needs to sense a pin called
> > "VBUS_DET" to get the right operation mode. If this pin is not
> > connected, it only supports setting the mode manually.
> > 
> > Add USB phy bindings for Sophgo CV18XX/SG200X series SoC.
> > 
> > Signed-off-by: Inochi Amaoto <inochiama@gmail.com>
> 
> I'm having a bit of trouble finding the v3 etc, could you provide a
> link?
> I think what is here is sane, but I want to make sure that review
> comments on previous versions have been addressed. "dfn:" searches for
> both driver and binding filenames turned up nothing.
> 

The v3 is
https://lore.kernel.org/all/IA1PR20MB4953C1876484E149AA390DD5BB1D2@IA1PR20MB4953.namprd20.prod.outlook.com/
It is a long time ago when sending these patch.

Regards,
Inochi
Re: [PATCH v4 1/2] dt-bindings: phy: Add Sophgo CV1800 USB phy
Posted by Conor Dooley 8 months ago 
On Fri, Jun 13, 2025 at 06:02:27AM +0800, Inochi Amaoto wrote:
> On Thu, Jun 12, 2025 at 05:07:37PM +0100, Conor Dooley wrote:
> > On Wed, Jun 11, 2025 at 04:18:02PM +0800, Inochi Amaoto wrote:
> > > The USB phy of Sophgo CV18XX series SoC needs to sense a pin called
> > > "VBUS_DET" to get the right operation mode. If this pin is not
> > > connected, it only supports setting the mode manually.
> > > 
> > > Add USB phy bindings for Sophgo CV18XX/SG200X series SoC.
> > > 
> > > Signed-off-by: Inochi Amaoto <inochiama@gmail.com>
> > 
> > I'm having a bit of trouble finding the v3 etc, could you provide a
> > link?
> > I think what is here is sane, but I want to make sure that review
> > comments on previous versions have been addressed. "dfn:" searches for
> > both driver and binding filenames turned up nothing.
> > 
> 
> The v3 is
> https://lore.kernel.org/all/IA1PR20MB4953C1876484E149AA390DD5BB1D2@IA1PR20MB4953.namprd20.prod.outlook.com/
> It is a long time ago when sending these patch.

Thanks. I think this patch looks okay, but probably worth Rob or
Krzysztof taking a look, even if you seem to have removed the props that
were objected to.
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Re: [PATCH v4 1/2] dt-bindings: phy: Add Sophgo CV1800 USB phy
Posted by Inochi Amaoto 7 months, 4 weeks ago 
On Fri, Jun 13, 2025 at 03:29:44PM +0100, Conor Dooley wrote:
> On Fri, Jun 13, 2025 at 06:02:27AM +0800, Inochi Amaoto wrote:
> > On Thu, Jun 12, 2025 at 05:07:37PM +0100, Conor Dooley wrote:
> > > On Wed, Jun 11, 2025 at 04:18:02PM +0800, Inochi Amaoto wrote:
> > > > The USB phy of Sophgo CV18XX series SoC needs to sense a pin called
> > > > "VBUS_DET" to get the right operation mode. If this pin is not
> > > > connected, it only supports setting the mode manually.
> > > > 
> > > > Add USB phy bindings for Sophgo CV18XX/SG200X series SoC.
> > > > 
> > > > Signed-off-by: Inochi Amaoto <inochiama@gmail.com>
> > > 
> > > I'm having a bit of trouble finding the v3 etc, could you provide a
> > > link?
> > > I think what is here is sane, but I want to make sure that review
> > > comments on previous versions have been addressed. "dfn:" searches for
> > > both driver and binding filenames turned up nothing.
> > > 
> > 
> > The v3 is
> > https://lore.kernel.org/all/IA1PR20MB4953C1876484E149AA390DD5BB1D2@IA1PR20MB4953.namprd20.prod.outlook.com/
> > It is a long time ago when sending these patch.
> 
> Thanks. I think this patch looks okay, but probably worth Rob or
> Krzysztof taking a look, even if you seem to have removed the props that
> were objected to.
> Acked-by: Conor Dooley <conor.dooley@microchip.com>

Thanks for your tag. And I will wait to see if there is something to
discuss.

Regards,
Inochi

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