.../arch/loongarch/irq-chip-model.rst | 38 ++ .../zh_CN/arch/loongarch/irq-chip-model.rst | 37 ++ arch/loongarch/include/asm/cpu-features.h | 1 + arch/loongarch/include/asm/cpu.h | 2 + arch/loongarch/include/asm/loongarch.h | 6 + arch/loongarch/kernel/cpu-probe.c | 2 + drivers/irqchip/Makefile | 2 +- drivers/irqchip/irq-loongarch-avec.c | 25 +- drivers/irqchip/irq-loongarch-ir.c | 562 ++++++++++++++++++ drivers/irqchip/irq-loongson.h | 12 + include/linux/cpuhotplug.h | 1 + 11 files changed, 674 insertions(+), 14 deletions(-) create mode 100644 drivers/irqchip/irq-loongarch-ir.c
From: Super User <root@localhost.localdomain> This series of patches introduces support for interrupt-redirect controllers, and this hardware feature will be supported on 3C6000 for the first time change log: v0->v1: 1.Rename the model names in the document. 2.Adjust the code format. 3.Remove architecture - specific prefixes. 4.Refactor the initialization logic, and IR driver no longer set AVEC_ENABLE. 5.Enhance compatibility under certain configurations. v1->v2: 1.Fixed an erroneous enabling issue. v2->v3 1.Replace smp_call with address mapping to access registers 2.Fix some code style issues v3->v4 1.Provide reasonable comments on the modifications made to IRQ_SET_MASK_OK_DONE 2.Replace meaningless empty functions with parent_mask/unmask/ack 3.Added and indeed released resources 4.Added judgment for data structure initialization completion to avoid duplicate creation during cpuhotplug 5.Fixed the code style and some unnecessary troubles Tianyang Zhang (2): Docs/LoongArch: Add Advanced Extended-Redirect IRQ model description irq/irq-loongarch-ir:Add Redirect irqchip support .../arch/loongarch/irq-chip-model.rst | 38 ++ .../zh_CN/arch/loongarch/irq-chip-model.rst | 37 ++ arch/loongarch/include/asm/cpu-features.h | 1 + arch/loongarch/include/asm/cpu.h | 2 + arch/loongarch/include/asm/loongarch.h | 6 + arch/loongarch/kernel/cpu-probe.c | 2 + drivers/irqchip/Makefile | 2 +- drivers/irqchip/irq-loongarch-avec.c | 25 +- drivers/irqchip/irq-loongarch-ir.c | 562 ++++++++++++++++++ drivers/irqchip/irq-loongson.h | 12 + include/linux/cpuhotplug.h | 1 + 11 files changed, 674 insertions(+), 14 deletions(-) create mode 100644 drivers/irqchip/irq-loongarch-ir.c -- 2.41.0
On Tue, Jun 10 2025 at 19:42, Tianyang Zhang wrote:
> From: Super User <root@localhost.localdomain>
That's a valid developer name :)
> This series of patches introduces support for interrupt-redirect
> controllers, and this hardware feature will be supported on 3C6000
> for the first time
>
> change log:
> v3->v4
> 1.Provide reasonable comments on the modifications made to IRQ_SET_MASK_OK_DONE
That's not really what I asked for:
"This change really wants to be seperate with a proper explanation and
not burried inside of this pile of changes."
Emphasis on _seperate_, which translates to:
"Put it into a seperate patch with a proper changelog explaining this
modification and why it is correct."
You still have burried this in the whole pile of unrelated changes.
Thanks,
tglx
Hi, Thomas 在 2025/6/13 下午10:02, Thomas Gleixner 写道: > On Tue, Jun 10 2025 at 19:42, Tianyang Zhang wrote: >> From: Super User <root@localhost.localdomain> > That's a valid developer name :) Sorry , it's a realy stupid fault..... > >> This series of patches introduces support for interrupt-redirect >> controllers, and this hardware feature will be supported on 3C6000 >> for the first time >> >> change log: >> v3->v4 >> 1.Provide reasonable comments on the modifications made to IRQ_SET_MASK_OK_DONE > That's not really what I asked for: > > "This change really wants to be seperate with a proper explanation and > not burried inside of this pile of changes." > > Emphasis on _seperate_, which translates to: > > "Put it into a seperate patch with a proper changelog explaining this > modification and why it is correct." > > You still have burried this in the whole pile of unrelated changes. > > Thanks, > > tglx Okay, I thought it was just a dissatisfaction with the "inclusion" of some changes. I will try to modify it here Tianyang
Hi, Tianyang, Have you received my comments in V3? https://lore.kernel.org/loongarch/20250523101833.17940-1-zhangtianyang@loongson.cn/T/#m2883f379ce7eb663f3f3eb4736bf9b071c7fd8ab Huacai On Tue, Jun 10, 2025 at 7:43 PM Tianyang Zhang <zhangtianyang@loongson.cn> wrote: > > From: Super User <root@localhost.localdomain> > > This series of patches introduces support for interrupt-redirect > controllers, and this hardware feature will be supported on 3C6000 > for the first time > > change log: > v0->v1: > 1.Rename the model names in the document. > 2.Adjust the code format. > 3.Remove architecture - specific prefixes. > 4.Refactor the initialization logic, and IR driver no longer set AVEC_ENABLE. > 5.Enhance compatibility under certain configurations. > > v1->v2: > 1.Fixed an erroneous enabling issue. > > v2->v3 > 1.Replace smp_call with address mapping to access registers > 2.Fix some code style issues > > v3->v4 > 1.Provide reasonable comments on the modifications made to IRQ_SET_MASK_OK_DONE > 2.Replace meaningless empty functions with parent_mask/unmask/ack > 3.Added and indeed released resources > 4.Added judgment for data structure initialization completion to avoid duplicate creation during cpuhotplug > 5.Fixed the code style and some unnecessary troubles > > Tianyang Zhang (2): > Docs/LoongArch: Add Advanced Extended-Redirect IRQ model description > irq/irq-loongarch-ir:Add Redirect irqchip support > > .../arch/loongarch/irq-chip-model.rst | 38 ++ > .../zh_CN/arch/loongarch/irq-chip-model.rst | 37 ++ > arch/loongarch/include/asm/cpu-features.h | 1 + > arch/loongarch/include/asm/cpu.h | 2 + > arch/loongarch/include/asm/loongarch.h | 6 + > arch/loongarch/kernel/cpu-probe.c | 2 + > drivers/irqchip/Makefile | 2 +- > drivers/irqchip/irq-loongarch-avec.c | 25 +- > drivers/irqchip/irq-loongarch-ir.c | 562 ++++++++++++++++++ > drivers/irqchip/irq-loongson.h | 12 + > include/linux/cpuhotplug.h | 1 + > 11 files changed, 674 insertions(+), 14 deletions(-) > create mode 100644 drivers/irqchip/irq-loongarch-ir.c > > -- > 2.41.0 >
Hi, Huacai
在 2025/6/10 下午7:54, Huacai Chen 写道:
> Hi, Tianyang,
>
> Have you received my comments in V3?
> https://lore.kernel.org/loongarch/20250523101833.17940-1-zhangtianyang@loongson.cn/T/#m2883f379ce7eb663f3f3eb4736bf9b071c7fd8ab
After a few days of effort, I did not let that email reappear in my
mailbox... so I am replying to the above email here
* Re: [PATCH v3 2/2] irq/irq-loongarch-ir:Add Redirect irqchip support
2025-05-23 10:18 ` [PATCH v3 2/2] irq/irq-loongarch-ir:Add Redirect
irqchip support Tianyang Zhang
@ 2025-05-24 14:12 ` Huacai Chen
2025-05-25 9:06 ` Thomas Gleixner
1 sibling, 0 replies; 7+ messages in thread
From: Huacai Chen @ 2025-05-24 14:12 UTC (permalink / raw)
To: Tianyang Zhang
Cc: kernel, corbet, alexs, si.yanteng, tglx, jiaxun.yang, peterz,
wangliupu, lvjianmin, maobibo, siyanteng, gaosong, yangtiezhu,
loongarch, linux-doc, linux-kernel
>> +
>> +#define REDIRECT_REG_BASE(reg, node) \
>> + (UNCACHE_BASE | redirect_reg_base | (u64)(node) <<
NODE_ADDRSPACE_SHIFT | (reg))
> IO_BASE is a little better than UNCACHE_BASE.
yes, it is batter, thanks
>> +#define redirect_reg_queue_head(node)
REDIRECT_REG_BASE(LOONGARCH_IOCSR_REDIRECT_CQH, (node))
>> +#define redirect_reg_queue_tail(node)
REDIRECT_REG_BASE(LOONGARCH_IOCSR_REDIRECT_CQT, (node))
>> +#define read_queue_head(node) (*((u32
*)(redirect_reg_queue_head(node))))
>> +#define read_queue_tail(node) (*((u32
*)(redirect_reg_queue_tail(node))))
>> +#define write_queue_tail(node, val) (*((u32
*)(redirect_reg_queue_tail(node))) = (val))
>You can use readl() and writel() directly, then you can remove the
memory barrier around write_queue_tail().
OK , It is realy a good idea.thanks
>> +static void irde_invlid_entry_node(struct redirect_item *item)
> s/irde_invlid_entry_node/irde_invalid_entry_node/g
OK , thanks
>> + avecintc_sync(adata);
>> +
>> + return IRQ_SET_MASK_OK;
>> +}
> Have you tried to build with no SMP? This function (and maybe more)
should be guarded by CONFIG_SMP.
I did it at the beginning... Okay, I will supplement this test in the
current version
>> +static int __init redirect_reg_base_init(void)
>> +{
>> + acpi_status status;
>> + uint64_t addr = 0;
>> +
>> + if (acpi_disabled)
>> + return 0;
>> +
>> + status = acpi_evaluate_integer(NULL, "\\_SB.NO00", NULL, &addr);
>> + if (ACPI_FAILURE(status) || !addr)
>> + pr_info("redirect_iocsr_base used default
0x1fe00000\n");
>> + else
>> + redirect_reg_base = addr;
>> +
>> + return 0;
>> +}
>> +subsys_initcall_sync(redirect_reg_base_init);
>Can this function be put at the end of redirect_acpi_init()? It is too
>late in an initcall() function because the irqchip drivers begin to
>work before that.
Ok I got it , thanks
Tianyang
Hi, Huacai 在 2025/6/10 下午7:54, Huacai Chen 写道: > Hi, Tianyang, > > Have you received my comments in V3? > https://lore.kernel.org/loongarch/20250523101833.17940-1-zhangtianyang@loongson.cn/T/#m2883f379ce7eb663f3f3eb4736bf9b071c7fd8ab > > Huacai Sorry, except for a slight network issue, I did not receive the email mentioned above. I will reply to the email first and continue to modify this series of patches Tianyang > On Tue, Jun 10, 2025 at 7:43 PM Tianyang Zhang > <zhangtianyang@loongson.cn> wrote: >> From: Super User <root@localhost.localdomain> >> >> This series of patches introduces support for interrupt-redirect >> controllers, and this hardware feature will be supported on 3C6000 >> for the first time >> >> change log: >> v0->v1: >> 1.Rename the model names in the document. >> 2.Adjust the code format. >> 3.Remove architecture - specific prefixes. >> 4.Refactor the initialization logic, and IR driver no longer set AVEC_ENABLE. >> 5.Enhance compatibility under certain configurations. >> >> v1->v2: >> 1.Fixed an erroneous enabling issue. >> >> v2->v3 >> 1.Replace smp_call with address mapping to access registers >> 2.Fix some code style issues >> >> v3->v4 >> 1.Provide reasonable comments on the modifications made to IRQ_SET_MASK_OK_DONE >> 2.Replace meaningless empty functions with parent_mask/unmask/ack >> 3.Added and indeed released resources >> 4.Added judgment for data structure initialization completion to avoid duplicate creation during cpuhotplug >> 5.Fixed the code style and some unnecessary troubles >> >> Tianyang Zhang (2): >> Docs/LoongArch: Add Advanced Extended-Redirect IRQ model description >> irq/irq-loongarch-ir:Add Redirect irqchip support >> >> .../arch/loongarch/irq-chip-model.rst | 38 ++ >> .../zh_CN/arch/loongarch/irq-chip-model.rst | 37 ++ >> arch/loongarch/include/asm/cpu-features.h | 1 + >> arch/loongarch/include/asm/cpu.h | 2 + >> arch/loongarch/include/asm/loongarch.h | 6 + >> arch/loongarch/kernel/cpu-probe.c | 2 + >> drivers/irqchip/Makefile | 2 +- >> drivers/irqchip/irq-loongarch-avec.c | 25 +- >> drivers/irqchip/irq-loongarch-ir.c | 562 ++++++++++++++++++ >> drivers/irqchip/irq-loongson.h | 12 + >> include/linux/cpuhotplug.h | 1 + >> 11 files changed, 674 insertions(+), 14 deletions(-) >> create mode 100644 drivers/irqchip/irq-loongarch-ir.c >> >> -- >> 2.41.0 >>
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