[PATCH v1 1/3] dt-bindings: memory-controllers: add StarFive JH7110 SoC DMC

E Shattow posted 3 patches 6 months, 2 weeks ago
There is a newer version of this series
[PATCH v1 1/3] dt-bindings: memory-controllers: add StarFive JH7110 SoC DMC
Posted by E Shattow 6 months, 2 weeks ago
Document bindings for the JH7110 SoC DMC as implemented in downstream
U-Boot driver starfive_ddr.c

Signed-off-by: E Shattow <e@freeshell.de>
---
 .../starfive,jh7110-dmc.yaml                  | 76 +++++++++++++++++++
 1 file changed, 76 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/memory-controllers/starfive,jh7110-dmc.yaml

diff --git a/Documentation/devicetree/bindings/memory-controllers/starfive,jh7110-dmc.yaml b/Documentation/devicetree/bindings/memory-controllers/starfive,jh7110-dmc.yaml
new file mode 100644
index 000000000000..299c86893db1
--- /dev/null
+++ b/Documentation/devicetree/bindings/memory-controllers/starfive,jh7110-dmc.yaml
@@ -0,0 +1,76 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/memory-controllers/starfive,jh7110-dmc.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: StarFive JH7110 DMC
+
+maintainers:
+  - E Shattow <e@freeshell.de>
+
+description:
+  JH7110 DMC as implemented by U-Boot boot loader driver starfive_ddr.c
+
+properties:
+  compatible:
+    items:
+      - const: starfive,jh7110-dmc
+
+  reg:
+    minItems: 2
+    maxItems: 2
+
+  clocks:
+    maxItems: 1
+
+  clock-names:
+    items:
+      - const: pll1_out
+
+  clock-frequency:
+    enum: [2133, 2800]
+    default: 2133
+
+  resets:
+    minItems: 3
+    maxItems: 3
+
+  reset-names:
+    items:
+      - const: axi
+      - const: osc
+      - const: apb
+
+required:
+  - compatible
+  - reg
+  - clocks
+  - clock-names
+  - clock-frequency
+  - resets
+  - reset-names
+
+additionalProperties: false
+
+examples:
+  - |
+    #include <dt-bindings/clock/starfive,jh7110-crg.h>
+    #include <dt-bindings/reset/starfive,jh7110-crg.h>
+    soc {
+      #address-cells = <2>;
+      #size-cells = <2>;
+
+      memory-controller@15700000 {
+        compatible = "starfive,jh7110-dmc";
+        reg = <0x0 0x15700000 0x0 0x10000>,
+              <0x0 0x13000000 0x0 0x10000>;
+        clocks = <&syscrg JH7110_PLLCLK_PLL1_OUT>;
+        clock-names = "pll1_out";
+        clock-frequency = <2133>;
+        resets = <&syscrg JH7110_SYSRST_DDR_AXI>,
+                 <&syscrg JH7110_SYSRST_DDR_OSC>,
+                 <&syscrg JH7110_SYSRST_DDR_APB>;
+        reset-names = "axi", "osc", "apb";
+      };
+    };
-- 
2.49.0
Re: [PATCH v1 1/3] dt-bindings: memory-controllers: add StarFive JH7110 SoC DMC
Posted by Krzysztof Kozlowski 5 months, 4 weeks ago
On 06/06/2025 15:02, E Shattow wrote:
> Document bindings for the JH7110 SoC DMC as implemented in downstream
> U-Boot driver starfive_ddr.c
> 
> Signed-off-by: E Shattow <e@freeshell.de>
> ---
>  .../starfive,jh7110-dmc.yaml                  | 76 +++++++++++++++++++
>  1 file changed, 76 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/memory-controllers/starfive,jh7110-dmc.yaml
> 
> diff --git a/Documentation/devicetree/bindings/memory-controllers/starfive,jh7110-dmc.yaml b/Documentation/devicetree/bindings/memory-controllers/starfive,jh7110-dmc.yaml
> new file mode 100644
> index 000000000000..299c86893db1
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/memory-controllers/starfive,jh7110-dmc.yaml
> @@ -0,0 +1,76 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/memory-controllers/starfive,jh7110-dmc.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: StarFive JH7110 DMC
> +
> +maintainers:
> +  - E Shattow <e@freeshell.de>
> +
> +description:
> +  JH7110 DMC as implemented by U-Boot boot loader driver starfive_ddr.c

Bindings are about hardware. Explain the hardware, not drivers.

> +
> +properties:
> +  compatible:
> +    items:
> +      - const: starfive,jh7110-dmc
> +
> +  reg:
> +    minItems: 2

Drop

> +    maxItems: 2

Drop and list items with description instead


> +
> +  clocks:
> +    maxItems: 1
> +
> +  clock-names:
> +    items:
> +      - const: pll1_out
> +
> +  clock-frequency:
> +    enum: [2133, 2800]
> +    default: 2133

Drop clock-frequency. I doubt 2133 Hz is even correct... This is a
legacy property, use common clock framework.

> +
> +  resets:
> +    minItems: 3
> +    maxItems: 3

List the items with description instead

> +
> +  reset-names:
> +    items:
> +      - const: axi
> +      - const: osc
> +      - const: apb
> +
> +required:
> +  - compatible
> +  - reg
> +  - clocks
> +  - clock-names
> +  - clock-frequency
> +  - resets
> +  - reset-names
Best regards,
Krzysztof
Re: [PATCH v1 1/3] dt-bindings: memory-controllers: add StarFive JH7110 SoC DMC
Posted by Krzysztof Kozlowski 5 months, 4 weeks ago
On 06/06/2025 15:02, E Shattow wrote:
> Document bindings for the JH7110 SoC DMC as implemented in downstream
> U-Boot driver starfive_ddr.c

Heh, I totally missed "downstream"... We do not add bindings for
downstream. We do not care about downstream, so I should not spend my
time on this.

Do not send code for downstream.

Best regards,
Krzysztof
Re: [PATCH v1 1/3] dt-bindings: memory-controllers: add StarFive JH7110 SoC DMC
Posted by Conor Dooley 5 months, 4 weeks ago
On Mon, Jun 23, 2025 at 08:45:04AM +0200, Krzysztof Kozlowski wrote:
> On 06/06/2025 15:02, E Shattow wrote:
> > Document bindings for the JH7110 SoC DMC as implemented in downstream
> > U-Boot driver starfive_ddr.c
> 
> Heh, I totally missed "downstream"... We do not add bindings for
> downstream. We do not care about downstream, so I should not spend my
> time on this.
> 
> Do not send code for downstream.

I think that's either an accident or poor wording, there's a user for
this in mainline U-Boot.
Re: [PATCH v1 1/3] dt-bindings: memory-controllers: add StarFive JH7110 SoC DMC
Posted by Krzysztof Kozlowski 5 months, 4 weeks ago
On 23/06/2025 17:56, Conor Dooley wrote:
> On Mon, Jun 23, 2025 at 08:45:04AM +0200, Krzysztof Kozlowski wrote:
>> On 06/06/2025 15:02, E Shattow wrote:
>>> Document bindings for the JH7110 SoC DMC as implemented in downstream
>>> U-Boot driver starfive_ddr.c
>>
>> Heh, I totally missed "downstream"... We do not add bindings for
>> downstream. We do not care about downstream, so I should not spend my
>> time on this.
>>
>> Do not send code for downstream.
> 
> I think that's either an accident or poor wording, there's a user for
> this in mainline U-Boot.


OK, then my review stays. Commit msg should be rephrased.

In future: bindings always should be accepted prior other project starts
accepting drivers (just in case if you plan to play Uno card called:
"but my driver is like that").

Best regards,
Krzysztof