Add initial support for the Radxa Compute Module 5 (CM5). The CM5 uses a
proprietary connector.
Specification:
- Rockchip RK3588
- Up to 32 GB LPDDR4X
- Up to 128 GB eMMC
- 1x HDMI TX up to 8k@60 hz
- 1x eDP TX up to 4k@60 hz
- Gigabit Ethernet PHY
Signed-off-by: Joseph Kogut <joseph.kogut@gmail.com>
---
.../arm64/boot/dts/rockchip/rk3588s-radxa-cm5.dtsi | 156 +++++++++++++++++++++
1 file changed, 156 insertions(+)
diff --git a/arch/arm64/boot/dts/rockchip/rk3588s-radxa-cm5.dtsi b/arch/arm64/boot/dts/rockchip/rk3588s-radxa-cm5.dtsi
new file mode 100644
index 0000000000000000000000000000000000000000..d7946fe2bb4e721689e3eb4d60d8e9783402f05e
--- /dev/null
+++ b/arch/arm64/boot/dts/rockchip/rk3588s-radxa-cm5.dtsi
@@ -0,0 +1,156 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2025 Joseph Kogut <joseph.kogut@gmail.com>
+ */
+
+/*
+ * CM5 data sheet
+ * https://dl.radxa.com/cm5/v2210/radxa_cm5_v2210_schematic.pdf
+ */
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/leds/common.h>
+#include <dt-bindings/soc/rockchip,vop2.h>
+#include <dt-bindings/usb/pd.h>
+
+/ {
+ compatible = "radxa,cm5", "rockchip,rk3588s";
+
+ aliases {
+ mmc0 = &sdmmc;
+ mmc1 = &sdhci;
+ mmc2 = &sdio;
+ };
+
+ leds {
+ compatible = "gpio-leds";
+
+ led_sys: led-0 {
+ color = <LED_COLOR_ID_BLUE>;
+ default-state = "on";
+ function = LED_FUNCTION_HEARTBEAT;
+ gpios = <&gpio4 RK_PB4 GPIO_ACTIVE_HIGH>;
+ linux,default-trigger = "heartbeat";
+ };
+ };
+};
+
+&cpu_b0 {
+ cpu-supply = <&vdd_cpu_big0_s0>;
+};
+
+&cpu_b1 {
+ cpu-supply = <&vdd_cpu_big0_s0>;
+};
+
+&cpu_b2 {
+ cpu-supply = <&vdd_cpu_big1_s0>;
+};
+
+&cpu_b3 {
+ cpu-supply = <&vdd_cpu_big1_s0>;
+};
+
+&cpu_l0 {
+ cpu-supply = <&vdd_cpu_lit_s0>;
+};
+
+&cpu_l1 {
+ cpu-supply = <&vdd_cpu_lit_s0>;
+};
+
+&cpu_l2 {
+ cpu-supply = <&vdd_cpu_lit_s0>;
+};
+
+&cpu_l3 {
+ cpu-supply = <&vdd_cpu_lit_s0>;
+};
+
+&gmac1 {
+ clock_in_out = "output";
+ phy-handle = <&rgmii_phy1>;
+ phy-mode = "rgmii-id";
+ phy-supply = <&vcc_3v3_s0>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&gmac1_miim
+ &gmac1_tx_bus2
+ &gmac1_rx_bus2
+ &gmac1_rgmii_clk
+ &gmac1_rgmii_bus
+ &gmac1_clkinout>;
+ status = "okay";
+};
+
+&gpu {
+ mali-supply = <&vdd_gpu_s0>;
+ status = "okay";
+};
+
+&hdmi0 {
+ status = "okay";
+};
+
+&i2c0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c0m2_xfer>;
+ status = "okay";
+
+ vdd_cpu_big0_s0: regulator@42 {
+ compatible = "rockchip,rk8602";
+ reg = <0x42>;
+ fcs,suspend-voltage-selector = <1>;
+ regulator-name = "vdd_cpu_big0_s0";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <550000>;
+ regulator-max-microvolt = <1050000>;
+ regulator-ramp-delay = <2300>;
+ vin-supply = <&vcc5v0_sys>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vdd_cpu_big1_s0: regulator@43 {
+ compatible = "rockchip,rk8602";
+ reg = <0x43>;
+ fcs,suspend-voltage-selector = <1>;
+ regulator-name = "vdd_cpu_big1_s0";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <550000>;
+ regulator-max-microvolt = <1050000>;
+ regulator-ramp-delay = <2300>;
+ vin-supply = <&vcc5v0_sys>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+};
+
+&mdio1 {
+ rgmii_phy1: phy@1 {
+ compatible = "ethernet-phy-ieee802.3-c22";
+ reg = <0x1>;
+ };
+};
+
+&pd_gpu {
+ domain-supply = <&vdd_gpu_s0>;
+};
+
+&sdhci {
+ bus-width = <8>;
+ no-sdio;
+ no-sd;
+ non-removable;
+ max-frequency = <200000000>;
+ mmc-hs400-1_8v;
+ mmc-hs400-enhanced-strobe;
+ mmc-hs200-1_8v;
+ status = "okay";
+};
+
--
2.49.0> diff --git a/arch/arm64/boot/dts/rockchip/rk3588s-radxa-cm5.dtsi b/arch/arm64/boot/dts/rockchip/rk3588s-radxa-cm5.dtsi
> new file mode 100644
> index 0000000000000000000000000000000000000000..d7946fe2bb4e721689e3eb4d60d8e9783402f05e
> --- /dev/null
> +++ b/arch/arm64/boot/dts/rockchip/rk3588s-radxa-cm5.dtsi
> @@ -0,0 +1,156 @@
> +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
> +/*
> + * Copyright (c) 2025 Joseph Kogut <joseph.kogut@gmail.com>
> + */
> +
> +/*
> + * CM5 data sheet
> + * https://dl.radxa.com/cm5/v2210/radxa_cm5_v2210_schematic.pdf
> + */
> +
> +#include <dt-bindings/gpio/gpio.h>
> +#include <dt-bindings/leds/common.h>
> +#include <dt-bindings/soc/rockchip,vop2.h>
> +#include <dt-bindings/usb/pd.h>
> +
> +/ {
> + compatible = "radxa,cm5", "rockchip,rk3588s";
> +
> + aliases {
> + mmc0 = &sdmmc;
Since the microSD card is on the carrier board, this alias should be
moved to the board DTS.
> + mmc1 = &sdhci;
Most of the other Radxa rk3588 boards have the eMMC alias to mmc0. Why
does this use another convention?
> + mmc2 = &sdio;
The sdio is not enabled. This alias won't be used.
> + };
> +
> + leds {
> + compatible = "gpio-leds";
> +
> + led_sys: led-0 {
> + color = <LED_COLOR_ID_BLUE>;
> + default-state = "on";
> + function = LED_FUNCTION_HEARTBEAT;
> + gpios = <&gpio4 RK_PB4 GPIO_ACTIVE_HIGH>;
> + linux,default-trigger = "heartbeat";
> + };
> + };
> +};
> +
> +&cpu_b0 {
> + cpu-supply = <&vdd_cpu_big0_s0>;
> +};
> +
> +&cpu_b1 {
> + cpu-supply = <&vdd_cpu_big0_s0>;
> +};
> +
> +&cpu_b2 {
> + cpu-supply = <&vdd_cpu_big1_s0>;
> +};
> +
> +&cpu_b3 {
> + cpu-supply = <&vdd_cpu_big1_s0>;
> +};
> +
> +&cpu_l0 {
> + cpu-supply = <&vdd_cpu_lit_s0>;
> +};
> +
> +&cpu_l1 {
> + cpu-supply = <&vdd_cpu_lit_s0>;
> +};
> +
> +&cpu_l2 {
> + cpu-supply = <&vdd_cpu_lit_s0>;
> +};
> +
> +&cpu_l3 {
> + cpu-supply = <&vdd_cpu_lit_s0>;
> +};
> +
> +&gmac1 {
> + clock_in_out = "output";
> + phy-handle = <&rgmii_phy1>;
> + phy-mode = "rgmii-id";
> + phy-supply = <&vcc_3v3_s0>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&gmac1_miim
> + &gmac1_tx_bus2
> + &gmac1_rx_bus2
> + &gmac1_rgmii_clk
> + &gmac1_rgmii_bus
> + &gmac1_clkinout>;
> + status = "okay";
> +};
Should this be left disabled on the SoM dtsi? And only enabled on the
carrier board, if the carrier board has the RJ45 jack?
i.e. a handheld using the CM5 may not have ethernet
https://github.com/StonedEdge/Retro-Lite-CM5
> +
> +&gpu {
> + mali-supply = <&vdd_gpu_s0>;
> + status = "okay";
> +};
> +
> +&hdmi0 {
> + status = "okay";
> +};
This should be moved to the carrier board DTS where all the other
HDMI0 nodes are.
> +
> +&i2c0 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&i2c0m2_xfer>;
> + status = "okay";
> +
> + vdd_cpu_big0_s0: regulator@42 {
> + compatible = "rockchip,rk8602";
> + reg = <0x42>;
> + fcs,suspend-voltage-selector = <1>;
> + regulator-name = "vdd_cpu_big0_s0";
> + regulator-always-on;
> + regulator-boot-on;
> + regulator-min-microvolt = <550000>;
> + regulator-max-microvolt = <1050000>;
> + regulator-ramp-delay = <2300>;
> + vin-supply = <&vcc5v0_sys>;
> +
> + regulator-state-mem {
> + regulator-off-in-suspend;
> + };
> + };
> +
> + vdd_cpu_big1_s0: regulator@43 {
> + compatible = "rockchip,rk8602";
> + reg = <0x43>;
> + fcs,suspend-voltage-selector = <1>;
> + regulator-name = "vdd_cpu_big1_s0";
> + regulator-always-on;
> + regulator-boot-on;
> + regulator-min-microvolt = <550000>;
> + regulator-max-microvolt = <1050000>;
> + regulator-ramp-delay = <2300>;
> + vin-supply = <&vcc5v0_sys>;
> +
> + regulator-state-mem {
> + regulator-off-in-suspend;
> + };
> + };
> +};
> +
> +&mdio1 {
> + rgmii_phy1: phy@1 {
> + compatible = "ethernet-phy-ieee802.3-c22";
> + reg = <0x1>;
> + };
> +};
> +
> +&pd_gpu {
> + domain-supply = <&vdd_gpu_s0>;
> +};
> +
> +&sdhci {
> + bus-width = <8>;
> + no-sdio;
> + no-sd;
> + non-removable;
> + max-frequency = <200000000>;
> + mmc-hs400-1_8v;
> + mmc-hs400-enhanced-strobe;
> + mmc-hs200-1_8v;
> + status = "okay";
> +};
> +
Jimmy
On Thu, Jun 5, 2025 at 5:51 PM Jimmy Hon <honyuenkwun@gmail.com> wrote:
>
> > diff --git a/arch/arm64/boot/dts/rockchip/rk3588s-radxa-cm5.dtsi b/arch/arm64/boot/dts/rockchip/rk3588s-radxa-cm5.dtsi
> > new file mode 100644
> > index 0000000000000000000000000000000000000000..d7946fe2bb4e721689e3eb4d60d8e9783402f05e
> > --- /dev/null
> > +++ b/arch/arm64/boot/dts/rockchip/rk3588s-radxa-cm5.dtsi
> > @@ -0,0 +1,156 @@
> > +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
> > +/*
> > + * Copyright (c) 2025 Joseph Kogut <joseph.kogut@gmail.com>
> > + */
> > +
> > +/*
> > + * CM5 data sheet
> > + * https://dl.radxa.com/cm5/v2210/radxa_cm5_v2210_schematic.pdf
> > + */
> > +
> > +#include <dt-bindings/gpio/gpio.h>
> > +#include <dt-bindings/leds/common.h>
> > +#include <dt-bindings/soc/rockchip,vop2.h>
> > +#include <dt-bindings/usb/pd.h>
> > +
> > +/ {
> > + compatible = "radxa,cm5", "rockchip,rk3588s";
> > +
> > + aliases {
> > + mmc0 = &sdmmc;
> Since the microSD card is on the carrier board, this alias should be
> moved to the board DTS.
>
Good point, I'll move this to the board DTS. This is a remnant from
copying aspects of the downstream DTS, and adapting it for mainline
conventions.
> > + mmc1 = &sdhci;
> Most of the other Radxa rk3588 boards have the eMMC alias to mmc0. Why
> does this use another convention?
>
> > + mmc2 = &sdio;
> The sdio is not enabled. This alias won't be used.
>
These were copied from the downstream DTS. I'll go ahead and use the
mainline convention here as well.
> > + };
> > +
> > + leds {
> > + compatible = "gpio-leds";
> > +
> > + led_sys: led-0 {
> > + color = <LED_COLOR_ID_BLUE>;
> > + default-state = "on";
> > + function = LED_FUNCTION_HEARTBEAT;
> > + gpios = <&gpio4 RK_PB4 GPIO_ACTIVE_HIGH>;
> > + linux,default-trigger = "heartbeat";
> > + };
> > + };
> > +};
> > +
> > +&cpu_b0 {
> > + cpu-supply = <&vdd_cpu_big0_s0>;
> > +};
> > +
> > +&cpu_b1 {
> > + cpu-supply = <&vdd_cpu_big0_s0>;
> > +};
> > +
> > +&cpu_b2 {
> > + cpu-supply = <&vdd_cpu_big1_s0>;
> > +};
> > +
> > +&cpu_b3 {
> > + cpu-supply = <&vdd_cpu_big1_s0>;
> > +};
> > +
> > +&cpu_l0 {
> > + cpu-supply = <&vdd_cpu_lit_s0>;
> > +};
> > +
> > +&cpu_l1 {
> > + cpu-supply = <&vdd_cpu_lit_s0>;
> > +};
> > +
> > +&cpu_l2 {
> > + cpu-supply = <&vdd_cpu_lit_s0>;
> > +};
> > +
> > +&cpu_l3 {
> > + cpu-supply = <&vdd_cpu_lit_s0>;
> > +};
> > +
> > +&gmac1 {
> > + clock_in_out = "output";
> > + phy-handle = <&rgmii_phy1>;
> > + phy-mode = "rgmii-id";
> > + phy-supply = <&vcc_3v3_s0>;
> > + pinctrl-names = "default";
> > + pinctrl-0 = <&gmac1_miim
> > + &gmac1_tx_bus2
> > + &gmac1_rx_bus2
> > + &gmac1_rgmii_clk
> > + &gmac1_rgmii_bus
> > + &gmac1_clkinout>;
> > + status = "okay";
> > +};
> Should this be left disabled on the SoM dtsi? And only enabled on the
> carrier board, if the carrier board has the RJ45 jack?
> i.e. a handheld using the CM5 may not have ethernet
> https://github.com/StonedEdge/Retro-Lite-CM5
>
I think that makes sense, not every carrier is guaranteed to have ethernet.
> > +
> > +&gpu {
> > + mali-supply = <&vdd_gpu_s0>;
> > + status = "okay";
> > +};
> > +
> > +&hdmi0 {
> > + status = "okay";
> > +};
> This should be moved to the carrier board DTS where all the other
> HDMI0 nodes are.
>
That makes sense, I'll make this change. Thanks for the feedback, Jimmy.
Joseph
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