arch/arm64/boot/dts/ti/k3-j784s4-j742s2-mcu-wakeup-common.dtsi | 2 ++ 1 file changed, 2 insertions(+)
From: Bhavya Kapoor <b-kapoor@ti.com>
This commit adds the assigned-clocks and assigned-clock-parents
properties for wkup_uart0 in J784S4. Specifically, the assigned-clocks
property is set to reference the clock identified by
"wkup_usart_mcupll_bypass_out0", ensuring the UART operates with the
correct clock source.
The assigned-clock-parents property specifies "wkup_usart_clksel_out0"
as the parent clock. This configuration is critical for establishing
the proper clocking hierarchy, enabling the UART device to function
reliably across different baud rates.
Signed-off-by: Bhavya Kapoor <b-kapoor@ti.com>
---
Link to v1: https://lore.kernel.org/all/20241009072056.3511346-1-b-kapoor@ti.com/
arch/arm64/boot/dts/ti/k3-j784s4-j742s2-mcu-wakeup-common.dtsi | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm64/boot/dts/ti/k3-j784s4-j742s2-mcu-wakeup-common.dtsi b/arch/arm64/boot/dts/ti/k3-j784s4-j742s2-mcu-wakeup-common.dtsi
index 52e2965a3bf5..1146bc5990ea 100644
--- a/arch/arm64/boot/dts/ti/k3-j784s4-j742s2-mcu-wakeup-common.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-j784s4-j742s2-mcu-wakeup-common.dtsi
@@ -310,6 +310,8 @@ wkup_uart0: serial@42300000 {
interrupts = <GIC_SPI 897 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&k3_clks 397 0>;
clock-names = "fclk";
+ assigned-clocks = <&k3_clks 397 0>;
+ assigned-clock-parents = <&k3_clks 397 1>;
power-domains = <&k3_pds 397 TI_SCI_PD_EXCLUSIVE>;
status = "disabled";
};
--
2.34.1
On 09:54-20250603, Udit Kumar wrote:
> From: Bhavya Kapoor <b-kapoor@ti.com>
>
> This commit adds the assigned-clocks and assigned-clock-parents
> properties for wkup_uart0 in J784S4. Specifically, the assigned-clocks
> property is set to reference the clock identified by
> "wkup_usart_mcupll_bypass_out0", ensuring the UART operates with the
> correct clock source.
>
> The assigned-clock-parents property specifies "wkup_usart_clksel_out0"
> as the parent clock. This configuration is critical for establishing
> the proper clocking hierarchy, enabling the UART device to function
> reliably across different baud rates.
Please fix the commit message - not clear what specifically in the clock
hierarchy does permit the multiple baud rates.
>
> Signed-off-by: Bhavya Kapoor <b-kapoor@ti.com>
You need to add your SoB.
> ---
> Link to v1: https://lore.kernel.org/all/20241009072056.3511346-1-b-kapoor@ti.com/
Also as Baleswar stated, the $subject needs to be fixed.
>
> arch/arm64/boot/dts/ti/k3-j784s4-j742s2-mcu-wakeup-common.dtsi | 2 ++
> 1 file changed, 2 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/ti/k3-j784s4-j742s2-mcu-wakeup-common.dtsi b/arch/arm64/boot/dts/ti/k3-j784s4-j742s2-mcu-wakeup-common.dtsi
> index 52e2965a3bf5..1146bc5990ea 100644
> --- a/arch/arm64/boot/dts/ti/k3-j784s4-j742s2-mcu-wakeup-common.dtsi
> +++ b/arch/arm64/boot/dts/ti/k3-j784s4-j742s2-mcu-wakeup-common.dtsi
> @@ -310,6 +310,8 @@ wkup_uart0: serial@42300000 {
> interrupts = <GIC_SPI 897 IRQ_TYPE_LEVEL_HIGH>;
> clocks = <&k3_clks 397 0>;
> clock-names = "fclk";
> + assigned-clocks = <&k3_clks 397 0>;
> + assigned-clock-parents = <&k3_clks 397 1>;
> power-domains = <&k3_pds 397 TI_SCI_PD_EXCLUSIVE>;
> status = "disabled";
> };
> --
> 2.34.1
>
--
Regards,
Nishanth Menon
Key (0xDDB5849D1736249D) / Fingerprint: F8A2 8693 54EB 8232 17A3 1A34 DDB5 849D 1736 249D
Hello Nishanth On 6/3/2025 9:31 PM, Nishanth Menon wrote: > On 09:54-20250603, Udit Kumar wrote: >> From: Bhavya Kapoor <b-kapoor@ti.com> >> >> This commit adds the assigned-clocks and assigned-clock-parents >> properties for wkup_uart0 in J784S4. Specifically, the assigned-clocks >> property is set to reference the clock identified by >> "wkup_usart_mcupll_bypass_out0", ensuring the UART operates with the >> correct clock source. >> >> The assigned-clock-parents property specifies "wkup_usart_clksel_out0" >> as the parent clock. This configuration is critical for establishing >> the proper clocking hierarchy, enabling the UART device to function >> reliably across different baud rates. > Please fix the commit message - not clear what specifically in the clock > hierarchy does permit the multiple baud rates. need your advise here . unlike other UART of main domain. wkup_uart currently has two parents clock (clock-1 is at 96Mhz and clock-0 is at 19.2 Mhz). By default, current fw selects clock-1 as parent. Let me know, if explicitly we need to set parent as clock-1. If yes then i will roll out v2 with current message , if no then please drop this patch Thanks Udit > >> Signed-off-by: Bhavya Kapoor <b-kapoor@ti.com> > You need to add your SoB. >> --- >> Link to v1: https://lore.kernel.org/all/20241009072056.3511346-1-b-kapoor@ti.com/ > [..]
On 12:47-20250608, Kumar, Udit wrote: > Hello Nishanth > > On 6/3/2025 9:31 PM, Nishanth Menon wrote: > > On 09:54-20250603, Udit Kumar wrote: > > > From: Bhavya Kapoor <b-kapoor@ti.com> > > > > > > This commit adds the assigned-clocks and assigned-clock-parents > > > properties for wkup_uart0 in J784S4. Specifically, the assigned-clocks > > > property is set to reference the clock identified by > > > "wkup_usart_mcupll_bypass_out0", ensuring the UART operates with the > > > correct clock source. > > > > > > The assigned-clock-parents property specifies "wkup_usart_clksel_out0" > > > as the parent clock. This configuration is critical for establishing > > > the proper clocking hierarchy, enabling the UART device to function > > > reliably across different baud rates. > > Please fix the commit message - not clear what specifically in the clock > > hierarchy does permit the multiple baud rates. > > need your advise here . > > unlike other UART of main domain. wkup_uart currently has two parents clock > (clock-1 is at 96Mhz and clock-0 is at 19.2 Mhz). > > By default, current fw selects clock-1 as parent. > > Let me know, if explicitly we need to set parent as clock-1. > > If yes then i will roll out v2 with current message , if no then please drop > this patch I personally do not see a need for the patch, then. > > Thanks > > Udit > > > > > > Signed-off-by: Bhavya Kapoor <b-kapoor@ti.com> > > You need to add your SoB. > > > --- > > > Link to v1: https://lore.kernel.org/all/20241009072056.3511346-1-b-kapoor@ti.com/ > > [..] -- Regards, Nishanth Menon Key (0xDDB5849D1736249D) / Fingerprint: F8A2 8693 54EB 8232 17A3 1A34 DDB5 849D 1736 249D
On 6/3/2025 9:31 PM, Nishanth Menon wrote:
> On 09:54-20250603, Udit Kumar wrote:
>> From: Bhavya Kapoor <b-kapoor@ti.com>
>>
>> This commit adds the assigned-clocks and assigned-clock-parents
>> properties for wkup_uart0 in J784S4. Specifically, the assigned-clocks
>> property is set to reference the clock identified by
>> "wkup_usart_mcupll_bypass_out0", ensuring the UART operates with the
>> correct clock source.
>>
>> The assigned-clock-parents property specifies "wkup_usart_clksel_out0"
>> as the parent clock. This configuration is critical for establishing
>> the proper clocking hierarchy, enabling the UART device to function
>> reliably across different baud rates.
> Please fix the commit message - not clear what specifically in the clock
> hierarchy does permit the multiple baud rates.
Thanks for review.
will address in v2, commit message and other comments as well
>
>> Signed-off-by: Bhavya Kapoor <b-kapoor@ti.com>
> You need to add your SoB.
>> ---
>> Link to v1: https://lore.kernel.org/all/20241009072056.3511346-1-b-kapoor@ti.com/
> Also as Baleswar stated, the $subject needs to be fixed.
>> arch/arm64/boot/dts/ti/k3-j784s4-j742s2-mcu-wakeup-common.dtsi | 2 ++
>> 1 file changed, 2 insertions(+)
>>
>> diff --git a/arch/arm64/boot/dts/ti/k3-j784s4-j742s2-mcu-wakeup-common.dtsi b/arch/arm64/boot/dts/ti/k3-j784s4-j742s2-mcu-wakeup-common.dtsi
>> index 52e2965a3bf5..1146bc5990ea 100644
>> --- a/arch/arm64/boot/dts/ti/k3-j784s4-j742s2-mcu-wakeup-common.dtsi
>> +++ b/arch/arm64/boot/dts/ti/k3-j784s4-j742s2-mcu-wakeup-common.dtsi
>> @@ -310,6 +310,8 @@ wkup_uart0: serial@42300000 {
>> interrupts = <GIC_SPI 897 IRQ_TYPE_LEVEL_HIGH>;
>> clocks = <&k3_clks 397 0>;
>> clock-names = "fclk";
>> + assigned-clocks = <&k3_clks 397 0>;
>> + assigned-clock-parents = <&k3_clks 397 1>;
>> power-domains = <&k3_pds 397 TI_SCI_PD_EXCLUSIVE>;
>> status = "disabled";
>> };
>> --
>> 2.34.1
>>
On 03/06/25 09:54, Udit Kumar wrote:
> From: Bhavya Kapoor <b-kapoor@ti.com>
>
> This commit adds the assigned-clocks and assigned-clock-parents
> properties for wkup_uart0 in J784S4. Specifically, the assigned-clocks
> property is set to reference the clock identified by
> "wkup_usart_mcupll_bypass_out0", ensuring the UART operates with the
> correct clock source.
>
> The assigned-clock-parents property specifies "wkup_usart_clksel_out0"
> as the parent clock. This configuration is critical for establishing
> the proper clocking hierarchy, enabling the UART device to function
> reliably across different baud rates.
>
> Signed-off-by: Bhavya Kapoor <b-kapoor@ti.com>
> ---
> Link to v1: https://lore.kernel.org/all/20241009072056.3511346-1-b-kapoor@ti.com/
>
> arch/arm64/boot/dts/ti/k3-j784s4-j742s2-mcu-wakeup-common.dtsi | 2 ++
> 1 file changed, 2 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/ti/k3-j784s4-j742s2-mcu-wakeup-common.dtsi b/arch/arm64/boot/dts/ti/k3-j784s4-j742s2-mcu-wakeup-common.dtsi
Also $Subject line needs to be correct for k3-j784s4-j742s2-mcu-wakeup-common.dtsi file.
Thanks,
Beleswar
> index 52e2965a3bf5..1146bc5990ea 100644
> --- a/arch/arm64/boot/dts/ti/k3-j784s4-j742s2-mcu-wakeup-common.dtsi
> +++ b/arch/arm64/boot/dts/ti/k3-j784s4-j742s2-mcu-wakeup-common.dtsi
> @@ -310,6 +310,8 @@ wkup_uart0: serial@42300000 {
> interrupts = <GIC_SPI 897 IRQ_TYPE_LEVEL_HIGH>;
> clocks = <&k3_clks 397 0>;
> clock-names = "fclk";
> + assigned-clocks = <&k3_clks 397 0>;
> + assigned-clock-parents = <&k3_clks 397 1>;
> power-domains = <&k3_pds 397 TI_SCI_PD_EXCLUSIVE>;
> status = "disabled";
> };
Hi Udit,
On 03/06/25 09:54, Udit Kumar wrote:
> From: Bhavya Kapoor <b-kapoor@ti.com>
>
> This commit adds the assigned-clocks and assigned-clock-parents
> properties for wkup_uart0 in J784S4. Specifically, the assigned-clocks
> property is set to reference the clock identified by
> "wkup_usart_mcupll_bypass_out0",
Documentation says "WKUP_UART0_FCLK_CLK" for device id 397 and clock id 0...?
https://software-dl.ti.com/tisci/esd/latest/5_soc_doc/j784s4/clocks.html
> ensuring the UART operates with the
> correct clock source.
>
> The assigned-clock-parents property specifies "wkup_usart_clksel_out0"
> as the parent clock. This configuration is critical for establishing
> the proper clocking hierarchy, enabling the UART device to function
> reliably across different baud rates.
>
> Signed-off-by: Bhavya Kapoor <b-kapoor@ti.com>
Do you need to add your Sign off?
Thanks,
Beleswar
> ---
> Link to v1: https://lore.kernel.org/all/20241009072056.3511346-1-b-kapoor@ti.com/
>
> arch/arm64/boot/dts/ti/k3-j784s4-j742s2-mcu-wakeup-common.dtsi | 2 ++
> 1 file changed, 2 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/ti/k3-j784s4-j742s2-mcu-wakeup-common.dtsi b/arch/arm64/boot/dts/ti/k3-j784s4-j742s2-mcu-wakeup-common.dtsi
> index 52e2965a3bf5..1146bc5990ea 100644
> --- a/arch/arm64/boot/dts/ti/k3-j784s4-j742s2-mcu-wakeup-common.dtsi
> +++ b/arch/arm64/boot/dts/ti/k3-j784s4-j742s2-mcu-wakeup-common.dtsi
> @@ -310,6 +310,8 @@ wkup_uart0: serial@42300000 {
> interrupts = <GIC_SPI 897 IRQ_TYPE_LEVEL_HIGH>;
> clocks = <&k3_clks 397 0>;
> clock-names = "fclk";
> + assigned-clocks = <&k3_clks 397 0>;
> + assigned-clock-parents = <&k3_clks 397 1>;
> power-domains = <&k3_pds 397 TI_SCI_PD_EXCLUSIVE>;
> status = "disabled";
> };
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