arch/arm64/boot/dts/qcom/sm8650.dtsi | 250 +++++++++++++++++++++++++++ 1 file changed, 250 insertions(+)
Add coresight components on the path from stm to etr.
Signed-off-by: Yingchao Deng <quic_yingdeng@quicinc.com>
---
arch/arm64/boot/dts/qcom/sm8650.dtsi | 250 +++++++++++++++++++++++++++
1 file changed, 250 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sm8650.dtsi b/arch/arm64/boot/dts/qcom/sm8650.dtsi
index 86684cb9a932..5e1854a0e15f 100644
--- a/arch/arm64/boot/dts/qcom/sm8650.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8650.dtsi
@@ -5052,6 +5052,82 @@ data-pins {
};
};
+ ctcu@10001000 {
+ compatible = "qcom,sa8775p-ctcu";
+ reg = <0x0 0x10001000 0x0 0x1000>;
+
+ clocks = <&aoss_qmp>;
+ clock-names = "apb";
+
+ in-ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+ ctcu_in0: endpoint {
+ remote-endpoint = <&etr0_out>;
+ };
+ };
+
+ port@1 {
+ reg = <1>;
+ ctcu_in1: endpoint {
+ remote-endpoint = <&etr1_out>;
+ };
+ };
+ };
+ };
+
+ stm@10002000 {
+ compatible = "arm,coresight-stm", "arm,primecell";
+ reg = <0x0 0x10002000 0x0 0x1000>,
+ <0x0 0x16280000 0x0 0x180000>;
+ reg-names = "stm-base", "stm-stimulus-base";
+
+ clocks = <&aoss_qmp>;
+ clock-names = "apb_pclk";
+
+ out-ports {
+ port {
+ stm_out_funnel_in0: endpoint {
+ remote-endpoint =
+ <&funnel_in0_in_stm>;
+ };
+ };
+ };
+ };
+
+ funnel@10041000 {
+ compatible = "arm,coresight-dynamic-funnel", "arm,primecell";
+ reg = <0x0 0x10041000 0x0 0x1000>;
+
+ clocks = <&aoss_qmp>;
+ clock-names = "apb_pclk";
+
+ in-ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@7 {
+ reg = <7>;
+ funnel_in0_in_stm: endpoint {
+ remote-endpoint =
+ <&stm_out_funnel_in0>;
+ };
+ };
+ };
+
+ out-ports {
+ port {
+ funnel_in0_out_funnel_qdss: endpoint {
+ remote-endpoint =
+ <&funnel_qdss_in_funnel_in0>;
+ };
+ };
+ };
+ };
+
funnel@10042000 {
compatible = "arm,coresight-dynamic-funnel", "arm,primecell";
@@ -5094,6 +5170,14 @@ in-ports {
#address-cells = <1>;
#size-cells = <0>;
+ port@0 {
+ reg = <0>;
+
+ funnel_qdss_in_funnel_in0: endpoint {
+ remote-endpoint = <&funnel_in0_out_funnel_qdss>;
+ };
+ };
+
port@1 {
reg = <1>;
@@ -5112,6 +5196,133 @@ funnel_qdss_out_funnel_aoss: endpoint {
};
};
+ replicator@10046000 {
+ compatible = "arm,coresight-dynamic-replicator", "arm,primecell";
+ reg = <0x0 0x10046000 0x0 0x1000>;
+
+ clocks = <&aoss_qmp>;
+ clock-names = "apb_pclk";
+
+ in-ports {
+ port {
+ replicator_qdss_in_replicator_swao: endpoint {
+ remote-endpoint =
+ <&replicator_swao_out_replicator_qdss>;
+ };
+ };
+ };
+
+ out-ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ replicator_qdss_out_replicator_etr: endpoint {
+ remote-endpoint =
+ <&replicator_etr_in_replicator_qdss>;
+ };
+ };
+ };
+ };
+
+ tmc@10048000 {
+ compatible = "arm,coresight-tmc", "arm,primecell";
+ reg = <0x0 0x10048000 0x0 0x1000>;
+
+ iommus = <&apps_smmu 0x04e0 0>,
+ <&apps_smmu 0x04c0 0>;
+ dma-coherent;
+ arm,scatter-gather;
+
+ clocks = <&aoss_qmp>;
+ clock-names = "apb_pclk";
+
+ in-ports {
+ port {
+ tmc_etr_in_replicator_etr: endpoint {
+ remote-endpoint =
+ <&replicator_etr_out_tmc_etr>;
+ };
+ };
+ };
+
+ out-ports {
+ port {
+ etr0_out: endpoint {
+ remote-endpoint =
+ <&ctcu_in0>;
+ };
+ };
+ };
+ };
+
+ replicator@1004e000 {
+ compatible = "arm,coresight-dynamic-replicator", "arm,primecell";
+ reg = <0x0 0x1004e000 0x0 0x1000>;
+
+ clocks = <&aoss_qmp>;
+ clock-names = "apb_pclk";
+
+ in-ports {
+ port {
+ replicator_etr_in_replicator_qdss: endpoint {
+ remote-endpoint =
+ <&replicator_qdss_out_replicator_etr>;
+ };
+ };
+ };
+
+ out-ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+ replicator_etr_out_tmc_etr: endpoint {
+ remote-endpoint =
+ <&tmc_etr_in_replicator_etr>;
+ };
+ };
+ port@1 {
+ reg = <1>;
+ replicator_etr_out_tmc_etr1: endpoint {
+ remote-endpoint =
+ <&tmc_etr1_in_replicator_etr>;
+ };
+ };
+ };
+ };
+
+ tmc@1004f000 {
+ compatible = "arm,primecell";
+ reg = <0x0 0x1004f000 0x0 0x1000>;
+
+ iommus = <&apps_smmu 0x0500 0x0>;
+ dma-coherent;
+ arm,scatter-gather;
+
+ clocks = <&aoss_qmp>;
+ clock-names = "apb_pclk";
+
+ in-ports {
+ port {
+ tmc_etr1_in_replicator_etr: endpoint {
+ remote-endpoint =
+ <&replicator_etr_out_tmc_etr1>;
+ };
+ };
+ };
+
+ out-ports {
+ port {
+ etr1_out: endpoint {
+ remote-endpoint =
+ <&ctcu_in1>;
+ };
+ };
+ };
+ };
+
funnel@10b04000 {
compatible = "arm,coresight-dynamic-funnel", "arm,primecell";
@@ -5157,6 +5368,45 @@ tmc_etf_in_funnel_aoss: endpoint {
};
};
};
+
+ out-ports {
+ port {
+ tmc_etf_out_replicator_swao: endpoint {
+ remote-endpoint =
+ <&replicator_swao_in_tmc_etf>;
+ };
+ };
+ };
+ };
+
+ replicator@10b06000 {
+ compatible = "arm,coresight-dynamic-replicator", "arm,primecell";
+ reg = <0x0 0x10b06000 0x0 0x1000>;
+
+ qcom,replicator-loses-context;
+ clocks = <&aoss_qmp>;
+ clock-names = "apb_pclk";
+
+ in-ports {
+ port {
+ replicator_swao_in_tmc_etf: endpoint {
+ remote-endpoint =
+ <&tmc_etf_out_replicator_swao>;
+ };
+ };
+ };
+
+ out-ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ replicator_swao_out_replicator_qdss: endpoint {
+ remote-endpoint =
+ <&replicator_qdss_in_replicator_swao>;
+ };
+ };
+ };
};
funnel@13810000 {
--
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project
On Thu, 29 May 2025 16:56:41 +0800, Yingchao Deng wrote:
> Add coresight components on the path from stm to etr.
>
> Signed-off-by: Yingchao Deng <quic_yingdeng@quicinc.com>
> ---
> arch/arm64/boot/dts/qcom/sm8650.dtsi | 250 +++++++++++++++++++++++++++
> 1 file changed, 250 insertions(+)
>
My bot found new DTB warnings on the .dts files added or changed in this
series.
Some warnings may be from an existing SoC .dtsi. Or perhaps the warnings
are fixed by another series. Ultimately, it is up to the platform
maintainer whether these warnings are acceptable or not. No need to reply
unless the platform maintainer has comments.
If you already ran DT checks and didn't see these error(s), then
make sure dt-schema is up to date:
pip3 install dtschema --upgrade
This patch series was applied (using b4) to base:
Base: attempting to guess base-commit...
Base: failed to guess base
If this is not the correct base, please add 'base-commit' tag
(or use b4 which does this automatically)
New warnings running 'make CHECK_DTBS=y for arch/arm64/boot/dts/qcom/' for 20250529085650.3594253-1-quic_yingdeng@quicinc.com:
arch/arm64/boot/dts/qcom/sm8650-hdk.dtb: replicator@10046000 (arm,coresight-dynamic-replicator): out-ports:port@0: 'reg' is a required property
from schema $id: http://devicetree.org/schemas/arm/arm,coresight-dynamic-replicator.yaml#
arch/arm64/boot/dts/qcom/sm8650-hdk.dtb: replicator@10046000 (arm,coresight-dynamic-replicator): Unevaluated properties are not allowed ('out-ports' was unexpected)
from schema $id: http://devicetree.org/schemas/arm/arm,coresight-dynamic-replicator.yaml#
arch/arm64/boot/dts/qcom/sm8650-hdk.dtb: tmc@10048000 (arm,coresight-tmc): iommus: [[75, 1248, 0], [75, 1216, 0]] is too long
from schema $id: http://devicetree.org/schemas/arm/arm,coresight-tmc.yaml#
arch/arm64/boot/dts/qcom/sm8650-hdk.dtb: tmc@10048000 (arm,coresight-tmc): Unevaluated properties are not allowed ('dma-coherent', 'iommus' were unexpected)
from schema $id: http://devicetree.org/schemas/arm/arm,coresight-tmc.yaml#
arch/arm64/boot/dts/qcom/sm8650-mtp.dtb: replicator@10046000 (arm,coresight-dynamic-replicator): out-ports:port@0: 'reg' is a required property
from schema $id: http://devicetree.org/schemas/arm/arm,coresight-dynamic-replicator.yaml#
arch/arm64/boot/dts/qcom/sm8650-mtp.dtb: replicator@10046000 (arm,coresight-dynamic-replicator): Unevaluated properties are not allowed ('out-ports' was unexpected)
from schema $id: http://devicetree.org/schemas/arm/arm,coresight-dynamic-replicator.yaml#
arch/arm64/boot/dts/qcom/sm8650-mtp.dtb: tmc@10048000 (arm,coresight-tmc): iommus: [[75, 1248, 0], [75, 1216, 0]] is too long
from schema $id: http://devicetree.org/schemas/arm/arm,coresight-tmc.yaml#
arch/arm64/boot/dts/qcom/sm8650-mtp.dtb: tmc@10048000 (arm,coresight-tmc): Unevaluated properties are not allowed ('dma-coherent', 'iommus' were unexpected)
from schema $id: http://devicetree.org/schemas/arm/arm,coresight-tmc.yaml#
arch/arm64/boot/dts/qcom/sm8650-hdk.dtb: replicator@10b06000 (arm,coresight-dynamic-replicator): out-ports:port@0: 'reg' is a required property
from schema $id: http://devicetree.org/schemas/arm/arm,coresight-dynamic-replicator.yaml#
arch/arm64/boot/dts/qcom/sm8650-hdk.dtb: replicator@10b06000 (arm,coresight-dynamic-replicator): Unevaluated properties are not allowed ('out-ports' was unexpected)
from schema $id: http://devicetree.org/schemas/arm/arm,coresight-dynamic-replicator.yaml#
arch/arm64/boot/dts/qcom/sm8650-mtp.dtb: replicator@10b06000 (arm,coresight-dynamic-replicator): out-ports:port@0: 'reg' is a required property
from schema $id: http://devicetree.org/schemas/arm/arm,coresight-dynamic-replicator.yaml#
arch/arm64/boot/dts/qcom/sm8650-mtp.dtb: replicator@10b06000 (arm,coresight-dynamic-replicator): Unevaluated properties are not allowed ('out-ports' was unexpected)
from schema $id: http://devicetree.org/schemas/arm/arm,coresight-dynamic-replicator.yaml#
arch/arm64/boot/dts/qcom/sm8650-qrd.dtb: replicator@10046000 (arm,coresight-dynamic-replicator): out-ports:port@0: 'reg' is a required property
from schema $id: http://devicetree.org/schemas/arm/arm,coresight-dynamic-replicator.yaml#
arch/arm64/boot/dts/qcom/sm8650-qrd.dtb: replicator@10046000 (arm,coresight-dynamic-replicator): Unevaluated properties are not allowed ('out-ports' was unexpected)
from schema $id: http://devicetree.org/schemas/arm/arm,coresight-dynamic-replicator.yaml#
arch/arm64/boot/dts/qcom/sm8650-qrd.dtb: tmc@10048000 (arm,coresight-tmc): iommus: [[75, 1248, 0], [75, 1216, 0]] is too long
from schema $id: http://devicetree.org/schemas/arm/arm,coresight-tmc.yaml#
arch/arm64/boot/dts/qcom/sm8650-qrd.dtb: tmc@10048000 (arm,coresight-tmc): Unevaluated properties are not allowed ('dma-coherent', 'iommus' were unexpected)
from schema $id: http://devicetree.org/schemas/arm/arm,coresight-tmc.yaml#
arch/arm64/boot/dts/qcom/sm8650-qrd.dtb: replicator@10b06000 (arm,coresight-dynamic-replicator): out-ports:port@0: 'reg' is a required property
from schema $id: http://devicetree.org/schemas/arm/arm,coresight-dynamic-replicator.yaml#
arch/arm64/boot/dts/qcom/sm8650-qrd.dtb: replicator@10b06000 (arm,coresight-dynamic-replicator): Unevaluated properties are not allowed ('out-ports' was unexpected)
from schema $id: http://devicetree.org/schemas/arm/arm,coresight-dynamic-replicator.yaml#
On 29/05/2025 10:56, Yingchao Deng wrote:
> Add coresight components on the path from stm to etr.
>
> Signed-off-by: Yingchao Deng <quic_yingdeng@quicinc.com>
> ---
> arch/arm64/boot/dts/qcom/sm8650.dtsi | 250 +++++++++++++++++++++++++++
> 1 file changed, 250 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/qcom/sm8650.dtsi b/arch/arm64/boot/dts/qcom/sm8650.dtsi
> index 86684cb9a932..5e1854a0e15f 100644
> --- a/arch/arm64/boot/dts/qcom/sm8650.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sm8650.dtsi
> @@ -5052,6 +5052,82 @@ data-pins {
> };
> };
>
> + ctcu@10001000 {
> + compatible = "qcom,sa8775p-ctcu";
Wrong compatible.
> + reg = <0x0 0x10001000 0x0 0x1000>;
> +
> + clocks = <&aoss_qmp>;
> + clock-names = "apb";
> +
> + in-ports {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + port@0 {
> + reg = <0>;
> + ctcu_in0: endpoint {
> + remote-endpoint = <&etr0_out>;
Fix indentation.
> + };
> + };
> +
> + port@1 {
> + reg = <1>;
> + ctcu_in1: endpoint {
> + remote-endpoint = <&etr1_out>;
> + };
> + };
> + };
> + };
> +
> + stm@10002000 {
> + compatible = "arm,coresight-stm", "arm,primecell";
> + reg = <0x0 0x10002000 0x0 0x1000>,
> + <0x0 0x16280000 0x0 0x180000>;
> + reg-names = "stm-base", "stm-stimulus-base";
> +
> + clocks = <&aoss_qmp>;
> + clock-names = "apb_pclk";
> +
> + out-ports {
> + port {
> + stm_out_funnel_in0: endpoint {
> + remote-endpoint =
> + <&funnel_in0_in_stm>;
> + };
> + };
> + };
> + };
> +
> + funnel@10041000 {
> + compatible = "arm,coresight-dynamic-funnel", "arm,primecell";
> + reg = <0x0 0x10041000 0x0 0x1000>;
> +
> + clocks = <&aoss_qmp>;
> + clock-names = "apb_pclk";
> +
> + in-ports {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + port@7 {
> + reg = <7>;
> + funnel_in0_in_stm: endpoint {
> + remote-endpoint =
> + <&stm_out_funnel_in0>;
> + };
> + };
> + };
> +
> + out-ports {
> + port {
> + funnel_in0_out_funnel_qdss: endpoint {
> + remote-endpoint =
> + <&funnel_qdss_in_funnel_in0>;
> + };
> + };
> + };
> + };
> +
> funnel@10042000 {
> compatible = "arm,coresight-dynamic-funnel", "arm,primecell";
>
> @@ -5094,6 +5170,14 @@ in-ports {
> #address-cells = <1>;
> #size-cells = <0>;
>
> + port@0 {
> + reg = <0>;
> +
> + funnel_qdss_in_funnel_in0: endpoint {
> + remote-endpoint = <&funnel_in0_out_funnel_qdss>;
> + };
> + };
> +
> port@1 {
> reg = <1>;
>
> @@ -5112,6 +5196,133 @@ funnel_qdss_out_funnel_aoss: endpoint {
> };
> };
>
> + replicator@10046000 {
> + compatible = "arm,coresight-dynamic-replicator", "arm,primecell";
> + reg = <0x0 0x10046000 0x0 0x1000>;
> +
> + clocks = <&aoss_qmp>;
> + clock-names = "apb_pclk";
> +
> + in-ports {
> + port {
> + replicator_qdss_in_replicator_swao: endpoint {
> + remote-endpoint =
> + <&replicator_swao_out_replicator_qdss>;
> + };
> + };
> + };
> +
> + out-ports {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + port@0 {
> + replicator_qdss_out_replicator_etr: endpoint {
> + remote-endpoint =
> + <&replicator_etr_in_replicator_qdss>;
> + };
> + };
> + };
> + };
> +
> + tmc@10048000 {
> + compatible = "arm,coresight-tmc", "arm,primecell";
> + reg = <0x0 0x10048000 0x0 0x1000>;
> +
> + iommus = <&apps_smmu 0x04e0 0>,
> + <&apps_smmu 0x04c0 0>;
> + dma-coherent;
> + arm,scatter-gather;
> +
> + clocks = <&aoss_qmp>;
> + clock-names = "apb_pclk";
> +
> + in-ports {
> + port {
> + tmc_etr_in_replicator_etr: endpoint {
> + remote-endpoint =
> + <&replicator_etr_out_tmc_etr>;
> + };
> + };
> + };
> +
> + out-ports {
> + port {
> + etr0_out: endpoint {
> + remote-endpoint =
> + <&ctcu_in0>;
> + };
> + };
> + };
> + };
> +
> + replicator@1004e000 {
> + compatible = "arm,coresight-dynamic-replicator", "arm,primecell";
> + reg = <0x0 0x1004e000 0x0 0x1000>;
> +
> + clocks = <&aoss_qmp>;
> + clock-names = "apb_pclk";
> +
> + in-ports {
> + port {
> + replicator_etr_in_replicator_qdss: endpoint {
> + remote-endpoint =
> + <&replicator_qdss_out_replicator_etr>;
> + };
> + };
> + };
> +
> + out-ports {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + port@0 {
> + reg = <0>;
> + replicator_etr_out_tmc_etr: endpoint {
> + remote-endpoint =
> + <&tmc_etr_in_replicator_etr>;
> + };
> + };
> + port@1 {
> + reg = <1>;
> + replicator_etr_out_tmc_etr1: endpoint {
> + remote-endpoint =
> + <&tmc_etr1_in_replicator_etr>;
> + };
> + };
> + };
> + };
> +
> + tmc@1004f000 {
> + compatible = "arm,primecell";
That's also wrong.
Plus I suspect this was not tested against bindings.
Best regards,
Krzysztof
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