drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c | 1 + 1 file changed, 1 insertion(+)
Add the SM6115 MDSS compatible to clients compatible list, as it also
needs that workaround.
Without this workaround, for example, QRB4210 RB2 which is based on
SM4250/SM6115 generates a lot of smmu unhandled context faults during
boot:
arm_smmu_context_fault: 116854 callbacks suppressed
arm-smmu c600000.iommu: Unhandled context fault: fsr=0x402,
iova=0x5c0ec600, fsynr=0x320021, cbfrsynra=0x420, cb=5
arm-smmu c600000.iommu: FSR = 00000402 [Format=2 TF], SID=0x420
arm-smmu c600000.iommu: FSYNR0 = 00320021 [S1CBNDX=50 PNU PLVL=1]
arm-smmu c600000.iommu: Unhandled context fault: fsr=0x402,
iova=0x5c0d7800, fsynr=0x320021, cbfrsynra=0x420, cb=5
arm-smmu c600000.iommu: FSR = 00000402 [Format=2 TF], SID=0x420
and also leads to failed initialisation of lontium lt9611uxc driver
and gpu afterwards:
------------[ cut here ]------------
!aspace
WARNING: CPU: 6 PID: 324 at drivers/gpu/drm/msm/msm_gem_vma.c:130 msm_gem_vma_init+0x150/0x18c [msm]
Modules linked in: ... (long list of modules)
CPU: 6 UID: 0 PID: 324 Comm: (udev-worker) Not tainted 6.15.0-03037-gaacc73ceeb8b #4 PREEMPT
Hardware name: Qualcomm Technologies, Inc. QRB4210 RB2 (DT)
pstate: 80000005 (Nzcv daif -PAN -UAO -TCO -DIT -SSBS BTYPE=--)
pc : msm_gem_vma_init+0x150/0x18c [msm]
lr : msm_gem_vma_init+0x150/0x18c [msm]
sp : ffff80008144b280
...
Call trace:
msm_gem_vma_init+0x150/0x18c [msm] (P)
get_vma_locked+0xc0/0x194 [msm]
msm_gem_get_and_pin_iova_range+0x4c/0xdc [msm]
msm_gem_kernel_new+0x48/0x160 [msm]
msm_gpu_init+0x34c/0x53c [msm]
adreno_gpu_init+0x1b0/0x2d8 [msm]
a6xx_gpu_init+0x1e8/0x9e0 [msm]
adreno_bind+0x2b8/0x348 [msm]
component_bind_all+0x100/0x230
msm_drm_bind+0x13c/0x3d0 [msm]
try_to_bring_up_aggregate_device+0x164/0x1d0
__component_add+0xa4/0x174
component_add+0x14/0x20
dsi_dev_attach+0x20/0x34 [msm]
dsi_host_attach+0x58/0x98 [msm]
devm_mipi_dsi_attach+0x34/0x90
lt9611uxc_attach_dsi.isra.0+0x94/0x124 [lontium_lt9611uxc]
lt9611uxc_probe+0x540/0x5fc [lontium_lt9611uxc]
i2c_device_probe+0x148/0x2a8
really_probe+0xbc/0x2c0
__driver_probe_device+0x78/0x120
driver_probe_device+0x3c/0x154
__driver_attach+0x90/0x1a0
bus_for_each_dev+0x68/0xb8
driver_attach+0x24/0x30
bus_add_driver+0xe4/0x208
driver_register+0x68/0x124
i2c_register_driver+0x48/0xcc
lt9611uxc_driver_init+0x20/0x1000 [lontium_lt9611uxc]
do_one_initcall+0x60/0x1d4
do_init_module+0x54/0x1fc
load_module+0x1748/0x1c8c
init_module_from_file+0x74/0xa0
__arm64_sys_finit_module+0x130/0x2f8
invoke_syscall+0x48/0x104
el0_svc_common.constprop.0+0xc0/0xe0
do_el0_svc+0x1c/0x28
el0_svc+0x2c/0x80
el0t_64_sync_handler+0x10c/0x138
el0t_64_sync+0x198/0x19c
---[ end trace 0000000000000000 ]---
msm_dpu 5e01000.display-controller: [drm:msm_gpu_init [msm]] *ERROR* could not allocate memptrs: -22
msm_dpu 5e01000.display-controller: failed to load adreno gpu
platform a400000.remoteproc:glink-edge:apr:service@7:dais: Adding to iommu group 19
msm_dpu 5e01000.display-controller: failed to bind 5900000.gpu (ops a3xx_ops [msm]): -22
msm_dpu 5e01000.display-controller: adev bind failed: -22
lt9611uxc 0-002b: failed to attach dsi to host
lt9611uxc 0-002b: probe with driver lt9611uxc failed with error -22
Suggested-by: Bjorn Andersson <andersson@kernel.org>
Cc: <stable@vger.kernel.org>
Signed-off-by: Alexey Klimov <alexey.klimov@linaro.org>
---
drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c b/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c
index 59d02687280e..c919babcea75 100644
--- a/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c
+++ b/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c
@@ -365,6 +365,7 @@ static const struct of_device_id qcom_smmu_client_of_match[] __maybe_unused = {
{ .compatible = "qcom,sdm670-mdss" },
{ .compatible = "qcom,sdm845-mdss" },
{ .compatible = "qcom,sdm845-mss-pil" },
+ { .compatible = "qcom,sm6115-mdss" },
{ .compatible = "qcom,sm6350-mdss" },
{ .compatible = "qcom,sm6375-mdss" },
{ .compatible = "qcom,sm8150-mdss" },
--
2.47.2On Wed, May 28, 2025 at 01:31:18AM +0100, Alexey Klimov wrote:
> Add the SM6115 MDSS compatible to clients compatible list, as it also
> needs that workaround.
> Without this workaround, for example, QRB4210 RB2 which is based on
> SM4250/SM6115 generates a lot of smmu unhandled context faults during
> boot:
>
> arm_smmu_context_fault: 116854 callbacks suppressed
> arm-smmu c600000.iommu: Unhandled context fault: fsr=0x402,
> iova=0x5c0ec600, fsynr=0x320021, cbfrsynra=0x420, cb=5
> arm-smmu c600000.iommu: FSR = 00000402 [Format=2 TF], SID=0x420
> arm-smmu c600000.iommu: FSYNR0 = 00320021 [S1CBNDX=50 PNU PLVL=1]
> arm-smmu c600000.iommu: Unhandled context fault: fsr=0x402,
> iova=0x5c0d7800, fsynr=0x320021, cbfrsynra=0x420, cb=5
> arm-smmu c600000.iommu: FSR = 00000402 [Format=2 TF], SID=0x420
>
> and also leads to failed initialisation of lontium lt9611uxc driver
> and gpu afterwards:
Nit: there is nothing failing the lt9611uxc on its own. binding all MDSS
components (triggered by lt9611uxc attaching to the DSI bus) produces
the failure.
>
> ------------[ cut here ]------------
> !aspace
> WARNING: CPU: 6 PID: 324 at drivers/gpu/drm/msm/msm_gem_vma.c:130 msm_gem_vma_init+0x150/0x18c [msm]
> Modules linked in: ... (long list of modules)
> CPU: 6 UID: 0 PID: 324 Comm: (udev-worker) Not tainted 6.15.0-03037-gaacc73ceeb8b #4 PREEMPT
> Hardware name: Qualcomm Technologies, Inc. QRB4210 RB2 (DT)
> pstate: 80000005 (Nzcv daif -PAN -UAO -TCO -DIT -SSBS BTYPE=--)
> pc : msm_gem_vma_init+0x150/0x18c [msm]
> lr : msm_gem_vma_init+0x150/0x18c [msm]
> sp : ffff80008144b280
> ...
> Call trace:
> msm_gem_vma_init+0x150/0x18c [msm] (P)
> get_vma_locked+0xc0/0x194 [msm]
> msm_gem_get_and_pin_iova_range+0x4c/0xdc [msm]
> msm_gem_kernel_new+0x48/0x160 [msm]
> msm_gpu_init+0x34c/0x53c [msm]
> adreno_gpu_init+0x1b0/0x2d8 [msm]
> a6xx_gpu_init+0x1e8/0x9e0 [msm]
> adreno_bind+0x2b8/0x348 [msm]
> component_bind_all+0x100/0x230
> msm_drm_bind+0x13c/0x3d0 [msm]
> try_to_bring_up_aggregate_device+0x164/0x1d0
> __component_add+0xa4/0x174
> component_add+0x14/0x20
> dsi_dev_attach+0x20/0x34 [msm]
> dsi_host_attach+0x58/0x98 [msm]
> devm_mipi_dsi_attach+0x34/0x90
> lt9611uxc_attach_dsi.isra.0+0x94/0x124 [lontium_lt9611uxc]
> lt9611uxc_probe+0x540/0x5fc [lontium_lt9611uxc]
> i2c_device_probe+0x148/0x2a8
> really_probe+0xbc/0x2c0
> __driver_probe_device+0x78/0x120
> driver_probe_device+0x3c/0x154
> __driver_attach+0x90/0x1a0
> bus_for_each_dev+0x68/0xb8
> driver_attach+0x24/0x30
> bus_add_driver+0xe4/0x208
> driver_register+0x68/0x124
> i2c_register_driver+0x48/0xcc
> lt9611uxc_driver_init+0x20/0x1000 [lontium_lt9611uxc]
> do_one_initcall+0x60/0x1d4
> do_init_module+0x54/0x1fc
> load_module+0x1748/0x1c8c
> init_module_from_file+0x74/0xa0
> __arm64_sys_finit_module+0x130/0x2f8
> invoke_syscall+0x48/0x104
> el0_svc_common.constprop.0+0xc0/0xe0
> do_el0_svc+0x1c/0x28
> el0_svc+0x2c/0x80
> el0t_64_sync_handler+0x10c/0x138
> el0t_64_sync+0x198/0x19c
> ---[ end trace 0000000000000000 ]---
> msm_dpu 5e01000.display-controller: [drm:msm_gpu_init [msm]] *ERROR* could not allocate memptrs: -22
> msm_dpu 5e01000.display-controller: failed to load adreno gpu
> platform a400000.remoteproc:glink-edge:apr:service@7:dais: Adding to iommu group 19
> msm_dpu 5e01000.display-controller: failed to bind 5900000.gpu (ops a3xx_ops [msm]): -22
> msm_dpu 5e01000.display-controller: adev bind failed: -22
> lt9611uxc 0-002b: failed to attach dsi to host
> lt9611uxc 0-002b: probe with driver lt9611uxc failed with error -22
>
> Suggested-by: Bjorn Andersson <andersson@kernel.org>
> Cc: <stable@vger.kernel.org>
> Signed-off-by: Alexey Klimov <alexey.klimov@linaro.org>
> ---
> drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c | 1 +
> 1 file changed, 1 insertion(+)
>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
I'd also propose:
Fixes: 3581b7062cec ("drm/msm/disp/dpu1: add support for display on SM6115")
This way this is going to be fixed for all platforms using display on
SM6115.
--
With best wishes
Dmitry
On Wed May 28, 2025 at 9:52 AM BST, Dmitry Baryshkov wrote:
> On Wed, May 28, 2025 at 01:31:18AM +0100, Alexey Klimov wrote:
>> Add the SM6115 MDSS compatible to clients compatible list, as it also
>> needs that workaround.
>> Without this workaround, for example, QRB4210 RB2 which is based on
>> SM4250/SM6115 generates a lot of smmu unhandled context faults during
>> boot:
>>
>> arm_smmu_context_fault: 116854 callbacks suppressed
>> arm-smmu c600000.iommu: Unhandled context fault: fsr=0x402,
>> iova=0x5c0ec600, fsynr=0x320021, cbfrsynra=0x420, cb=5
>> arm-smmu c600000.iommu: FSR = 00000402 [Format=2 TF], SID=0x420
>> arm-smmu c600000.iommu: FSYNR0 = 00320021 [S1CBNDX=50 PNU PLVL=1]
>> arm-smmu c600000.iommu: Unhandled context fault: fsr=0x402,
>> iova=0x5c0d7800, fsynr=0x320021, cbfrsynra=0x420, cb=5
>> arm-smmu c600000.iommu: FSR = 00000402 [Format=2 TF], SID=0x420
>>
>> and also leads to failed initialisation of lontium lt9611uxc driver
>> and gpu afterwards:
>
> Nit: there is nothing failing the lt9611uxc on its own. binding all MDSS
> components (triggered by lt9611uxc attaching to the DSI bus) produces
> the failure.
Oh, I didn't mean to express that something failed in lt9611uxc itself, I
was just trying to list observed problems.
Apart from hdmi bridge and gpu the failed component will be soundcard driver
since it depends on lt9611uxc.. So, if you have rewording in mind feel free
to suggest it.
Or maybe something like this will look better:
and also failed initialisation of lontium lt9611uxc, gpu and dpu is observed:
(kernel trace as in the original email)
[..]
>
> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
>
> I'd also propose:
>
> Fixes: 3581b7062cec ("drm/msm/disp/dpu1: add support for display on SM6115")
>
> This way this is going to be fixed for all platforms using display on
> SM6115.
Yes. Thanks. Checkpatch suggested "Fixes" tag but it was unclear when it
started to horribly fail during boot -- sometime around 6.14 or 6.15 cycle.
Best regards,
Alexey
© 2016 - 2025 Red Hat, Inc.