On Pixel 6 (and Pro), a MAX77759 companion PMIC for USB Type-C
applications is used, which contains four functional blocks (at
distinct I2C addresses):
* top (including GPIO & NVMEM)
* charger
* fuel gauge
* TCPCi
This change adds the PMIC and the subnodes for the GPIO expander and
NVMEM, and defines the NVMEM layout.
The NVMEM layout is declared such that it matches downstream's
open-coded configuration [1].
Note:
The pinctrl nodes are kept sorted by the 'samsung,pins' property rather
than node name, as I think that makes it easier to look at and to add
new nodes unambiguously in the future. Its label is prefixed with 'if'
(for interface), because there are three PMICs in total in use on
Pixel 6 (Pro).
Link: https://android.googlesource.com/kernel/google-modules/bms/+/96e729a83817/max77759_maxq.c#67 [1]
Signed-off-by: André Draszik <andre.draszik@linaro.org>
---
v2:
- update commit message slightly
---
.../boot/dts/exynos/google/gs101-pixel-common.dtsi | 61 ++++++++++++++++++++++
1 file changed, 61 insertions(+)
diff --git a/arch/arm64/boot/dts/exynos/google/gs101-pixel-common.dtsi b/arch/arm64/boot/dts/exynos/google/gs101-pixel-common.dtsi
index d6ddcc13f7b20c6dfbe92e86abafe965870d0c78..de5c8d236b705505c0745827c5c6b67d94ba6227 100644
--- a/arch/arm64/boot/dts/exynos/google/gs101-pixel-common.dtsi
+++ b/arch/arm64/boot/dts/exynos/google/gs101-pixel-common.dtsi
@@ -188,6 +188,60 @@ usbc0_role_sw: endpoint {
};
};
};
+
+ pmic@66 {
+ compatible = "maxim,max77759";
+ reg = <0x66>;
+
+ pinctrl-0 = <&if_pmic_int>;
+ pinctrl-names = "default";
+ interrupts-extended = <&gpa8 3 IRQ_TYPE_LEVEL_LOW>;
+
+ interrupt-controller;
+ #interrupt-cells = <2>;
+
+ gpio {
+ compatible = "maxim,max77759-gpio";
+
+ gpio-controller;
+ #gpio-cells = <2>;
+ /*
+ * "Human-readable name [SIGNAL_LABEL]" where the
+ * latter comes from the schematic
+ */
+ gpio-line-names = "OTG boost [OTG_BOOST_EN]",
+ "max20339 IRQ [MW_OVP_INT_L]";
+
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ };
+
+ nvmem-0 {
+ compatible = "maxim,max77759-nvmem";
+
+ nvmem-layout {
+ compatible = "fixed-layout";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ reboot-mode@0 {
+ reg = <0x0 0x4>;
+ };
+
+ boot-reason@4 {
+ reg = <0x4 0x4>;
+ };
+
+ shutdown-user-flag@8 {
+ reg = <0x8 0x1>;
+ };
+
+ rsoc@a {
+ reg = <0xa 0x2>;
+ };
+ };
+ };
+ };
};
&pinctrl_far_alive {
@@ -211,6 +265,13 @@ typec_int: typec-int-pins {
samsung,pin-pud = <GS101_PIN_PULL_UP>;
samsung,pin-drv = <GS101_PIN_DRV_2_5_MA>;
};
+
+ if_pmic_int: if-pmic-int-pins {
+ samsung,pins = "gpa8-3";
+ samsung,pin-function = <GS101_PIN_FUNC_EINT>;
+ samsung,pin-pud = <GS101_PIN_PULL_UP>;
+ samsung,pin-drv = <GS101_PIN_DRV_2_5_MA>;
+ };
};
&pinctrl_gpio_alive {
--
2.49.0.1151.ga128411c76-goog
On 24/05/2025 07:21, André Draszik wrote:
> +
> + gpio {
> + compatible = "maxim,max77759-gpio";
> +
> + gpio-controller;
> + #gpio-cells = <2>;
> + /*
> + * "Human-readable name [SIGNAL_LABEL]" where the
> + * latter comes from the schematic
> + */
> + gpio-line-names = "OTG boost [OTG_BOOST_EN]",
> + "max20339 IRQ [MW_OVP_INT_L]";
> +
> + interrupt-controller;
> + #interrupt-cells = <2>;
> + };
> +
> + nvmem-0 {
Why is this called nvmem-0, not nvmem? Is there nvmem-1? I see binding
does it, but why?
Best regards,
Krzysztof
Hi Krzysztof,
On Thu, 2025-06-26 at 21:49 +0200, Krzysztof Kozlowski wrote:
> On 24/05/2025 07:21, André Draszik wrote:
> > +
> > + gpio {
> > + compatible = "maxim,max77759-gpio";
> > +
> > + gpio-controller;
> > + #gpio-cells = <2>;
> > + /*
> > + * "Human-readable name [SIGNAL_LABEL]" where the
> > + * latter comes from the schematic
> > + */
> > + gpio-line-names = "OTG boost [OTG_BOOST_EN]",
> > + "max20339 IRQ [MW_OVP_INT_L]";
> > +
> > + interrupt-controller;
> > + #interrupt-cells = <2>;
> > + };
> > +
> > + nvmem-0 {
>
> Why is this called nvmem-0, not nvmem? Is there nvmem-1? I see binding
> does it, but why?
'nvmem' is used/declared by nvmem-consumer.yaml as a phandle array
already so using just 'nvmem' fails validation:
Documentation/devicetree/bindings/mfd/maxim,max77759.example.dtb: pmic@66: nvmem: {'compatible': ['maxim,max77759-nvmem'], 'nvmem-
layout': {'compatible': ['fixed-layout'], '#address-cells': 1, '#size-cells': 1, 'reboot-mode@0': {'reg': [[0, 4]]}, 'boot-reason@4':
{'reg': [[4, 4]]}, 'shutdown-user-flag@8': {'reg': [[8, 1]]}, 'rsoc@10': {'reg': [[10, 2]]}}} is not of type 'array'
from schema $id: http://devicetree.org/schemas/nvmem/nvmem-consumer.yaml#
https://lore.kernel.org/all/20250226-max77759-mfd-v2-3-a65ebe2bc0a9@linaro.org/
Cheers,
Andre'
On 27/06/2025 10:54, André Draszik wrote:
> Hi Krzysztof,
>
> On Thu, 2025-06-26 at 21:49 +0200, Krzysztof Kozlowski wrote:
>> On 24/05/2025 07:21, André Draszik wrote:
>>> +
>>> + gpio {
>>> + compatible = "maxim,max77759-gpio";
>>> +
>>> + gpio-controller;
>>> + #gpio-cells = <2>;
>>> + /*
>>> + * "Human-readable name [SIGNAL_LABEL]" where the
>>> + * latter comes from the schematic
>>> + */
>>> + gpio-line-names = "OTG boost [OTG_BOOST_EN]",
>>> + "max20339 IRQ [MW_OVP_INT_L]";
>>> +
>>> + interrupt-controller;
>>> + #interrupt-cells = <2>;
>>> + };
>>> +
>>> + nvmem-0 {
>>
>> Why is this called nvmem-0, not nvmem? Is there nvmem-1? I see binding
>> does it, but why?
>
> 'nvmem' is used/declared by nvmem-consumer.yaml as a phandle array
> already so using just 'nvmem' fails validation:
>
> Documentation/devicetree/bindings/mfd/maxim,max77759.example.dtb: pmic@66: nvmem: {'compatible': ['maxim,max77759-nvmem'], 'nvmem-
> layout': {'compatible': ['fixed-layout'], '#address-cells': 1, '#size-cells': 1, 'reboot-mode@0': {'reg': [[0, 4]]}, 'boot-reason@4':
> {'reg': [[4, 4]]}, 'shutdown-user-flag@8': {'reg': [[8, 1]]}, 'rsoc@10': {'reg': [[10, 2]]}}} is not of type 'array'
> from schema $id: http://devicetree.org/schemas/nvmem/nvmem-consumer.yaml#
>
> https://lore.kernel.org/all/20250226-max77759-mfd-v2-3-a65ebe2bc0a9@linaro.org/
Heh, this should have been just folded into the parent as Rob suggested
during v2. Well, let's just merge it.
Best regards,
Krzysztof
On Fri, 2025-06-27 at 11:12 +0200, Krzysztof Kozlowski wrote:
> On 27/06/2025 10:54, André Draszik wrote:
> > Hi Krzysztof,
> >
> > On Thu, 2025-06-26 at 21:49 +0200, Krzysztof Kozlowski wrote:
> > > On 24/05/2025 07:21, André Draszik wrote:
> > > > +
> > > > + gpio {
> > > > + compatible = "maxim,max77759-gpio";
> > > > +
> > > > + gpio-controller;
> > > > + #gpio-cells = <2>;
> > > > + /*
> > > > + * "Human-readable name [SIGNAL_LABEL]" where the
> > > > + * latter comes from the schematic
> > > > + */
> > > > + gpio-line-names = "OTG boost [OTG_BOOST_EN]",
> > > > + "max20339 IRQ [MW_OVP_INT_L]";
> > > > +
> > > > + interrupt-controller;
> > > > + #interrupt-cells = <2>;
> > > > + };
> > > > +
> > > > + nvmem-0 {
> > >
> > > Why is this called nvmem-0, not nvmem? Is there nvmem-1? I see binding
> > > does it, but why?
> >
> > 'nvmem' is used/declared by nvmem-consumer.yaml as a phandle array
> > already so using just 'nvmem' fails validation:
> >
> > Documentation/devicetree/bindings/mfd/maxim,max77759.example.dtb: pmic@66: nvmem: {'compatible': ['maxim,max77759-nvmem'], 'nvmem-
> > layout': {'compatible': ['fixed-layout'], '#address-cells': 1, '#size-cells': 1, 'reboot-mode@0': {'reg': [[0, 4]]},
> > 'boot-reason@4':
> > {'reg': [[4, 4]]}, 'shutdown-user-flag@8': {'reg': [[8, 1]]}, 'rsoc@10': {'reg': [[10, 2]]}}} is not of type 'array'
> > from schema $id: http://devicetree.org/schemas/nvmem/nvmem-consumer.yaml#
> >
> > https://lore.kernel.org/all/20250226-max77759-mfd-v2-3-a65ebe2bc0a9@linaro.org/
> Heh, this should have been just folded into the parent as Rob suggested
> during v2
AFAICS and remember, the other discussion was about gpio properties only,
nothing about nvmem. And I addressed all gpio related comments I believe.
> Well, let's just merge it.
Thanks Krzysztof.
Cheers,
Andre'
On Sat, 24 May 2025 at 06:21, André Draszik <andre.draszik@linaro.org> wrote: > > On Pixel 6 (and Pro), a MAX77759 companion PMIC for USB Type-C > applications is used, which contains four functional blocks (at > distinct I2C addresses): > * top (including GPIO & NVMEM) > * charger > * fuel gauge > * TCPCi > > This change adds the PMIC and the subnodes for the GPIO expander and > NVMEM, and defines the NVMEM layout. > > The NVMEM layout is declared such that it matches downstream's > open-coded configuration [1]. > > Note: > The pinctrl nodes are kept sorted by the 'samsung,pins' property rather > than node name, as I think that makes it easier to look at and to add > new nodes unambiguously in the future. Its label is prefixed with 'if' > (for interface), because there are three PMICs in total in use on > Pixel 6 (Pro). > > Link: https://android.googlesource.com/kernel/google-modules/bms/+/96e729a83817/max77759_maxq.c#67 [1] > Signed-off-by: André Draszik <andre.draszik@linaro.org> > > --- Reviewed-by: Peter Griffin <peter.griffin@linaro.org>
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