Add level shifter support for qualcomm SOC's.

- Changed from v1
    - As suggested by Krzysztof Kozlowski redesigned logic to use
    compatible property for adding this level shifter support.
    - Addressed Adrian Hunter comments on V1 with resepect to
      checkpatch.
    - Cleared the bits first and then set bits in
      sdhci_msm_execute_tuning as suggested by Adrian Hunter.
    - Upated the if condition logic in msm_set_clock_rate_for_bus_mode
      as suggested by Adrian Hunter.

Sarthak Garg (3):
  mmc: sdhci-msm: Enable tuning for SDR50 mode for SD card
  mmc: sdhci-msm: Limit HS mode frequency to 37.5MHz
  arm64: dts: qcom: sm8550: Remove SDR104/SDR50 broken caps

 arch/arm64/boot/dts/qcom/sm8550.dtsi |  3 ---
 drivers/mmc/host/sdhci-msm.c         | 34 ++++++++++++++++++++++++++++
 2 files changed, 34 insertions(+), 3 deletions(-)

-- 
2.17.1

On 5/23/25 12:57 PM, Sarthak Garg wrote:
> Add level shifter support for qualcomm SOC's.
> 
> - Changed from v1
>     - As suggested by Krzysztof Kozlowski redesigned logic to use
>     compatible property for adding this level shifter support.
>     - Addressed Adrian Hunter comments on V1 with resepect to
>       checkpatch.
>     - Cleared the bits first and then set bits in
>       sdhci_msm_execute_tuning as suggested by Adrian Hunter.
>     - Upated the if condition logic in msm_set_clock_rate_for_bus_mode
>       as suggested by Adrian Hunter.

During internal review I suggested we could introduce a generic quirk,
perhaps called "max-hs-frequency" which would update this
currently-constant value:

---------------- drivers/mmc/core/sd.c ----------------
if (status[13] & SD_MODE_HIGH_SPEED)
	card->sw_caps.hs_max_dtr = HIGH_SPEED_MAX_DTR;
-------------------------------------------------------

(50 MHz)

which I believe is where it comes from

Konrad

On 5/23/2025 11:55 PM, Konrad Dybcio wrote:
> On 5/23/25 12:57 PM, Sarthak Garg wrote:
>> Add level shifter support for qualcomm SOC's.
>>
>> - Changed from v1
>>      - As suggested by Krzysztof Kozlowski redesigned logic to use
>>      compatible property for adding this level shifter support.
>>      - Addressed Adrian Hunter comments on V1 with resepect to
>>        checkpatch.
>>      - Cleared the bits first and then set bits in
>>        sdhci_msm_execute_tuning as suggested by Adrian Hunter.
>>      - Upated the if condition logic in msm_set_clock_rate_for_bus_mode
>>        as suggested by Adrian Hunter.
> 
> During internal review I suggested we could introduce a generic quirk,
> perhaps called "max-hs-frequency" which would update this
> currently-constant value:
> 
> ---------------- drivers/mmc/core/sd.c ----------------
> if (status[13] & SD_MODE_HIGH_SPEED)
> 	card->sw_caps.hs_max_dtr = HIGH_SPEED_MAX_DTR;
> -------------------------------------------------------
> 
> (50 MHz)
> 
> which I believe is where it comes from
> 
> Konrad

Sure will introduce a new dtsi flag "max-sd-uhs-frequency" and update 
this hs_max_dtr value in V3.

On Fri, 23 May 2025 at 20:25, Konrad Dybcio
<konrad.dybcio@oss.qualcomm.com> wrote:
>
> On 5/23/25 12:57 PM, Sarthak Garg wrote:
> > Add level shifter support for qualcomm SOC's.
> >
> > - Changed from v1
> >     - As suggested by Krzysztof Kozlowski redesigned logic to use
> >     compatible property for adding this level shifter support.
> >     - Addressed Adrian Hunter comments on V1 with resepect to
> >       checkpatch.
> >     - Cleared the bits first and then set bits in
> >       sdhci_msm_execute_tuning as suggested by Adrian Hunter.
> >     - Upated the if condition logic in msm_set_clock_rate_for_bus_mode
> >       as suggested by Adrian Hunter.
>
> During internal review I suggested we could introduce a generic quirk,
> perhaps called "max-hs-frequency" which would update this
> currently-constant value:
>
> ---------------- drivers/mmc/core/sd.c ----------------
> if (status[13] & SD_MODE_HIGH_SPEED)
>         card->sw_caps.hs_max_dtr = HIGH_SPEED_MAX_DTR;
> -------------------------------------------------------
>
> (50 MHz)
>
> which I believe is where it comes from

I agree that a DT property for the mmc controller would make sense.

Although, this seems limited to SD UHS-I speed modes, so perhaps
"max-sd-uhs-frequency" would be a better name for it?

Kind regards
Uffe

On 5/27/2025 8:05 PM, Ulf Hansson wrote:
> On Fri, 23 May 2025 at 20:25, Konrad Dybcio
> <konrad.dybcio@oss.qualcomm.com> wrote:
>>
>> On 5/23/25 12:57 PM, Sarthak Garg wrote:
>>> Add level shifter support for qualcomm SOC's.
>>>
>>> - Changed from v1
>>>      - As suggested by Krzysztof Kozlowski redesigned logic to use
>>>      compatible property for adding this level shifter support.
>>>      - Addressed Adrian Hunter comments on V1 with resepect to
>>>        checkpatch.
>>>      - Cleared the bits first and then set bits in
>>>        sdhci_msm_execute_tuning as suggested by Adrian Hunter.
>>>      - Upated the if condition logic in msm_set_clock_rate_for_bus_mode
>>>        as suggested by Adrian Hunter.
>>
>> During internal review I suggested we could introduce a generic quirk,
>> perhaps called "max-hs-frequency" which would update this
>> currently-constant value:
>>
>> ---------------- drivers/mmc/core/sd.c ----------------
>> if (status[13] & SD_MODE_HIGH_SPEED)
>>          card->sw_caps.hs_max_dtr = HIGH_SPEED_MAX_DTR;
>> -------------------------------------------------------
>>
>> (50 MHz)
>>
>> which I believe is where it comes from
> 
> I agree that a DT property for the mmc controller would make sense.
> 
> Although, this seems limited to SD UHS-I speed modes, so perhaps
> "max-sd-uhs-frequency" would be a better name for it?
> 
> Kind regards
> Uffe

Sure will update this logic in V3.