From: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
The TBU clock belongs to the Translation Buffer Unit, part of the SMMU.
The ref clock is already being driven upstream through some of the
branches.
Signed-off-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
---
.../devicetree/bindings/pci/qcom,pcie-sc8180x.yaml | 14 ++++----------
1 file changed, 4 insertions(+), 10 deletions(-)
diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie-sc8180x.yaml b/Documentation/devicetree/bindings/pci/qcom,pcie-sc8180x.yaml
index 331fc25d7a17d657d4db3863f0c538d0e44dc840..34a4d7b2c8459aeb615736f54c1971014adb205f 100644
--- a/Documentation/devicetree/bindings/pci/qcom,pcie-sc8180x.yaml
+++ b/Documentation/devicetree/bindings/pci/qcom,pcie-sc8180x.yaml
@@ -33,8 +33,8 @@ properties:
- const: mhi # MHI registers
clocks:
- minItems: 8
- maxItems: 8
+ minItems: 6
+ maxItems: 6
clock-names:
items:
@@ -44,8 +44,6 @@ properties:
- const: bus_master # Master AXI clock
- const: bus_slave # Slave AXI clock
- const: slave_q2a # Slave Q2A clock
- - const: ref # REFERENCE clock
- - const: tbu # PCIe TBU clock
interrupts:
minItems: 8
@@ -117,17 +115,13 @@ examples:
<&gcc GCC_PCIE_0_CFG_AHB_CLK>,
<&gcc GCC_PCIE_0_MSTR_AXI_CLK>,
<&gcc GCC_PCIE_0_SLV_AXI_CLK>,
- <&gcc GCC_PCIE_0_SLV_Q2A_AXI_CLK>,
- <&gcc GCC_PCIE_0_CLKREF_CLK>,
- <&gcc GCC_AGGRE_NOC_PCIE_TBU_CLK>;
+ <&gcc GCC_PCIE_0_SLV_Q2A_AXI_CLK>;
clock-names = "pipe",
"aux",
"cfg",
"bus_master",
"bus_slave",
- "slave_q2a",
- "ref",
- "tbu";
+ "slave_q2a";
dma-coherent;
--
2.49.0
+ Krishna On Wed, May 21, 2025 at 03:38:10PM +0200, Konrad Dybcio wrote: > From: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> > > The TBU clock belongs to the Translation Buffer Unit, part of the SMMU. > The ref clock is already being driven upstream through some of the > branches. > Can you please cross check with the hardware programming guide (I don't have access to atm) that the 'ref' clock is no longer voted by the driver? - Mani > Signed-off-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> > --- > .../devicetree/bindings/pci/qcom,pcie-sc8180x.yaml | 14 ++++---------- > 1 file changed, 4 insertions(+), 10 deletions(-) > > diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie-sc8180x.yaml b/Documentation/devicetree/bindings/pci/qcom,pcie-sc8180x.yaml > index 331fc25d7a17d657d4db3863f0c538d0e44dc840..34a4d7b2c8459aeb615736f54c1971014adb205f 100644 > --- a/Documentation/devicetree/bindings/pci/qcom,pcie-sc8180x.yaml > +++ b/Documentation/devicetree/bindings/pci/qcom,pcie-sc8180x.yaml > @@ -33,8 +33,8 @@ properties: > - const: mhi # MHI registers > > clocks: > - minItems: 8 > - maxItems: 8 > + minItems: 6 > + maxItems: 6 > > clock-names: > items: > @@ -44,8 +44,6 @@ properties: > - const: bus_master # Master AXI clock > - const: bus_slave # Slave AXI clock > - const: slave_q2a # Slave Q2A clock > - - const: ref # REFERENCE clock > - - const: tbu # PCIe TBU clock > > interrupts: > minItems: 8 > @@ -117,17 +115,13 @@ examples: > <&gcc GCC_PCIE_0_CFG_AHB_CLK>, > <&gcc GCC_PCIE_0_MSTR_AXI_CLK>, > <&gcc GCC_PCIE_0_SLV_AXI_CLK>, > - <&gcc GCC_PCIE_0_SLV_Q2A_AXI_CLK>, > - <&gcc GCC_PCIE_0_CLKREF_CLK>, > - <&gcc GCC_AGGRE_NOC_PCIE_TBU_CLK>; > + <&gcc GCC_PCIE_0_SLV_Q2A_AXI_CLK>; > clock-names = "pipe", > "aux", > "cfg", > "bus_master", > "bus_slave", > - "slave_q2a", > - "ref", > - "tbu"; > + "slave_q2a"; > > dma-coherent; > > > -- > 2.49.0 > -- மணிவண்ணன் சதாசிவம்
On Fri, Jun 13, 2025 at 02:43:38PM +0530, Manivannan Sadhasivam wrote: > + Krishna > > On Wed, May 21, 2025 at 03:38:10PM +0200, Konrad Dybcio wrote: > > From: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> > > > > The TBU clock belongs to the Translation Buffer Unit, part of the SMMU. > > The ref clock is already being driven upstream through some of the > > branches. > > > > Can you please cross check with the hardware programming guide (I don't have > access to atm) that the 'ref' clock is no longer voted by the driver? > CLKREF is required for PHY. Since it has been voted in PCIe PHY driver, omitting it here is reasonable. - Qiang Yu > - Mani > > > Signed-off-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> > > --- > > .../devicetree/bindings/pci/qcom,pcie-sc8180x.yaml | 14 ++++---------- > > 1 file changed, 4 insertions(+), 10 deletions(-) > > > > diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie-sc8180x.yaml b/Documentation/devicetree/bindings/pci/qcom,pcie-sc8180x.yaml > > index 331fc25d7a17d657d4db3863f0c538d0e44dc840..34a4d7b2c8459aeb615736f54c1971014adb205f 100644 > > --- a/Documentation/devicetree/bindings/pci/qcom,pcie-sc8180x.yaml > > +++ b/Documentation/devicetree/bindings/pci/qcom,pcie-sc8180x.yaml > > @@ -33,8 +33,8 @@ properties: > > - const: mhi # MHI registers > > > > clocks: > > - minItems: 8 > > - maxItems: 8 > > + minItems: 6 > > + maxItems: 6 > > > > clock-names: > > items: > > @@ -44,8 +44,6 @@ properties: > > - const: bus_master # Master AXI clock > > - const: bus_slave # Slave AXI clock > > - const: slave_q2a # Slave Q2A clock > > - - const: ref # REFERENCE clock > > - - const: tbu # PCIe TBU clock > > > > interrupts: > > minItems: 8 > > @@ -117,17 +115,13 @@ examples: > > <&gcc GCC_PCIE_0_CFG_AHB_CLK>, > > <&gcc GCC_PCIE_0_MSTR_AXI_CLK>, > > <&gcc GCC_PCIE_0_SLV_AXI_CLK>, > > - <&gcc GCC_PCIE_0_SLV_Q2A_AXI_CLK>, > > - <&gcc GCC_PCIE_0_CLKREF_CLK>, > > - <&gcc GCC_AGGRE_NOC_PCIE_TBU_CLK>; > > + <&gcc GCC_PCIE_0_SLV_Q2A_AXI_CLK>; > > clock-names = "pipe", > > "aux", > > "cfg", > > "bus_master", > > "bus_slave", > > - "slave_q2a", > > - "ref", > > - "tbu"; > > + "slave_q2a"; > > > > dma-coherent; > > > > > > -- > > 2.49.0 > > > > -- > மணிவண்ணன் சதாசிவம் >
On Wed, 21 May 2025 15:38:10 +0200, Konrad Dybcio wrote: > From: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> > > The TBU clock belongs to the Translation Buffer Unit, part of the SMMU. > The ref clock is already being driven upstream through some of the > branches. > > Signed-off-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> > --- > .../devicetree/bindings/pci/qcom,pcie-sc8180x.yaml | 14 ++++---------- > 1 file changed, 4 insertions(+), 10 deletions(-) > Acked-by: Rob Herring (Arm) <robh@kernel.org>
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