[PATCH v3] bus: mhi: host: fix endianness of BHI vector table

Alexander Wilhelm posted 1 patch 7 months ago
There is a newer version of this series
drivers/bus/mhi/host/boot.c     | 8 ++++----
drivers/bus/mhi/host/internal.h | 4 ++--
2 files changed, 6 insertions(+), 6 deletions(-)
[PATCH v3] bus: mhi: host: fix endianness of BHI vector table
Posted by Alexander Wilhelm 7 months ago
On big endian platform like PowerPC the MHI bus does not start properly. The
following example shows the error messages by using qcn9274 wireless radio
module with ath12k driver:

    ath12k_pci 0001:01:00.0: BAR 0: assigned [mem 0xc00000000-0xc001fffff 64bit]
    ath12k_pci 0001:01:00.0: MSI vectors: 1
    ath12k_pci 0001:01:00.0: Hardware name: qcn9274 hw2.0
    ath12k_pci 0001:01:00.0: failed to set mhi state: POWER_ON(2)
    ath12k_pci 0001:01:00.0: failed to start mhi: -110
    ath12k_pci 0001:01:00.0: failed to power up :-110
    ath12k_pci 0001:01:00.0: failed to create soc core: -110
    ath12k_pci 0001:01:00.0: failed to init core: -110
    ath12k_pci: probe of 0001:01:00.0 failed with error -110

Fix it by swapping DMA address and size of the BHI vector table.

Signed-off-by: Alexander Wilhelm <alexander.wilhelm@westermo.com>
Reviewed-by: Jeff Hugo <jeff.hugo@oss.qualcomm.com>
---
Changes in v2:
  - Set __le64 type for dma_addr and size.

Changes in v3:
  - Improve the clarity of the commit message.

 drivers/bus/mhi/host/boot.c     | 8 ++++----
 drivers/bus/mhi/host/internal.h | 4 ++--
 2 files changed, 6 insertions(+), 6 deletions(-)

diff --git a/drivers/bus/mhi/host/boot.c b/drivers/bus/mhi/host/boot.c
index efa3b6dddf4d..205d83ac069f 100644
--- a/drivers/bus/mhi/host/boot.c
+++ b/drivers/bus/mhi/host/boot.c
@@ -31,8 +31,8 @@ int mhi_rddm_prepare(struct mhi_controller *mhi_cntrl,
 	int ret;
 
 	for (i = 0; i < img_info->entries - 1; i++, mhi_buf++, bhi_vec++) {
-		bhi_vec->dma_addr = mhi_buf->dma_addr;
-		bhi_vec->size = mhi_buf->len;
+		bhi_vec->dma_addr = cpu_to_le64(mhi_buf->dma_addr);
+		bhi_vec->size = cpu_to_le64(mhi_buf->len);
 	}
 
 	dev_dbg(dev, "BHIe programming for RDDM\n");
@@ -431,8 +431,8 @@ static void mhi_firmware_copy_bhie(struct mhi_controller *mhi_cntrl,
 	while (remainder) {
 		to_cpy = min(remainder, mhi_buf->len);
 		memcpy(mhi_buf->buf, buf, to_cpy);
-		bhi_vec->dma_addr = mhi_buf->dma_addr;
-		bhi_vec->size = to_cpy;
+		bhi_vec->dma_addr = cpu_to_le64(mhi_buf->dma_addr);
+		bhi_vec->size = cpu_to_le64(to_cpy);
 
 		buf += to_cpy;
 		remainder -= to_cpy;
diff --git a/drivers/bus/mhi/host/internal.h b/drivers/bus/mhi/host/internal.h
index ce566f7d2e92..1dbc3f736161 100644
--- a/drivers/bus/mhi/host/internal.h
+++ b/drivers/bus/mhi/host/internal.h
@@ -25,8 +25,8 @@ struct mhi_ctxt {
 };
 
 struct bhi_vec_entry {
-	u64 dma_addr;
-	u64 size;
+	__le64 dma_addr;
+	__le64 size;
 };
 
 enum mhi_fw_load_type {
-- 
2.34.1
Re: [PATCH v3] bus: mhi: host: fix endianness of BHI vector table
Posted by Jeff Hugo 7 months ago
On 5/19/2025 12:10 AM, Alexander Wilhelm wrote:
> On big endian platform like PowerPC the MHI bus does not start properly. The
> following example shows the error messages by using qcn9274 wireless radio
> module with ath12k driver:
> 
>      ath12k_pci 0001:01:00.0: BAR 0: assigned [mem 0xc00000000-0xc001fffff 64bit]
>      ath12k_pci 0001:01:00.0: MSI vectors: 1
>      ath12k_pci 0001:01:00.0: Hardware name: qcn9274 hw2.0
>      ath12k_pci 0001:01:00.0: failed to set mhi state: POWER_ON(2)
>      ath12k_pci 0001:01:00.0: failed to start mhi: -110
>      ath12k_pci 0001:01:00.0: failed to power up :-110
>      ath12k_pci 0001:01:00.0: failed to create soc core: -110
>      ath12k_pci 0001:01:00.0: failed to init core: -110
>      ath12k_pci: probe of 0001:01:00.0 failed with error -110
> 
> Fix it by swapping DMA address and size of the BHI vector table.
> 
> Signed-off-by: Alexander Wilhelm <alexander.wilhelm@westermo.com>
> Reviewed-by: Jeff Hugo <jeff.hugo@oss.qualcomm.com>

Shouldn't there be a fixes tag?  Probably pointing to one of the 
original MHI commits given what this change is touching.

-Jeff
Re: [PATCH v3] bus: mhi: host: fix endianness of BHI vector table
Posted by Alexander Wilhelm 7 months ago
Am Mon, May 19, 2025 at 08:13:00AM -0600 schrieb Jeff Hugo:
> On 5/19/2025 12:10 AM, Alexander Wilhelm wrote:
> > On big endian platform like PowerPC the MHI bus does not start properly. The
> > following example shows the error messages by using qcn9274 wireless radio
> > module with ath12k driver:
> > 
> >      ath12k_pci 0001:01:00.0: BAR 0: assigned [mem 0xc00000000-0xc001fffff 64bit]
> >      ath12k_pci 0001:01:00.0: MSI vectors: 1
> >      ath12k_pci 0001:01:00.0: Hardware name: qcn9274 hw2.0
> >      ath12k_pci 0001:01:00.0: failed to set mhi state: POWER_ON(2)
> >      ath12k_pci 0001:01:00.0: failed to start mhi: -110
> >      ath12k_pci 0001:01:00.0: failed to power up :-110
> >      ath12k_pci 0001:01:00.0: failed to create soc core: -110
> >      ath12k_pci 0001:01:00.0: failed to init core: -110
> >      ath12k_pci: probe of 0001:01:00.0 failed with error -110
> > 
> > Fix it by swapping DMA address and size of the BHI vector table.
> > 
> > Signed-off-by: Alexander Wilhelm <alexander.wilhelm@westermo.com>
> > Reviewed-by: Jeff Hugo <jeff.hugo@oss.qualcomm.com>
> 
> Shouldn't there be a fixes tag?  Probably pointing to one of the original
> MHI commits given what this change is touching.
> 
> -Jeff

Thank you for supporting me. I will add that in the next patch version. This
patch fixes 3 different origin commits. I would take the first one, where
bhi_vec_entry was first introducted. The following 2 commits are only follow up
errors.

Best regards
Alexander Wilhelm