From: Chaoyi Chen <chaoyi.chen@rock-chips.com>
Convert cdn-dp-rockchip.txt to yaml.
Add port@1 which represents the CDN DP output to keep the same style
as the other display interfaces.
Signed-off-by: Chaoyi Chen <chaoyi.chen@rock-chips.com>
---
Changes in v4:
- Add commit about port@1 node
Changes in v3:
- Add more description about phy/extcon
- Fix some coding style
Changes in v2:
- Rename binding file name to match compatible
- Add more description about grf/phy/extcon
- Fix coding style
.../display/rockchip/cdn-dp-rockchip.txt | 74 --------
.../rockchip/rockchip,rk3399-cdn-dp.yaml | 165 ++++++++++++++++++
2 files changed, 165 insertions(+), 74 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/display/rockchip/cdn-dp-rockchip.txt
create mode 100644 Documentation/devicetree/bindings/display/rockchip/rockchip,rk3399-cdn-dp.yaml
diff --git a/Documentation/devicetree/bindings/display/rockchip/cdn-dp-rockchip.txt b/Documentation/devicetree/bindings/display/rockchip/cdn-dp-rockchip.txt
deleted file mode 100644
index 8df7d2e393d6..000000000000
--- a/Documentation/devicetree/bindings/display/rockchip/cdn-dp-rockchip.txt
+++ /dev/null
@@ -1,74 +0,0 @@
-Rockchip RK3399 specific extensions to the cdn Display Port
-================================
-
-Required properties:
-- compatible: must be "rockchip,rk3399-cdn-dp"
-
-- reg: physical base address of the controller and length
-
-- clocks: from common clock binding: handle to dp clock.
-
-- clock-names: from common clock binding:
- Required elements: "core-clk" "pclk" "spdif" "grf"
-
-- resets : a list of phandle + reset specifier pairs
-- reset-names : string of reset names
- Required elements: "apb", "core", "dptx", "spdif"
-- power-domains : power-domain property defined with a phandle
- to respective power domain.
-- assigned-clocks: main clock, should be <&cru SCLK_DP_CORE>
-- assigned-clock-rates : the DP core clk frequency, shall be: 100000000
-
-- rockchip,grf: this soc should set GRF regs, so need get grf here.
-
-- ports: contain a port nodes with endpoint definitions as defined in
- Documentation/devicetree/bindings/media/video-interfaces.txt.
- contained 2 endpoints, connecting to the output of vop.
-
-- phys: from general PHY binding: the phandle for the PHY device.
-
-- extcon: extcon specifier for the Power Delivery
-
-- #sound-dai-cells = it must be 1 if your system is using 2 DAIs: I2S, SPDIF
-
--------------------------------------------------------------------------------
-
-Example:
- cdn_dp: dp@fec00000 {
- compatible = "rockchip,rk3399-cdn-dp";
- reg = <0x0 0xfec00000 0x0 0x100000>;
- interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cru SCLK_DP_CORE>, <&cru PCLK_DP_CTRL>,
- <&cru SCLK_SPDIF_REC_DPTX>, <&cru PCLK_VIO_GRF>;
- clock-names = "core-clk", "pclk", "spdif", "grf";
- assigned-clocks = <&cru SCLK_DP_CORE>;
- assigned-clock-rates = <100000000>;
- power-domains = <&power RK3399_PD_HDCP>;
- phys = <&tcphy0_dp>, <&tcphy1_dp>;
- resets = <&cru SRST_DPTX_SPDIF_REC>;
- reset-names = "spdif";
- extcon = <&fusb0>, <&fusb1>;
- rockchip,grf = <&grf>;
- #address-cells = <1>;
- #size-cells = <0>;
- #sound-dai-cells = <1>;
-
- ports {
- #address-cells = <1>;
- #size-cells = <0>;
-
- dp_in: port {
- #address-cells = <1>;
- #size-cells = <0>;
- dp_in_vopb: endpoint@0 {
- reg = <0>;
- remote-endpoint = <&vopb_out_dp>;
- };
-
- dp_in_vopl: endpoint@1 {
- reg = <1>;
- remote-endpoint = <&vopl_out_dp>;
- };
- };
- };
- };
diff --git a/Documentation/devicetree/bindings/display/rockchip/rockchip,rk3399-cdn-dp.yaml b/Documentation/devicetree/bindings/display/rockchip/rockchip,rk3399-cdn-dp.yaml
new file mode 100644
index 000000000000..7c2225204de2
--- /dev/null
+++ b/Documentation/devicetree/bindings/display/rockchip/rockchip,rk3399-cdn-dp.yaml
@@ -0,0 +1,165 @@
+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/display/rockchip/rockchip,rk3399-cdn-dp.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Rockchip RK3399 specific extensions to the CDN Display Port
+
+maintainers:
+ - Andy Yan <andy.yan@rock-chip.com>
+ - Heiko Stuebner <heiko@sntech.de>
+ - Sandy Huang <hjc@rock-chips.com>
+
+allOf:
+ - $ref: /schemas/sound/dai-common.yaml#
+
+properties:
+ compatible:
+ items:
+ - const: rockchip,rk3399-cdn-dp
+
+ reg:
+ maxItems: 1
+
+ clocks:
+ items:
+ - description: DP core work clock
+ - description: APB clock
+ - description: SPDIF interface clock
+ - description: GRF clock
+
+ clock-names:
+ items:
+ - const: core-clk
+ - const: pclk
+ - const: spdif
+ - const: grf
+
+ extcon:
+ $ref: /schemas/types.yaml#/definitions/phandle-array
+ items:
+ maxItems: 1
+ maxItems: 2
+ description:
+ List of phandle to the extcon device providing the cable state for the DP PHY.
+
+ interrupts:
+ maxItems: 1
+
+ phys:
+ items:
+ maxItems: 1
+ maxItems: 2
+ description: |
+ List of phandle to the PHY device for DP output.
+ RK3399 have two DP-TPYEC PHY, specifying one PHY which want to use,
+ or specify two PHYs here to let the driver determine which PHY to use.
+
+ ports:
+ $ref: /schemas/graph.yaml#/properties/ports
+
+ properties:
+ port@0:
+ $ref: /schemas/graph.yaml#/properties/port
+ description: Input of the CDN DP
+ properties:
+ endpoint@0:
+ description: Connection to the VOPB
+ endpoint@1:
+ description: Connection to the VOPL
+ port@1:
+ $ref: /schemas/graph.yaml#/properties/port
+ description: Output of the CDN DP
+
+ required:
+ - port@0
+ - port@1
+
+ power-domains:
+ maxItems: 1
+
+ resets:
+ maxItems: 4
+
+ reset-names:
+ items:
+ - const: spdif
+ - const: dptx
+ - const: apb
+ - const: core
+
+ rockchip,grf:
+ $ref: /schemas/types.yaml#/definitions/phandle
+ description:
+ Phandle to GRF register to control HPD.
+
+ "#sound-dai-cells":
+ const: 1
+
+required:
+ - compatible
+ - reg
+ - clocks
+ - clock-names
+ - interrupts
+ - phys
+ - ports
+ - resets
+ - reset-names
+ - rockchip,grf
+
+unevaluatedProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/clock/rk3399-cru.h>
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+ #include <dt-bindings/power/rk3399-power.h>
+ soc {
+ #address-cells = <2>;
+ #size-cells = <2>;
+
+ dp@fec00000 {
+ compatible = "rockchip,rk3399-cdn-dp";
+ reg = <0x0 0xfec00000 0x0 0x100000>;
+ assigned-clocks = <&cru SCLK_DP_CORE>;
+ assigned-clock-rates = <100000000>;
+ interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cru SCLK_DP_CORE>, <&cru PCLK_DP_CTRL>, <&cru SCLK_SPDIF_REC_DPTX>,
+ <&cru PCLK_VIO_GRF>;
+ clock-names = "core-clk", "pclk", "spdif", "grf";
+ power-domains = <&power RK3399_PD_HDCP>;
+ phys = <&tcphy0_dp>, <&tcphy1_dp>;
+ resets = <&cru SRST_DPTX_SPDIF_REC>, <&cru SRST_P_UPHY0_DPTX>,
+ <&cru SRST_P_UPHY0_APB>, <&cru SRST_DP_CORE>;
+ reset-names = "spdif", "dptx", "apb", "core";
+ rockchip,grf = <&grf>;
+ #sound-dai-cells = <1>;
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ dp_in: port@0 {
+ reg = <0>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ dp_in_vopb: endpoint@0 {
+ reg = <0>;
+ remote-endpoint = <&vopb_out_dp>;
+ };
+
+ dp_in_vopl: endpoint@1 {
+ reg = <1>;
+ remote-endpoint = <&vopl_out_dp>;
+ };
+ };
+
+ dp_out: port@1 {
+ reg = <1>;
+ };
+ };
+ };
+ };
--
2.49.0On 19/05/2025 03:26, Chaoyi Chen wrote: > +maintainers: > + - Andy Yan <andy.yan@rock-chip.com> > + - Heiko Stuebner <heiko@sntech.de> > + - Sandy Huang <hjc@rock-chips.com> > + > +allOf: > + - $ref: /schemas/sound/dai-common.yaml# > + > +properties: > + compatible: > + items: > + - const: rockchip,rk3399-cdn-dp > + > + reg: > + maxItems: 1 > + > + clocks: > + items: > + - description: DP core work clock > + - description: APB clock > + - description: SPDIF interface clock > + - description: GRF clock > + > + clock-names: > + items: > + - const: core-clk > + - const: pclk > + - const: spdif > + - const: grf > + > + extcon: > + $ref: /schemas/types.yaml#/definitions/phandle-array > + items: > + maxItems: 1 > + maxItems: 2 Instead of this, list the items. Old binding said only "specifier", so this is technically a change, which should be explained in commit msg. > + description: > + List of phandle to the extcon device providing the cable state for the DP PHY. > + > + interrupts: > + maxItems: 1 > + > + phys: > + items: > + maxItems: 1 > + maxItems: 2 > + description: | > + List of phandle to the PHY device for DP output. > + RK3399 have two DP-TPYEC PHY, specifying one PHY which want to use, > + or specify two PHYs here to let the driver determine which PHY to use. You do not allow one phy, so your description is not accurate. OTOH, original binding did not allow two phandles, so that's another change in the binding. You need to document all changes done to the binding in the commit msg. > + > + ports: > + $ref: /schemas/graph.yaml#/properties/ports > + > + properties: > + port@0: > + $ref: /schemas/graph.yaml#/properties/port > + description: Input of the CDN DP > + properties: > + endpoint@0: > + description: Connection to the VOPB > + endpoint@1: > + description: Connection to the VOPL > + port@1: > + $ref: /schemas/graph.yaml#/properties/port > + description: Output of the CDN DP > + > + required: > + - port@0 > + - port@1 > + > + power-domains: > + maxItems: 1 > + > + resets: > + maxItems: 4 > + > + reset-names: > + items: > + - const: spdif > + - const: dptx > + - const: apb > + - const: core > + > + rockchip,grf: > + $ref: /schemas/types.yaml#/definitions/phandle > + description: > + Phandle to GRF register to control HPD. > + > + "#sound-dai-cells": > + const: 1 > + > +required: > + - compatible > + - reg > + - clocks > + - clock-names > + - interrupts > + - phys > + - ports > + - resets > + - reset-names > + - rockchip,grf sound-dai-cells was a required property. Best regards, Krzysztof
Hi Krzysztof, On 2025/5/19 14:16, Krzysztof Kozlowski wrote: > On 19/05/2025 03:26, Chaoyi Chen wrote: >> +maintainers: >> + - Andy Yan <andy.yan@rock-chip.com> >> + - Heiko Stuebner <heiko@sntech.de> >> + - Sandy Huang <hjc@rock-chips.com> >> + >> +allOf: >> + - $ref: /schemas/sound/dai-common.yaml# >> + >> +properties: >> + compatible: >> + items: >> + - const: rockchip,rk3399-cdn-dp >> + >> + reg: >> + maxItems: 1 >> + >> + clocks: >> + items: >> + - description: DP core work clock >> + - description: APB clock >> + - description: SPDIF interface clock >> + - description: GRF clock >> + >> + clock-names: >> + items: >> + - const: core-clk >> + - const: pclk >> + - const: spdif >> + - const: grf >> + >> + extcon: >> + $ref: /schemas/types.yaml#/definitions/phandle-array >> + items: >> + maxItems: 1 >> + maxItems: 2 > Instead of this, list the items. Old binding said only "specifier", so > this is technically a change, which should be explained in commit msg. Will fix in v5. > >> + description: >> + List of phandle to the extcon device providing the cable state for the DP PHY. >> + >> + interrupts: >> + maxItems: 1 >> + >> + phys: >> + items: >> + maxItems: 1 >> + maxItems: 2 >> + description: | >> + List of phandle to the PHY device for DP output. >> + RK3399 have two DP-TPYEC PHY, specifying one PHY which want to use, >> + or specify two PHYs here to let the driver determine which PHY to use. > > You do not allow one phy, so your description is not accurate. OTOH, > original binding did not allow two phandles, so that's another change in > the binding. You need to document all changes done to the binding in the > commit msg. Oh, the original binding example use two phandles. I think only one PHY can also pass the dtb check here, or maybe I'm missing something else? > >> + >> + ports: >> + $ref: /schemas/graph.yaml#/properties/ports >> + >> + properties: >> + port@0: >> + $ref: /schemas/graph.yaml#/properties/port >> + description: Input of the CDN DP >> + properties: >> + endpoint@0: >> + description: Connection to the VOPB >> + endpoint@1: >> + description: Connection to the VOPL >> + port@1: >> + $ref: /schemas/graph.yaml#/properties/port >> + description: Output of the CDN DP >> + >> + required: >> + - port@0 >> + - port@1 >> + >> + power-domains: >> + maxItems: 1 >> + >> + resets: >> + maxItems: 4 >> + >> + reset-names: >> + items: >> + - const: spdif >> + - const: dptx >> + - const: apb >> + - const: core >> + >> + rockchip,grf: >> + $ref: /schemas/types.yaml#/definitions/phandle >> + description: >> + Phandle to GRF register to control HPD. >> + >> + "#sound-dai-cells": >> + const: 1 >> + >> +required: >> + - compatible >> + - reg >> + - clocks >> + - clock-names >> + - interrupts >> + - phys >> + - ports >> + - resets >> + - reset-names >> + - rockchip,grf > > sound-dai-cells was a required property. > Okay, will add in v5.
On Mon, May 19, 2025 at 02:56:03PM GMT, Chaoyi Chen wrote: > Hi Krzysztof, > > On 2025/5/19 14:16, Krzysztof Kozlowski wrote: > > On 19/05/2025 03:26, Chaoyi Chen wrote: > > > +maintainers: > > > + - Andy Yan <andy.yan@rock-chip.com> > > > + - Heiko Stuebner <heiko@sntech.de> > > > + - Sandy Huang <hjc@rock-chips.com> > > > + > > > +allOf: > > > + - $ref: /schemas/sound/dai-common.yaml# > > > + > > > +properties: > > > + compatible: > > > + items: > > > + - const: rockchip,rk3399-cdn-dp > > > + > > > + reg: > > > + maxItems: 1 > > > + > > > + clocks: > > > + items: > > > + - description: DP core work clock > > > + - description: APB clock > > > + - description: SPDIF interface clock > > > + - description: GRF clock > > > + > > > + clock-names: > > > + items: > > > + - const: core-clk > > > + - const: pclk > > > + - const: spdif > > > + - const: grf > > > + > > > + extcon: > > > + $ref: /schemas/types.yaml#/definitions/phandle-array > > > + items: > > > + maxItems: 1 > > > + maxItems: 2 > > Instead of this, list the items. Old binding said only "specifier", so > > this is technically a change, which should be explained in commit msg. > > Will fix in v5. > > > > > > > + description: > > > + List of phandle to the extcon device providing the cable state for the DP PHY. > > > + > > > + interrupts: > > > + maxItems: 1 > > > + > > > + phys: > > > + items: > > > + maxItems: 1 > > > + maxItems: 2 > > > + description: | > > > + List of phandle to the PHY device for DP output. > > > + RK3399 have two DP-TPYEC PHY, specifying one PHY which want to use, > > > + or specify two PHYs here to let the driver determine which PHY to use. > > > > You do not allow one phy, so your description is not accurate. OTOH, > > original binding did not allow two phandles, so that's another change in > > the binding. You need to document all changes done to the binding in the > > commit msg. > > Oh, the original binding example use two phandles. I think only one PHY can Example is not the binding, just an example. > also pass the dtb check here, or maybe I'm missing something else? You think or you tested it? What is the minItems value? 2, so even if this works it's rather a bug in dtschema. Also, inner maxItems:1 is not really correct. Why can't this work with different phy providers? Best regards, Krzysztof
Hi Krzysztof, On 2025/5/19 16:23, Krzysztof Kozlowski wrote: > On Mon, May 19, 2025 at 02:56:03PM GMT, Chaoyi Chen wrote: >> Hi Krzysztof, >> >> On 2025/5/19 14:16, Krzysztof Kozlowski wrote: >>> On 19/05/2025 03:26, Chaoyi Chen wrote: >>>> +maintainers: >>>> + - Andy Yan <andy.yan@rock-chip.com> >>>> + - Heiko Stuebner <heiko@sntech.de> >>>> + - Sandy Huang <hjc@rock-chips.com> >>>> + >>>> +allOf: >>>> + - $ref: /schemas/sound/dai-common.yaml# >>>> + >>>> +properties: >>>> + compatible: >>>> + items: >>>> + - const: rockchip,rk3399-cdn-dp >>>> + >>>> + reg: >>>> + maxItems: 1 >>>> + >>>> + clocks: >>>> + items: >>>> + - description: DP core work clock >>>> + - description: APB clock >>>> + - description: SPDIF interface clock >>>> + - description: GRF clock >>>> + >>>> + clock-names: >>>> + items: >>>> + - const: core-clk >>>> + - const: pclk >>>> + - const: spdif >>>> + - const: grf >>>> + >>>> + extcon: >>>> + $ref: /schemas/types.yaml#/definitions/phandle-array >>>> + items: >>>> + maxItems: 1 >>>> + maxItems: 2 >>> Instead of this, list the items. Old binding said only "specifier", so >>> this is technically a change, which should be explained in commit msg. >> Will fix in v5. >> >> >>>> + description: >>>> + List of phandle to the extcon device providing the cable state for the DP PHY. >>>> + >>>> + interrupts: >>>> + maxItems: 1 >>>> + >>>> + phys: >>>> + items: >>>> + maxItems: 1 >>>> + maxItems: 2 >>>> + description: | >>>> + List of phandle to the PHY device for DP output. >>>> + RK3399 have two DP-TPYEC PHY, specifying one PHY which want to use, >>>> + or specify two PHYs here to let the driver determine which PHY to use. >>> You do not allow one phy, so your description is not accurate. OTOH, >>> original binding did not allow two phandles, so that's another change in >>> the binding. You need to document all changes done to the binding in the >>> commit msg. >> Oh, the original binding example use two phandles. I think only one PHY can > Example is not the binding, just an example. > >> also pass the dtb check here, or maybe I'm missing something else? > You think or you tested it? What is the minItems value? 2, so even if > this works it's rather a bug in dtschema. Yes I tested it. Both of "phys = <&tcphy0_dp>", "phys = <&tcphy0_dp>, <&tcphy1_dp>" pass the dtb check. > > Also, inner maxItems:1 is not really correct. Why can't this work with > different phy providers? I'll see what other bindings do. Thanks for the clarification!
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