Il 16/05/25 20:01, Frank Wunderlich ha scritto:
> From: Frank Wunderlich <frank-w@public-files.de>
>
> Add cci devicetree node for cpu frequency scaling.
>
> Signed-off-by: Daniel Golle <daniel@makrotopia.org>
> Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
> ---
> arch/arm64/boot/dts/mediatek/mt7988a.dtsi | 33 +++++++++++++++++++++++
> 1 file changed, 33 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/mediatek/mt7988a.dtsi b/arch/arm64/boot/dts/mediatek/mt7988a.dtsi
> index ab6fc09940b8..64466acb0e71 100644
> --- a/arch/arm64/boot/dts/mediatek/mt7988a.dtsi
> +++ b/arch/arm64/boot/dts/mediatek/mt7988a.dtsi
> @@ -12,6 +12,35 @@ / {
> #address-cells = <2>;
> #size-cells = <2>;
>
> + cci: cci {
> + compatible = "mediatek,mt8183-cci";
While you can keep the mediatek,mt8183-cci fallback, this needs its own compatible
as "mediatek,mt7988-cci", therefore, I had to drop this patch from the ones that I
picked.
Please add the new compatible both here and in the binding.
Cheers,
Angelo
> + clocks = <&mcusys CLK_MCU_BUS_DIV_SEL>,
> + <&topckgen CLK_TOP_XTAL>;
> + clock-names = "cci", "intermediate";
> + operating-points-v2 = <&cci_opp>;
> + };
> +
> + cci_opp: opp-table-cci {
> + compatible = "operating-points-v2";
> + opp-shared;
> + opp-480000000 {
> + opp-hz = /bits/ 64 <480000000>;
> + opp-microvolt = <850000>;
> + };
> + opp-660000000 {
> + opp-hz = /bits/ 64 <660000000>;
> + opp-microvolt = <850000>;
> + };
> + opp-900000000 {
> + opp-hz = /bits/ 64 <900000000>;
> + opp-microvolt = <850000>;
> + };
> + opp-1080000000 {
> + opp-hz = /bits/ 64 <1080000000>;
> + opp-microvolt = <900000>;
> + };
> + };
> +
> cpus {
> #address-cells = <1>;
> #size-cells = <0>;
> @@ -25,6 +54,7 @@ cpu0: cpu@0 {
> <&topckgen CLK_TOP_XTAL>;
> clock-names = "cpu", "intermediate";
> operating-points-v2 = <&cluster0_opp>;
> + mediatek,cci = <&cci>;
> };
>
> cpu1: cpu@1 {
> @@ -36,6 +66,7 @@ cpu1: cpu@1 {
> <&topckgen CLK_TOP_XTAL>;
> clock-names = "cpu", "intermediate";
> operating-points-v2 = <&cluster0_opp>;
> + mediatek,cci = <&cci>;
> };
>
> cpu2: cpu@2 {
> @@ -47,6 +78,7 @@ cpu2: cpu@2 {
> <&topckgen CLK_TOP_XTAL>;
> clock-names = "cpu", "intermediate";
> operating-points-v2 = <&cluster0_opp>;
> + mediatek,cci = <&cci>;
> };
>
> cpu3: cpu@3 {
> @@ -58,6 +90,7 @@ cpu3: cpu@3 {
> <&topckgen CLK_TOP_XTAL>;
> clock-names = "cpu", "intermediate";
> operating-points-v2 = <&cluster0_opp>;
> + mediatek,cci = <&cci>;
> };
>
> cluster0_opp: opp-table-0 {