[PATCH v2 0/2] Add specific RZ/Five cache compatible

Conor Dooley posted 2 patches 7 months, 1 week ago
.../devicetree/bindings/cache/andestech,ax45mp-cache.yaml     | 4 +++-
arch/riscv/boot/dts/renesas/r9a07g043f.dtsi                   | 3 ++-
2 files changed, 5 insertions(+), 2 deletions(-)
[PATCH v2 0/2] Add specific RZ/Five cache compatible
Posted by Conor Dooley 7 months, 1 week ago
From: Conor Dooley <conor.dooley@microchip.com>

v2: add "-ax45mp" to compatible string.

CC: Ben Zong-You Xie <ben717@andestech.com>
CC: Conor Dooley <conor@kernel.org>
CC: Rob Herring <robh@kernel.org>
CC: Krzysztof Kozlowski <krzk+dt@kernel.org>
CC: Geert Uytterhoeven <geert+renesas@glider.be>
CC: Magnus Damm <magnus.damm@gmail.com>
CC: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
CC: devicetree@vger.kernel.org
CC: linux-kernel@vger.kernel.org
CC: linux-renesas-soc@vger.kernel.org
CC: linux-riscv@lists.infradead.org (open list:RISC-V ARCHITECTURE)

Conor Dooley (2):
  dt-bindings: cache: add specific RZ/Five compatible to ax45mp
  riscv: dts: renesas: add specific RZ/Five cache compatible

 .../devicetree/bindings/cache/andestech,ax45mp-cache.yaml     | 4 +++-
 arch/riscv/boot/dts/renesas/r9a07g043f.dtsi                   | 3 ++-
 2 files changed, 5 insertions(+), 2 deletions(-)

-- 
2.45.2