Devicetree binding patches should come first in a series.
On 5/11/25 16:12, Christian Marangi wrote:
> Document support for Airoha Ethernet PCS for AN7581 SoC.
>
> Airoha AN7581 SoC expose multiple Physical Coding Sublayer (PCS) for
> the various Serdes port supporting different Media Independent Interface
> (10BASE-R, USXGMII, 2500BASE-X, 1000BASE-X, SGMII).
>
> This follow the new PCS provider with the use of #pcs-cells property.
>
> Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
> ---
> .../bindings/net/pcs/airoha,pcs.yaml | 112 ++++++++++++++++++
> 1 file changed, 112 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/net/pcs/airoha,pcs.yaml
>
> diff --git a/Documentation/devicetree/bindings/net/pcs/airoha,pcs.yaml b/Documentation/devicetree/bindings/net/pcs/airoha,pcs.yaml
> new file mode 100644
> index 000000000000..8bcf7757c728
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/net/pcs/airoha,pcs.yaml
> @@ -0,0 +1,112 @@
> +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/net/pcs/airoha,pcs.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Airoha Ethernet PCS and Serdes
> +
> +maintainers:
> + - Christian Marangi <ansuelsmth@gmail.com>
> +
> +description:
> + Airoha AN7581 SoC expose multiple Physical Coding Sublayer (PCS) for
The Airoha AN7581 SoC exposes multiple Physical Coding Sublayers (PCSs) for
> + the various Serdes port supporting different Media Independent Interface
ports, Interfaces
> + (10BASE-R, USXGMII, 2500BASE-X, 1000BASE-X, SGMII).
10GBase-R
> +
> +properties:
> + compatible:
> + enum:
> + - airoha,an7581-pcs-eth
> + - airoha,an7581-pcs-pon
What's the difference between these? There's no mention of PON above.
> + reg:
> + items:
> + - description: XFI MAC reg
> + - description: HSGMII AN reg
> + - description: HSGMII PCS reg
> + - description: MULTI SGMII reg
> + - description: USXGMII reg
> + - description: HSGMII rate adaption reg
> + - description: XFI Analog register
> + - description: XFI PMA (Physical Medium Attachment) register
> +
> + reg-names:
> + items:
> + - const: xfi_mac
> + - const: hsgmii_an
> + - const: hsgmii_pcs
> + - const: multi_sgmii
> + - const: usxgmii
> + - const: hsgmii_rate_adp
> + - const: xfi_ana
> + - const: xfi_pma
> +
> + resets:
> + items:
> + - description: MAC reset
> + - description: PHY reset
> +
> + reset-names:
> + items:
> + - const: mac
> + - const: phy
> +
> + "#pcs-cells":
> + const: 0
From what I can tell you only have one PCS. So this is unnecessary.
--Sean
> +required:
> + - compatible
> + - reg
> + - reg-names
> + - resets
> + - reset-names
> + - "#pcs-cells"
> +
> +additionalProperties: false
> +
> +examples:
> + - |
> + #include <dt-bindings/reset/airoha,en7581-reset.h>
> +
> + pcs@1fa08000 {
> + compatible = "airoha,an7581-pcs-pon";
> + reg = <0x1fa08000 0x1000>,
> + <0x1fa80000 0x60>,
> + <0x1fa80a00 0x164>,
> + <0x1fa84000 0x450>,
> + <0x1fa85900 0x338>,
> + <0x1fa86000 0x300>,
> + <0x1fa8a000 0x1000>,
> + <0x1fa8b000 0x1000>;
> + reg-names = "xfi_mac", "hsgmii_an", "hsgmii_pcs",
> + "multi_sgmii", "usxgmii",
> + "hsgmii_rate_adp", "xfi_ana", "xfi_pma";
> +
> + resets = <&scuclk EN7581_XPON_MAC_RST>,
> + <&scuclk EN7581_XPON_PHY_RST>;
> + reset-names = "mac", "phy";
> +
> + #pcs-cells = <0>;
> + };
> +
> + pcs@1fa09000 {
> + compatible = "airoha,an7581-pcs-eth";
> + reg = <0x1fa09000 0x1000>,
> + <0x1fa70000 0x60>,
> + <0x1fa70a00 0x164>,
> + <0x1fa74000 0x450>,
> + <0x1fa75900 0x338>,
> + <0x1fa76000 0x300>,
> + <0x1fa7a000 0x1000>,
> + <0x1fa7b000 0x1000>;
> + reg-names = "xfi_mac", "hsgmii_an", "hsgmii_pcs",
> + "multi_sgmii", "usxgmii",
> + "hsgmii_rate_adp", "xfi_ana", "xfi_pma";
> +
> + resets = <&scuclk EN7581_XSI_MAC_RST>,
> + <&scuclk EN7581_XSI_PHY_RST>;
> + reset-names = "mac", "phy";
> +
> + #pcs-cells = <0>;
> + };