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[PATCH v2 2/2] arm64: dts: renesas: r9a09g057h44-rzv2h-evk: Enable GBETH

Prabhakar posted 2 patches 7 months, 1 week ago
There is a newer version of this series
[PATCH v2 2/2] arm64: dts: renesas: r9a09g057h44-rzv2h-evk: Enable GBETH
Posted by Prabhakar 7 months, 1 week ago 
From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>

Enable the GBETH nodes on the RZ/V2H Evaluation Kit.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
---
v1->v2:
- No change.
---
 .../dts/renesas/r9a09g057h44-rzv2h-evk.dts    | 74 +++++++++++++++++++
 1 file changed, 74 insertions(+)

diff --git a/arch/arm64/boot/dts/renesas/r9a09g057h44-rzv2h-evk.dts b/arch/arm64/boot/dts/renesas/r9a09g057h44-rzv2h-evk.dts
index 063eca0ba3e2..6b12bdc3eff9 100644
--- a/arch/arm64/boot/dts/renesas/r9a09g057h44-rzv2h-evk.dts
+++ b/arch/arm64/boot/dts/renesas/r9a09g057h44-rzv2h-evk.dts
@@ -16,6 +16,8 @@ / {
 	compatible = "renesas,rzv2h-evk", "renesas,r9a09g057h44", "renesas,r9a09g057";
 
 	aliases {
+		ethernet0 = &eth0;
+		ethernet1 = &eth1;
 		i2c0 = &i2c0;
 		i2c1 = &i2c1;
 		i2c2 = &i2c2;
@@ -78,6 +80,68 @@ &audio_extal_clk {
 	clock-frequency = <22579200>;
 };
 
+&eth0 {
+	pinctrl-0 = <&eth0_pins>;
+	pinctrl-names = "default";
+	phy-handle = <&phy0>;
+	phy-mode = "rgmii-id";
+	status = "okay";
+
+	mdio {
+		#address-cells = <1>;
+		#size-cells = <0>;
+		compatible = "snps,dwmac-mdio";
+
+		phy0: ethernet-phy@0 {
+			compatible = "ethernet-phy-id0022.1640", "ethernet-phy-ieee802.3-c22";
+			reg = <0>;
+			rxc-skew-psec = <0>;
+			txc-skew-psec = <0>;
+			rxdv-skew-psec = <0>;
+			txdv-skew-psec = <0>;
+			rxd0-skew-psec = <0>;
+			rxd1-skew-psec = <0>;
+			rxd2-skew-psec = <0>;
+			rxd3-skew-psec = <0>;
+			txd0-skew-psec = <0>;
+			txd1-skew-psec = <0>;
+			txd2-skew-psec = <0>;
+			txd3-skew-psec = <0>;
+		};
+	};
+};
+
+&eth1 {
+	pinctrl-0 = <&eth1_pins>;
+	pinctrl-names = "default";
+	phy-handle = <&phy1>;
+	phy-mode = "rgmii-id";
+	status = "okay";
+
+	mdio {
+		#address-cells = <1>;
+		#size-cells = <0>;
+		compatible = "snps,dwmac-mdio";
+
+		phy1: ethernet-phy@1 {
+			compatible = "ethernet-phy-id0022.1640", "ethernet-phy-ieee802.3-c22";
+			reg = <0>;
+			rxc-skew-psec = <0>;
+			txc-skew-psec = <0>;
+			rxdv-skew-psec = <0>;
+			txdv-skew-psec = <0>;
+			rxd0-skew-psec = <0>;
+			rxd1-skew-psec = <0>;
+			rxd2-skew-psec = <0>;
+			rxd3-skew-psec = <0>;
+			txd0-skew-psec = <0>;
+			txd1-skew-psec = <0>;
+			txd2-skew-psec = <0>;
+			txd3-skew-psec = <0>;
+		};
+	};
+};
+
 &gpu {
 	status = "okay";
 	mali-supply = <&reg_0p8v>;
@@ -172,6 +236,16 @@ &ostm7 {
 };
 
 &pinctrl {
+	eth0_pins: eth0 {
+		pins = "ET0_TXC_TXCLK";
+		output-enable;
+	};
+
+	eth1_pins: eth0 {
+		pins = "ET1_TXC_TXCLK";
+		output-enable;
+	};
+
 	i2c0_pins: i2c0 {
 		pinmux = <RZV2H_PORT_PINMUX(3, 0, 1)>, /* I2C0_SDA */
 			 <RZV2H_PORT_PINMUX(3, 1, 1)>; /* I2C0_SCL */
-- 
2.49.0
Re: [PATCH v2 2/2] arm64: dts: renesas: r9a09g057h44-rzv2h-evk: Enable GBETH
Posted by Geert Uytterhoeven 7 months, 1 week ago 
Hi Prabhakar,

On Fri, 9 May 2025 at 17:36, Prabhakar <prabhakar.csengg@gmail.com> wrote:
> From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
>
> Enable the GBETH nodes on the RZ/V2H Evaluation Kit.
>
> Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>

Thanks for your patch!

LGTM, so
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>

> --- a/arch/arm64/boot/dts/renesas/r9a09g057h44-rzv2h-evk.dts
> +++ b/arch/arm64/boot/dts/renesas/r9a09g057h44-rzv2h-evk.dts
> @@ -78,6 +80,68 @@ &audio_extal_clk {
>         clock-frequency = <22579200>;
>  };
>
> +&eth0 {
> +       pinctrl-0 = <&eth0_pins>;
> +       pinctrl-names = "default";
> +       phy-handle = <&phy0>;
> +       phy-mode = "rgmii-id";
> +       status = "okay";
> +
> +       mdio {
> +               #address-cells = <1>;
> +               #size-cells = <0>;
> +               compatible = "snps,dwmac-mdio";

I am just wondering if the above parts of the mdio subnodes should be
moved to the SoC-specific .dtsi instead, as it is part of the SoC and
fairly static?

Both approaches seem to be popular: e.g. rk3568.dtsi[1] has the mdio
subnode in the SoC part, and rk3568-nanopi-r5s.dts[2] extends the
subnode, while rk3399-orangepi.dts[3] has the full subnode in the
board part.

[1] arch/arm64/boot/dts/rockchip/rk3568.dtsi
[2] arch/arm64/boot/dts/rockchip/rk3568-nanopi-r5s.dts
[3] arch/arm64/boot/dts/rockchip/rk3399-orangepi.dts

Gr{oetje,eeting}s,

                        Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds
Re: [PATCH v2 2/2] arm64: dts: renesas: r9a09g057h44-rzv2h-evk: Enable GBETH
Posted by Lad, Prabhakar 7 months, 1 week ago 
Hi Geert,

Thank you for the review.

On Mon, May 12, 2025 at 8:05 PM Geert Uytterhoeven <geert@linux-m68k.org> wrote:
>
> Hi Prabhakar,
>
> On Fri, 9 May 2025 at 17:36, Prabhakar <prabhakar.csengg@gmail.com> wrote:
> > From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
> >
> > Enable the GBETH nodes on the RZ/V2H Evaluation Kit.
> >
> > Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
>
> Thanks for your patch!
>
> LGTM, so
> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
>
> > --- a/arch/arm64/boot/dts/renesas/r9a09g057h44-rzv2h-evk.dts
> > +++ b/arch/arm64/boot/dts/renesas/r9a09g057h44-rzv2h-evk.dts
> > @@ -78,6 +80,68 @@ &audio_extal_clk {
> >         clock-frequency = <22579200>;
> >  };
> >
> > +&eth0 {
> > +       pinctrl-0 = <&eth0_pins>;
> > +       pinctrl-names = "default";
> > +       phy-handle = <&phy0>;
> > +       phy-mode = "rgmii-id";
> > +       status = "okay";
> > +
> > +       mdio {
> > +               #address-cells = <1>;
> > +               #size-cells = <0>;
> > +               compatible = "snps,dwmac-mdio";
>
> I am just wondering if the above parts of the mdio subnodes should be
> moved to the SoC-specific .dtsi instead, as it is part of the SoC and
> fairly static?
>
Agreed, I will move this to SoC DTSI.

> Both approaches seem to be popular: e.g. rk3568.dtsi[1] has the mdio
> subnode in the SoC part, and rk3568-nanopi-r5s.dts[2] extends the
> subnode, while rk3399-orangepi.dts[3] has the full subnode in the
> board part.
>
> [1] arch/arm64/boot/dts/rockchip/rk3568.dtsi
> [2] arch/arm64/boot/dts/rockchip/rk3568-nanopi-r5s.dts
> [3] arch/arm64/boot/dts/rockchip/rk3399-orangepi.dts
>

[3] was added earlier, [1]/[2] seem more recent. So let's go with the
mdio node in SoC DTSI.

Cheers,
Prabhakar

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