arch/arm64/boot/dts/qcom/sm8650-hdk.dts | 4 ++ arch/arm64/boot/dts/qcom/sm8650-mtp.dts | 4 ++ arch/arm64/boot/dts/qcom/sm8650-qrd.dts | 4 ++ arch/arm64/boot/dts/qcom/sm8650.dtsi | 93 +++++++++++++++++++++++++++++++++ 4 files changed, 105 insertions(+)
Add DT entries for the sm8650 iris decoder.
Since the firmware is required to be signed, only enable
on Qualcomm development boards where the firmware is
available.
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
---
Changes in v3:
- Removed useless comment
- Fixed opp required-opps
- Link to v2: https://lore.kernel.org/r/20250424-topic-sm8x50-upstream-iris-8650-dt-v2-1-dd9108bf587f@linaro.org
Changes in v2:
- removed useless firmware-name
- Link to v1: https://lore.kernel.org/r/20250418-topic-sm8x50-upstream-iris-8650-dt-v1-1-80a6ae50bf10@linaro.org
---
arch/arm64/boot/dts/qcom/sm8650-hdk.dts | 4 ++
arch/arm64/boot/dts/qcom/sm8650-mtp.dts | 4 ++
arch/arm64/boot/dts/qcom/sm8650-qrd.dts | 4 ++
arch/arm64/boot/dts/qcom/sm8650.dtsi | 93 +++++++++++++++++++++++++++++++++
4 files changed, 105 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sm8650-hdk.dts b/arch/arm64/boot/dts/qcom/sm8650-hdk.dts
index d0912735b54e5090f9f213c2c9341e03effbbbff..259649d7dcd768ecf93c9473adc1738e7d715b6c 100644
--- a/arch/arm64/boot/dts/qcom/sm8650-hdk.dts
+++ b/arch/arm64/boot/dts/qcom/sm8650-hdk.dts
@@ -894,6 +894,10 @@ &ipa {
status = "okay";
};
+&iris {
+ status = "okay";
+};
+
&gpu {
status = "okay";
diff --git a/arch/arm64/boot/dts/qcom/sm8650-mtp.dts b/arch/arm64/boot/dts/qcom/sm8650-mtp.dts
index 76ef43c10f77d8329ccf0a05c9d590a46372315f..8a957adbfb383411153506e46d4c9acfb02e3114 100644
--- a/arch/arm64/boot/dts/qcom/sm8650-mtp.dts
+++ b/arch/arm64/boot/dts/qcom/sm8650-mtp.dts
@@ -585,6 +585,10 @@ vreg_l7n_3p3: ldo7 {
};
};
+&iris {
+ status = "okay";
+};
+
&lpass_tlmm {
spkr_1_sd_n_active: spkr-1-sd-n-active-state {
pins = "gpio21";
diff --git a/arch/arm64/boot/dts/qcom/sm8650-qrd.dts b/arch/arm64/boot/dts/qcom/sm8650-qrd.dts
index 71033fba21b56bc63620dca3e453c14191739675..7552d5d3fb4020e61d47242b447c9ecbec5f8d55 100644
--- a/arch/arm64/boot/dts/qcom/sm8650-qrd.dts
+++ b/arch/arm64/boot/dts/qcom/sm8650-qrd.dts
@@ -824,6 +824,10 @@ &ipa {
status = "okay";
};
+&iris {
+ status = "okay";
+};
+
&gpu {
status = "okay";
diff --git a/arch/arm64/boot/dts/qcom/sm8650.dtsi b/arch/arm64/boot/dts/qcom/sm8650.dtsi
index c2937f7217943c4ca91a91eadc8259b2d6a01372..30dc4937acc62df582768403db3ff9c919f11e72 100644
--- a/arch/arm64/boot/dts/qcom/sm8650.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8650.dtsi
@@ -4955,6 +4955,99 @@ opp-202000000 {
};
};
+ iris: video-codec@aa00000 {
+ compatible = "qcom,sm8650-iris";
+ reg = <0 0x0aa00000 0 0xf0000>;
+
+ interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH 0>;
+
+ power-domains = <&videocc VIDEO_CC_MVS0C_GDSC>,
+ <&videocc VIDEO_CC_MVS0_GDSC>,
+ <&rpmhpd RPMHPD_MXC>,
+ <&rpmhpd RPMHPD_MMCX>;
+ power-domain-names = "venus",
+ "vcodec0",
+ "mxc",
+ "mmcx";
+
+ operating-points-v2 = <&iris_opp_table>;
+
+ clocks = <&gcc GCC_VIDEO_AXI0_CLK>,
+ <&videocc VIDEO_CC_MVS0C_CLK>,
+ <&videocc VIDEO_CC_MVS0_CLK>;
+ clock-names = "iface",
+ "core",
+ "vcodec0_core";
+
+ interconnects = <&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY
+ &config_noc SLAVE_VENUS_CFG QCOM_ICC_TAG_ACTIVE_ONLY>,
+ <&mmss_noc MASTER_VIDEO QCOM_ICC_TAG_ALWAYS
+ &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>;
+ interconnect-names = "cpu-cfg",
+ "video-mem";
+
+ memory-region = <&video_mem>;
+
+ resets = <&gcc GCC_VIDEO_AXI0_CLK_ARES>,
+ <&videocc VIDEO_CC_XO_CLK_ARES>,
+ <&videocc VIDEO_CC_MVS0C_CLK_ARES>;
+ reset-names = "bus",
+ "xo",
+ "core";
+
+ iommus = <&apps_smmu 0x1940 0>,
+ <&apps_smmu 0x1947 0>;
+
+ dma-coherent;
+
+ /*
+ * IRIS firmware is signed by vendors, only
+ * enable in boards where the proper signed firmware
+ * is available.
+ */
+ status = "disabled";
+
+ iris_opp_table: opp-table {
+ compatible = "operating-points-v2";
+
+ opp-196000000 {
+ opp-hz = /bits/ 64 <196000000>;
+ required-opps = <&rpmhpd_opp_low_svs_d1>,
+ <&rpmhpd_opp_low_svs_d1>;
+ };
+
+ opp-300000000 {
+ opp-hz = /bits/ 64 <300000000>;
+ required-opps = <&rpmhpd_opp_low_svs>,
+ <&rpmhpd_opp_low_svs>;
+ };
+
+ opp-380000000 {
+ opp-hz = /bits/ 64 <380000000>;
+ required-opps = <&rpmhpd_opp_svs>,
+ <&rpmhpd_opp_svs>;
+ };
+
+ opp-435000000 {
+ opp-hz = /bits/ 64 <435000000>;
+ required-opps = <&rpmhpd_opp_svs_l1>,
+ <&rpmhpd_opp_svs_l1>;
+ };
+
+ opp-480000000 {
+ opp-hz = /bits/ 64 <480000000>;
+ required-opps = <&rpmhpd_opp_nom>,
+ <&rpmhpd_opp_nom>;
+ };
+
+ opp-533333334 {
+ opp-hz = /bits/ 64 <533333334>;
+ required-opps = <&rpmhpd_opp_turbo>,
+ <&rpmhpd_opp_turbo>;
+ };
+ };
+ };
+
videocc: clock-controller@aaf0000 {
compatible = "qcom,sm8650-videocc";
reg = <0 0x0aaf0000 0 0x10000>;
---
base-commit: a7dca088884312d607fff89f2666c670cb7073ac
change-id: 20250418-topic-sm8x50-upstream-iris-8650-dt-d2c64a59505f
Best regards,
--
Neil Armstrong <neil.armstrong@linaro.org>On Fri, 09 May 2025 17:28:22 +0200, Neil Armstrong wrote: > Add DT entries for the sm8650 iris decoder. > > Since the firmware is required to be signed, only enable > on Qualcomm development boards where the firmware is > available. > > Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> > Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> > --- > Changes in v3: > - Removed useless comment > - Fixed opp required-opps > - Link to v2: https://lore.kernel.org/r/20250424-topic-sm8x50-upstream-iris-8650-dt-v2-1-dd9108bf587f@linaro.org > > Changes in v2: > - removed useless firmware-name > - Link to v1: https://lore.kernel.org/r/20250418-topic-sm8x50-upstream-iris-8650-dt-v1-1-80a6ae50bf10@linaro.org > --- > arch/arm64/boot/dts/qcom/sm8650-hdk.dts | 4 ++ > arch/arm64/boot/dts/qcom/sm8650-mtp.dts | 4 ++ > arch/arm64/boot/dts/qcom/sm8650-qrd.dts | 4 ++ > arch/arm64/boot/dts/qcom/sm8650.dtsi | 93 +++++++++++++++++++++++++++++++++ > 4 files changed, 105 insertions(+) > My bot found new DTB warnings on the .dts files added or changed in this series. Some warnings may be from an existing SoC .dtsi. Or perhaps the warnings are fixed by another series. Ultimately, it is up to the platform maintainer whether these warnings are acceptable or not. No need to reply unless the platform maintainer has comments. If you already ran DT checks and didn't see these error(s), then make sure dt-schema is up to date: pip3 install dtschema --upgrade This patch series was applied (using b4) to base: Base: base-commit a7dca088884312d607fff89f2666c670cb7073ac not known, ignoring Base: attempting to guess base-commit... Base: tags/v6.15-rc1-102-g2332d042e9b2 (best guess, 3/4 blobs matched) If this is not the correct base, please add 'base-commit' tag (or use b4 which does this automatically) New warnings running 'make CHECK_DTBS=y for arch/arm64/boot/dts/qcom/' for 20250509-topic-sm8x50-upstream-iris-8650-dt-v3-1-f6842e0a8208@linaro.org: arch/arm64/boot/dts/qcom/sm8650.dtsi:5395.4-27: Warning (interrupts_property): /soc@0/video-codec@aa00000:#interrupt-cells: size is (16), expected multiple of 12 arch/arm64/boot/dts/qcom/sm8650.dtsi:5395.4-27: Warning (interrupts_property): /soc@0/video-codec@aa00000:#interrupt-cells: size is (16), expected multiple of 12 arch/arm64/boot/dts/qcom/sm8650.dtsi:5395.4-27: Warning (interrupts_property): /soc@0/video-codec@aa00000:#interrupt-cells: size is (16), expected multiple of 12 arch/arm64/boot/dts/qcom/sm8650-mtp.dtb: /soc@0/video-codec@aa00000: failed to match any schema with compatible: ['qcom,sm8650-iris'] arch/arm64/boot/dts/qcom/sm8650-mtp.dtb: display-subsystem@ae00000 (qcom,sm8650-mdss): interconnects: [[179, 3, 7, 32, 1, 7]] is too short from schema $id: http://devicetree.org/schemas/display/msm/qcom,sm8650-mdss.yaml# arch/arm64/boot/dts/qcom/sm8650-qrd.dtb: /soc@0/video-codec@aa00000: failed to match any schema with compatible: ['qcom,sm8650-iris'] arch/arm64/boot/dts/qcom/sm8650-qrd.dtb: display-subsystem@ae00000 (qcom,sm8650-mdss): interconnects: [[188, 3, 7, 32, 1, 7]] is too short from schema $id: http://devicetree.org/schemas/display/msm/qcom,sm8650-mdss.yaml# arch/arm64/boot/dts/qcom/sm8650-hdk.dtb: /soc@0/video-codec@aa00000: failed to match any schema with compatible: ['qcom,sm8650-iris'] arch/arm64/boot/dts/qcom/sm8650-hdk.dtb: display-subsystem@ae00000 (qcom,sm8650-mdss): interconnects: [[196, 3, 7, 32, 1, 7]] is too short from schema $id: http://devicetree.org/schemas/display/msm/qcom,sm8650-mdss.yaml#
On 5/9/25 5:28 PM, Neil Armstrong wrote: > Add DT entries for the sm8650 iris decoder. > > Since the firmware is required to be signed, only enable > on Qualcomm development boards where the firmware is > available. > > Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> > Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> > --- Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Konrad
On 5/9/25 5:58 PM, Konrad Dybcio wrote: > On 5/9/25 5:28 PM, Neil Armstrong wrote: >> Add DT entries for the sm8650 iris decoder. >> >> Since the firmware is required to be signed, only enable >> on Qualcomm development boards where the firmware is >> available. >> >> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> >> Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> >> --- > > Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> I don't like the new comment above status given it says what we've been doing for a long time everywhere, but i won't ask you to resend just for that Konrad
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