From: Conor Dooley <conor.dooley@microchip.com>

I opted not to add fixes tags, but I can create them if you (Prabhakar
or Geert etc) think that I should.

CC: Ben Zong-You Xie <ben717@andestech.com>
CC: Conor Dooley <conor@kernel.org>
CC: Rob Herring <robh@kernel.org>
CC: Krzysztof Kozlowski <krzk+dt@kernel.org>
CC: Geert Uytterhoeven <geert+renesas@glider.be>
CC: Magnus Damm <magnus.damm@gmail.com>
CC: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
CC: devicetree@vger.kernel.org
CC: linux-kernel@vger.kernel.org
CC: linux-renesas-soc@vger.kernel.org
CC: linux-riscv@lists.infradead.org

Conor Dooley (2):
  dt-bindings: cache: add specific RZ/Five compatible to ax45mp
  riscv: dts: renesas: add specific RZ/Five cache compatible

 .../devicetree/bindings/cache/andestech,ax45mp-cache.yaml      | 3 ++-
 arch/riscv/boot/dts/renesas/r9a07g043f.dtsi                    | 2 +-
 2 files changed, 3 insertions(+), 2 deletions(-)

-- 
2.45.2

Hi Conor,

On Fri, 9 May 2025 at 17:38, Conor Dooley <conor@kernel.org> wrote:
> From: Conor Dooley <conor.dooley@microchip.com>
>
> I opted not to add fixes tags, but I can create them if you (Prabhakar
> or Geert etc) think that I should.

It depends ;-)

Do you see a need for matching on the new compatible value in the
near future?
Is it OK to postpone the DTS patch to v6.17, or do you want to
fast-track it as a fix? I just sent my last normal PR for v6.16 on
Friday, before this series came in.

Thanks!

> Conor Dooley (2):
>   dt-bindings: cache: add specific RZ/Five compatible to ax45mp
>   riscv: dts: renesas: add specific RZ/Five cache compatible

Gr{oetje,eeting}s,

                        Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds