On Fri, 09 May 2025 12:05:47 +0100, James Clark wrote:
> DT and driver changes for DSPI on S32G platforms. First 4 commits add
> new S32G registers and device settings along with restricting userspace
> register access properly for all devices. Then some DMA mode fixes along
> with adding support for target mode, which uses DMA. Followed by some
> other minor bug fixes and then finally add the DT compatibles and
> binding docs.
>
> ---
> Andra-Teodora Ilie (1):
> spi: spi-fsl-dspi: Enable modified transfer protocol
>
> Bogdan-Gabriel Roman (1):
> spi: spi-fsl-dspi: Halt the module after a new message transfer
>
> Ciprian Marian Costea (2):
> dt-bindings: spi: dspi: Add S32G support
> spi: spi-fsl-dspi: Enable support for S32G platforms
>
> James Clark (2):
> spi: spi-fsl-dspi: Define regmaps per device
> spi: spi-fsl-dspi: Re-use one volatile regmap for both device types
>
> Larisa Grigore (7):
> spi: spi-fsl-dspi: restrict register range for regmap access
> spi: spi-fsl-dspi: Add config and regmaps for S32G platforms
> spi: spi-fsl-dspi: Avoid setup_accel logic for DMA transfers
> spi: spi-fsl-dspi: Reset SR flags before sending a new message
> spi: spi-fsl-dspi: Use DMA for S32G controller in target mode
> spi: spi-fsl-dspi: Reinitialize DSPI regs after resuming for S32G
> arm64: dts: Add DSPI entries for S32G platforms
>
> Marius Trifu (1):
> spi: spi-fsl-dspi: Use spi_alloc_target for target
>
> .../devicetree/bindings/spi/fsl,dspi.yaml | 18 ++
> arch/arm64/boot/dts/freescale/s32g2.dtsi | 78 +++++
> arch/arm64/boot/dts/freescale/s32g3.dtsi | 78 +++++
> arch/arm64/boot/dts/freescale/s32gxxxa-evb.dtsi | 87 +++++
> arch/arm64/boot/dts/freescale/s32gxxxa-rdb.dtsi | 77 +++++
> drivers/spi/Kconfig | 4 +-
> drivers/spi/spi-fsl-dspi.c | 356 +++++++++++++++------
> 7 files changed, 592 insertions(+), 106 deletions(-)
> ---
> base-commit: 9c69f88849045499e8ad114e5e13dbb3c85f4443
> change-id: 20250325-james-nxp-spi-caf1e2099231
>
> Best regards,
> --
> James Clark <james.clark@linaro.org>
>
>
>
My bot found new DTB warnings on the .dts files added or changed in this
series.
Some warnings may be from an existing SoC .dtsi. Or perhaps the warnings
are fixed by another series. Ultimately, it is up to the platform
maintainer whether these warnings are acceptable or not. No need to reply
unless the platform maintainer has comments.
If you already ran DT checks and didn't see these error(s), then
make sure dt-schema is up to date:
pip3 install dtschema --upgrade
This patch series was applied (using b4) to base:
Base: using specified base-commit 9c69f88849045499e8ad114e5e13dbb3c85f4443
If this is not the correct base, please add 'base-commit' tag
(or use b4 which does this automatically)
New warnings running 'make CHECK_DTBS=y for arch/arm64/boot/dts/freescale/' for 20250509-james-nxp-spi-v1-0-32bfcd2fea11@linaro.org:
arch/arm64/boot/dts/freescale/s32g399a-rdb3.dtb: pinctrl@4009c240 (nxp,s32g2-siul2-pinctrl): 'dspi1_pins', 'dspi5_pins' do not match any of the regexes: '-pins$', '^pinctrl-[0-9]+$'
from schema $id: http://devicetree.org/schemas/pinctrl/nxp,s32g2-siul2-pinctrl.yaml#
arch/arm64/boot/dts/freescale/s32g274a-evb.dtb: pinctrl@4009c240 (nxp,s32g2-siul2-pinctrl): 'dspi1_pins', 'dspi5_pins' do not match any of the regexes: '-pins$', '^pinctrl-[0-9]+$'
from schema $id: http://devicetree.org/schemas/pinctrl/nxp,s32g2-siul2-pinctrl.yaml#
arch/arm64/boot/dts/freescale/s32g274a-evb.dtb: spidev@0 (rohm,dh2228fv): 'fsl,spi-cs-sck-delay', 'fsl,spi-sck-cs-delay' do not match any of the regexes: '^pinctrl-[0-9]+$'
from schema $id: http://devicetree.org/schemas/trivial-devices.yaml#
arch/arm64/boot/dts/freescale/s32g274a-rdb2.dtb: pinctrl@4009c240 (nxp,s32g2-siul2-pinctrl): 'dspi1_pins', 'dspi5_pins' do not match any of the regexes: '-pins$', '^pinctrl-[0-9]+$'
from schema $id: http://devicetree.org/schemas/pinctrl/nxp,s32g2-siul2-pinctrl.yaml#