Add hardware description for the USB-C port in the Radxa ROCK 5 Model B+
This describes the OHCI, EHCI and XHCI USB parts, but not yet the DisplayPort
AltMode, since the bindings for that are not yet upstream.
Support for the ROCK 5B is prepared, but not exposed at the moment,
since it results in unreliable boot behavior due to hard resets killing
the supply voltage. Some further investigation and fixes in the kernel's
Type-C Port Manager (TCPM) state machine is needed before exposing the
port. The ROCK 5B+ has a dedicated port for powering the board and thus
is not affected.
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
---
.../boot/dts/rockchip/rk3588-rock-5b-plus.dts | 16 +++
arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts | 23 ++++
arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dtsi | 137 +++++++++++++++++++++
3 files changed, 176 insertions(+)
diff --git a/arch/arm64/boot/dts/rockchip/rk3588-rock-5b-plus.dts b/arch/arm64/boot/dts/rockchip/rk3588-rock-5b-plus.dts
index 74c7b6502e4dda4b774f43c704ebaee350703c0d..4096cd853f9a909e4233d2c61a1fe5ee83904c4c 100644
--- a/arch/arm64/boot/dts/rockchip/rk3588-rock-5b-plus.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3588-rock-5b-plus.dts
@@ -99,12 +99,28 @@ pcie3x2_rst: pcie3x2-rst {
};
usb {
+ usbc_sbu_dc: usbc-sbu-dc {
+ rockchip,pins = <0 RK_PC4 RK_FUNC_GPIO &pcfg_pull_none>,
+ <0 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+
vcc5v0_host_en: vcc5v0-host-en {
rockchip,pins = <1 RK_PA1 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
};
+&usbc0 {
+ status = "okay";
+};
+
+&usbdp_phy0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&usbc_sbu_dc>;
+ sbu1-dc-gpios = <&gpio0 RK_PC4 GPIO_ACTIVE_HIGH>;
+ sbu2-dc-gpios = <&gpio0 RK_PC5 GPIO_ACTIVE_HIGH>;
+};
+
&vcc5v0_host {
enable-active-high;
gpio = <&gpio1 RK_PA1 GPIO_ACTIVE_HIGH>;
diff --git a/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts b/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts
index 9407a7c9910ada1f6c803d2e15785a9cbd9bd655..ab0c572ea9234f373af4a47db93fc1786f0e6fbf 100644
--- a/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts
@@ -36,8 +36,20 @@ &uart6 {
status = "okay";
};
+&usbdp_phy0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&usbc_sbu_dc>;
+ sbu1-dc-gpios = <&gpio4 RK_PA6 GPIO_ACTIVE_HIGH>;
+ sbu2-dc-gpios = <&gpio4 RK_PA7 GPIO_ACTIVE_HIGH>;
+};
+
&pinctrl {
usb {
+ usbc_sbu_dc: usbc-sbu-dc {
+ rockchip,pins = <0 RK_PC4 RK_FUNC_GPIO &pcfg_pull_none>,
+ <0 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+
vcc5v0_host_en: vcc5v0-host-en {
rockchip,pins = <4 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;
};
@@ -50,3 +62,14 @@ &vcc5v0_host {
pinctrl-names = "default";
pinctrl-0 = <&vcc5v0_host_en>;
};
+
+/*
+ * Do not yet offer USB-C support on the Rock 5B. The current U-Boot
+ * Linux setup is quite unstable and for many power-supplies needs multiple
+ * hard resets to boot to userspace. Let's enable this once the issues
+ * in the TCPM kernel code have been solved. Without this any automated
+ * boot tests will run into problems.
+ */
+/delete-node/ &usbc0;
+/delete-node/ &usb_host0_xhci;
+/delete-node/ &usbdp_phy0;
diff --git a/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dtsi b/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dtsi
index 6052787d2560978d2bae6cfbeea5fc1d419d583a..314fdc0c1c20b25b0fdc5254f3b090586c169a00 100644
--- a/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dtsi
@@ -5,6 +5,7 @@
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/leds/common.h>
#include <dt-bindings/soc/rockchip,vop2.h>
+#include <dt-bindings/usb/pd.h>
#include "rk3588.dtsi"
/ {
@@ -92,6 +93,15 @@ rfkill-bt {
shutdown-gpios = <&gpio3 RK_PD5 GPIO_ACTIVE_HIGH>;
};
+ vcc12v_dcin: regulator-vcc12v-dcin {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc12v_dcin";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <12000000>;
+ regulator-max-microvolt = <12000000>;
+ };
+
vcc3v3_pcie2x1l0: regulator-vcc3v3-pcie2x1l0 {
compatible = "regulator-fixed";
enable-active-high;
@@ -146,6 +156,19 @@ vcc5v0_sys: regulator-vcc5v0-sys {
regulator-boot-on;
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
+ vin-supply = <&vcc12v_dcin>;
+ };
+
+ vbus5v0_typec: vbus5v0-typec {
+ compatible = "regulator-fixed";
+ enable-active-high;
+ gpio = <&gpio2 RK_PB6 GPIO_ACTIVE_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&vbus5v0_typec_en>;
+ regulator-name = "vbus5v0_typec";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ vin-supply = <&vcc5v0_sys>;
};
vcc_1v1_nldo_s3: regulator-vcc-1v1-nldo-s3 {
@@ -309,6 +332,67 @@ regulator-state-mem {
};
};
+&i2c4 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c4m1_xfer>;
+ status = "okay";
+
+ usbc0: usb-typec@22 {
+ compatible = "fcs,fusb302";
+ reg = <0x22>;
+ interrupt-parent = <&gpio3>;
+ interrupts = <RK_PB4 IRQ_TYPE_LEVEL_LOW>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&usbc0_int>;
+ vbus-supply = <&vbus5v0_typec>;
+ /*
+ * When the board is starting to send power-delivery messages
+ * too late (5 seconds according to the specification), the
+ * power-supply reacts with a hard-reset. That removes the
+ * power from VBUS for some time, which resets te whole board.
+ */
+ status = "fail";
+
+ usb_con: connector {
+ compatible = "usb-c-connector";
+ label = "USB-C";
+ data-role = "dual";
+ power-role = "sink";
+ try-power-role = "sink";
+ op-sink-microwatt = <1000000>;
+ sink-pdos =
+ <PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM)>,
+ <PDO_VAR(5000, 20000, 5000)>;
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+ usbc0_role_sw: endpoint {
+ remote-endpoint = <&dwc3_0_role_switch>;
+ };
+ };
+
+ port@1 {
+ reg = <1>;
+ usbc0_orien_sw: endpoint {
+ remote-endpoint = <&usbdp_phy0_orientation_switch>;
+ };
+ };
+
+ port@2 {
+ reg = <2>;
+ dp_altmode_mux: endpoint {
+ remote-endpoint = <&usbdp_phy0_dp_altmode_mux>;
+ };
+ };
+ };
+ };
+ };
+};
+
&i2c6 {
status = "okay";
@@ -481,6 +565,16 @@ pcie3_vcc3v3_en: pcie3-vcc3v3-en {
rockchip,pins = <1 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
+
+ usb {
+ usbc0_int: usbc0-int {
+ rockchip,pins = <3 RK_PB4 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+
+ vbus5v0_typec_en: vbus5v0-typec-en {
+ rockchip,pins = <2 RK_PB6 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
};
&pwm1 {
@@ -866,6 +960,14 @@ &uart2 {
status = "okay";
};
+&u2phy0 {
+ status = "okay";
+};
+
+&u2phy0_otg {
+ status = "okay";
+};
+
&u2phy1 {
status = "okay";
};
@@ -893,6 +995,27 @@ &u2phy3_host {
status = "okay";
};
+&usbdp_phy0 {
+ mode-switch;
+ orientation-switch;
+ status = "okay";
+
+ port {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ usbdp_phy0_orientation_switch: endpoint@0 {
+ reg = <0>;
+ remote-endpoint = <&usbc0_orien_sw>;
+ };
+
+ usbdp_phy0_dp_altmode_mux: endpoint@1 {
+ reg = <1>;
+ remote-endpoint = <&dp_altmode_mux>;
+ };
+ };
+};
+
&usbdp_phy1 {
status = "okay";
};
@@ -905,6 +1028,20 @@ &usb_host0_ohci {
status = "okay";
};
+&usb_host0_xhci {
+ usb-role-switch;
+ status = "okay";
+
+ port {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ dwc3_0_role_switch: endpoint {
+ remote-endpoint = <&usbc0_role_sw>;
+ };
+ };
+};
+
&usb_host1_ehci {
status = "okay";
};
--
2.47.2Hi,
On Thu May 8, 2025 at 7:48 PM CEST, Sebastian Reichel wrote:
> Add hardware description for the USB-C port in the Radxa ROCK 5 Model B+
> This describes the OHCI, EHCI and XHCI USB parts, but not yet the DisplayPort
> AltMode, since the bindings for that are not yet upstream.
>
> Support for the ROCK 5B is prepared, but not exposed at the moment,
> since it results in unreliable boot behavior due to hard resets killing
> the supply voltage. Some further investigation and fixes in the kernel's
> Type-C Port Manager (TCPM) state machine is needed before exposing the
> port. The ROCK 5B+ has a dedicated port for powering the board and thus
> is not affected.
>
> Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
> ---
> .../boot/dts/rockchip/rk3588-rock-5b-plus.dts | 16 +++
> arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts | 23 ++++
> arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dtsi | 137 +++++++++++++++++++++
> 3 files changed, 176 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/rockchip/rk3588-rock-5b-plus.dts b/arch/arm64/boot/dts/rockchip/rk3588-rock-5b-plus.dts
> index 74c7b6502e4dda4b774f43c704ebaee350703c0d..4096cd853f9a909e4233d2c61a1fe5ee83904c4c 100644
> --- a/arch/arm64/boot/dts/rockchip/rk3588-rock-5b-plus.dts
> +++ b/arch/arm64/boot/dts/rockchip/rk3588-rock-5b-plus.dts
> @@ -99,12 +99,28 @@ pcie3x2_rst: pcie3x2-rst {
> };
>
> usb {
> + usbc_sbu_dc: usbc-sbu-dc {
> + rockchip,pins = <0 RK_PC4 RK_FUNC_GPIO &pcfg_pull_none>,
> + <0 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>;
> + };
> +
> vcc5v0_host_en: vcc5v0-host-en {
> rockchip,pins = <1 RK_PA1 RK_FUNC_GPIO &pcfg_pull_none>;
> };
> };
> };
>
> +&usbc0 {
> + status = "okay";
> +};
> +
> +&usbdp_phy0 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&usbc_sbu_dc>;
> + sbu1-dc-gpios = <&gpio0 RK_PC4 GPIO_ACTIVE_HIGH>;
> + sbu2-dc-gpios = <&gpio0 RK_PC5 GPIO_ACTIVE_HIGH>;
> +};
> +
> &vcc5v0_host {
> enable-active-high;
> gpio = <&gpio1 RK_PA1 GPIO_ACTIVE_HIGH>;
> diff --git a/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts b/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts
> index 9407a7c9910ada1f6c803d2e15785a9cbd9bd655..ab0c572ea9234f373af4a47db93fc1786f0e6fbf 100644
> --- a/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts
> +++ b/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts
> @@ -36,8 +36,20 @@ &uart6 {
> status = "okay";
> };
>
> +&usbdp_phy0 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&usbc_sbu_dc>;
> + sbu1-dc-gpios = <&gpio4 RK_PA6 GPIO_ACTIVE_HIGH>;
> + sbu2-dc-gpios = <&gpio4 RK_PA7 GPIO_ACTIVE_HIGH>;
> +};
> +
> &pinctrl {
> usb {
> + usbc_sbu_dc: usbc-sbu-dc {
> + rockchip,pins = <0 RK_PC4 RK_FUNC_GPIO &pcfg_pull_none>,
> + <0 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>;
Shouldn't these be <4 RK_PA6 ...> and <4 RK_PA7 ...> ?
In the rock5bp_v1.2 schematic they're (IIUC) GPIO0_C4 and _C5, but in
rock_5b_v1450 schematic TYPEC0_SBU1_DC and TYPEC0_SBU2_DC are on
GPIO4_A6 and GPIO4_A7.
And in rock_5b_v1450 GPIO0_C4 and _C5 are connected to WIFI_REG_ON_H and
BT_W AKE_HOST_H respectively.
Cheers,
Diederik
> + };
> +
> vcc5v0_host_en: vcc5v0-host-en {
> rockchip,pins = <4 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;
> };
> @@ -50,3 +62,14 @@ &vcc5v0_host {
> pinctrl-names = "default";
> pinctrl-0 = <&vcc5v0_host_en>;
> };
> +
> +/*
> + * Do not yet offer USB-C support on the Rock 5B. The current U-Boot
> + * Linux setup is quite unstable and for many power-supplies needs multiple
> + * hard resets to boot to userspace. Let's enable this once the issues
> + * in the TCPM kernel code have been solved. Without this any automated
> + * boot tests will run into problems.
> + */
> +/delete-node/ &usbc0;
> +/delete-node/ &usb_host0_xhci;
> +/delete-node/ &usbdp_phy0;
> diff --git a/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dtsi b/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dtsi
> index 6052787d2560978d2bae6cfbeea5fc1d419d583a..314fdc0c1c20b25b0fdc5254f3b090586c169a00 100644
> --- a/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dtsi
> +++ b/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dtsi
> @@ -5,6 +5,7 @@
> #include <dt-bindings/gpio/gpio.h>
> #include <dt-bindings/leds/common.h>
> #include <dt-bindings/soc/rockchip,vop2.h>
> +#include <dt-bindings/usb/pd.h>
> #include "rk3588.dtsi"
>
> / {
> @@ -92,6 +93,15 @@ rfkill-bt {
> shutdown-gpios = <&gpio3 RK_PD5 GPIO_ACTIVE_HIGH>;
> };
>
> + vcc12v_dcin: regulator-vcc12v-dcin {
> + compatible = "regulator-fixed";
> + regulator-name = "vcc12v_dcin";
> + regulator-always-on;
> + regulator-boot-on;
> + regulator-min-microvolt = <12000000>;
> + regulator-max-microvolt = <12000000>;
> + };
> +
> vcc3v3_pcie2x1l0: regulator-vcc3v3-pcie2x1l0 {
> compatible = "regulator-fixed";
> enable-active-high;
> @@ -146,6 +156,19 @@ vcc5v0_sys: regulator-vcc5v0-sys {
> regulator-boot-on;
> regulator-min-microvolt = <5000000>;
> regulator-max-microvolt = <5000000>;
> + vin-supply = <&vcc12v_dcin>;
> + };
> +
> + vbus5v0_typec: vbus5v0-typec {
> + compatible = "regulator-fixed";
> + enable-active-high;
> + gpio = <&gpio2 RK_PB6 GPIO_ACTIVE_HIGH>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&vbus5v0_typec_en>;
> + regulator-name = "vbus5v0_typec";
> + regulator-min-microvolt = <5000000>;
> + regulator-max-microvolt = <5000000>;
> + vin-supply = <&vcc5v0_sys>;
> };
>
> vcc_1v1_nldo_s3: regulator-vcc-1v1-nldo-s3 {
> @@ -309,6 +332,67 @@ regulator-state-mem {
> };
> };
>
> +&i2c4 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&i2c4m1_xfer>;
> + status = "okay";
> +
> + usbc0: usb-typec@22 {
> + compatible = "fcs,fusb302";
> + reg = <0x22>;
> + interrupt-parent = <&gpio3>;
> + interrupts = <RK_PB4 IRQ_TYPE_LEVEL_LOW>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&usbc0_int>;
> + vbus-supply = <&vbus5v0_typec>;
> + /*
> + * When the board is starting to send power-delivery messages
> + * too late (5 seconds according to the specification), the
> + * power-supply reacts with a hard-reset. That removes the
> + * power from VBUS for some time, which resets te whole board.
> + */
> + status = "fail";
> +
> + usb_con: connector {
> + compatible = "usb-c-connector";
> + label = "USB-C";
> + data-role = "dual";
> + power-role = "sink";
> + try-power-role = "sink";
> + op-sink-microwatt = <1000000>;
> + sink-pdos =
> + <PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM)>,
> + <PDO_VAR(5000, 20000, 5000)>;
> +
> + ports {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + port@0 {
> + reg = <0>;
> + usbc0_role_sw: endpoint {
> + remote-endpoint = <&dwc3_0_role_switch>;
> + };
> + };
> +
> + port@1 {
> + reg = <1>;
> + usbc0_orien_sw: endpoint {
> + remote-endpoint = <&usbdp_phy0_orientation_switch>;
> + };
> + };
> +
> + port@2 {
> + reg = <2>;
> + dp_altmode_mux: endpoint {
> + remote-endpoint = <&usbdp_phy0_dp_altmode_mux>;
> + };
> + };
> + };
> + };
> + };
> +};
> +
> &i2c6 {
> status = "okay";
>
> @@ -481,6 +565,16 @@ pcie3_vcc3v3_en: pcie3-vcc3v3-en {
> rockchip,pins = <1 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>;
> };
> };
> +
> + usb {
> + usbc0_int: usbc0-int {
> + rockchip,pins = <3 RK_PB4 RK_FUNC_GPIO &pcfg_pull_none>;
> + };
> +
> + vbus5v0_typec_en: vbus5v0-typec-en {
> + rockchip,pins = <2 RK_PB6 RK_FUNC_GPIO &pcfg_pull_none>;
> + };
> + };
> };
>
> &pwm1 {
> @@ -866,6 +960,14 @@ &uart2 {
> status = "okay";
> };
>
> +&u2phy0 {
> + status = "okay";
> +};
> +
> +&u2phy0_otg {
> + status = "okay";
> +};
> +
> &u2phy1 {
> status = "okay";
> };
> @@ -893,6 +995,27 @@ &u2phy3_host {
> status = "okay";
> };
>
> +&usbdp_phy0 {
> + mode-switch;
> + orientation-switch;
> + status = "okay";
> +
> + port {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + usbdp_phy0_orientation_switch: endpoint@0 {
> + reg = <0>;
> + remote-endpoint = <&usbc0_orien_sw>;
> + };
> +
> + usbdp_phy0_dp_altmode_mux: endpoint@1 {
> + reg = <1>;
> + remote-endpoint = <&dp_altmode_mux>;
> + };
> + };
> +};
> +
> &usbdp_phy1 {
> status = "okay";
> };
> @@ -905,6 +1028,20 @@ &usb_host0_ohci {
> status = "okay";
> };
>
> +&usb_host0_xhci {
> + usb-role-switch;
> + status = "okay";
> +
> + port {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + dwc3_0_role_switch: endpoint {
> + remote-endpoint = <&usbc0_role_sw>;
> + };
> + };
> +};
> +
> &usb_host1_ehci {
> status = "okay";
> };
Hi,
On Fri, May 09, 2025 at 03:18:04PM +0200, Diederik de Haas wrote:
> On Thu May 8, 2025 at 7:48 PM CEST, Sebastian Reichel wrote:
> > Add hardware description for the USB-C port in the Radxa ROCK 5 Model B+
> > This describes the OHCI, EHCI and XHCI USB parts, but not yet the DisplayPort
> > AltMode, since the bindings for that are not yet upstream.
> >
> > Support for the ROCK 5B is prepared, but not exposed at the moment,
> > since it results in unreliable boot behavior due to hard resets killing
> > the supply voltage. Some further investigation and fixes in the kernel's
> > Type-C Port Manager (TCPM) state machine is needed before exposing the
> > port. The ROCK 5B+ has a dedicated port for powering the board and thus
> > is not affected.
> >
> > Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
> > ---
> > .../boot/dts/rockchip/rk3588-rock-5b-plus.dts | 16 +++
> > arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts | 23 ++++
> > arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dtsi | 137 +++++++++++++++++++++
> > 3 files changed, 176 insertions(+)
> >
> > diff --git a/arch/arm64/boot/dts/rockchip/rk3588-rock-5b-plus.dts b/arch/arm64/boot/dts/rockchip/rk3588-rock-5b-plus.dts
> > index 74c7b6502e4dda4b774f43c704ebaee350703c0d..4096cd853f9a909e4233d2c61a1fe5ee83904c4c 100644
> > --- a/arch/arm64/boot/dts/rockchip/rk3588-rock-5b-plus.dts
> > +++ b/arch/arm64/boot/dts/rockchip/rk3588-rock-5b-plus.dts
> > @@ -99,12 +99,28 @@ pcie3x2_rst: pcie3x2-rst {
> > };
> >
> > usb {
> > + usbc_sbu_dc: usbc-sbu-dc {
> > + rockchip,pins = <0 RK_PC4 RK_FUNC_GPIO &pcfg_pull_none>,
> > + <0 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>;
> > + };
> > +
> > vcc5v0_host_en: vcc5v0-host-en {
> > rockchip,pins = <1 RK_PA1 RK_FUNC_GPIO &pcfg_pull_none>;
> > };
> > };
> > };
> >
> > +&usbc0 {
> > + status = "okay";
> > +};
> > +
> > +&usbdp_phy0 {
> > + pinctrl-names = "default";
> > + pinctrl-0 = <&usbc_sbu_dc>;
> > + sbu1-dc-gpios = <&gpio0 RK_PC4 GPIO_ACTIVE_HIGH>;
> > + sbu2-dc-gpios = <&gpio0 RK_PC5 GPIO_ACTIVE_HIGH>;
> > +};
> > +
> > &vcc5v0_host {
> > enable-active-high;
> > gpio = <&gpio1 RK_PA1 GPIO_ACTIVE_HIGH>;
> > diff --git a/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts b/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts
> > index 9407a7c9910ada1f6c803d2e15785a9cbd9bd655..ab0c572ea9234f373af4a47db93fc1786f0e6fbf 100644
> > --- a/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts
> > +++ b/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts
> > @@ -36,8 +36,20 @@ &uart6 {
> > status = "okay";
> > };
> >
> > +&usbdp_phy0 {
> > + pinctrl-names = "default";
> > + pinctrl-0 = <&usbc_sbu_dc>;
> > + sbu1-dc-gpios = <&gpio4 RK_PA6 GPIO_ACTIVE_HIGH>;
> > + sbu2-dc-gpios = <&gpio4 RK_PA7 GPIO_ACTIVE_HIGH>;
> > +};
> > +
> > &pinctrl {
> > usb {
> > + usbc_sbu_dc: usbc-sbu-dc {
> > + rockchip,pins = <0 RK_PC4 RK_FUNC_GPIO &pcfg_pull_none>,
> > + <0 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>;
>
> Shouldn't these be <4 RK_PA6 ...> and <4 RK_PA7 ...> ?
>
> In the rock5bp_v1.2 schematic they're (IIUC) GPIO0_C4 and _C5, but in
> rock_5b_v1450 schematic TYPEC0_SBU1_DC and TYPEC0_SBU2_DC are on
> GPIO4_A6 and GPIO4_A7.
>
> And in rock_5b_v1450 GPIO0_C4 and _C5 are connected to WIFI_REG_ON_H and
> BT_W AKE_HOST_H respectively.
Yes. I screwed that up when copying over the new pinctrl from the
5B+. FWIW I'm not very happy about the /delete-node/ hack anyways.
Let's postpone (drop) this patch adding USB-C support for now. Hopefully
I soon find a way to get the PD sink more stable.
Greetings,
-- Sebastian
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