Add compatible for qcs8300 platform, with sa8775p as the fallback.
Signed-off-by: Ziyue Zhang <quic_ziyuzhan@quicinc.com>
---
.../bindings/pci/qcom,pcie-sa8775p.yaml | 26 ++++++++++++++-----
1 file changed, 19 insertions(+), 7 deletions(-)
diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie-sa8775p.yaml b/Documentation/devicetree/bindings/pci/qcom,pcie-sa8775p.yaml
index efde49d1bef8..154bb60be402 100644
--- a/Documentation/devicetree/bindings/pci/qcom,pcie-sa8775p.yaml
+++ b/Documentation/devicetree/bindings/pci/qcom,pcie-sa8775p.yaml
@@ -16,7 +16,12 @@ description:
properties:
compatible:
- const: qcom,pcie-sa8775p
+ oneOf:
+ - const: qcom,pcie-sa8775p
+ - items:
+ - enum:
+ - qcom,pcie-qcs8300
+ - const: qcom,pcie-sa8775p
reg:
minItems: 6
@@ -45,7 +50,7 @@ properties:
interrupts:
minItems: 8
- maxItems: 8
+ maxItems: 9
interrupt-names:
items:
@@ -57,13 +62,16 @@ properties:
- const: msi5
- const: msi6
- const: msi7
+ - const: global
resets:
- maxItems: 1
+ minItems: 1
+ maxItems: 2
reset-names:
items:
- const: pci
+ - const: link_down
required:
- interconnects
@@ -129,7 +137,8 @@ examples:
<GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>;
+ <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 518 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "msi0",
"msi1",
"msi2",
@@ -137,7 +146,8 @@ examples:
"msi4",
"msi5",
"msi6",
- "msi7";
+ "msi7",
+ "global";
#interrupt-cells = <1>;
interrupt-map-mask = <0 0 0 0x7>;
interrupt-map = <0 0 0 1 &intc GIC_SPI 434 IRQ_TYPE_LEVEL_HIGH>,
@@ -157,8 +167,10 @@ examples:
power-domains = <&gcc PCIE_0_GDSC>;
- resets = <&gcc GCC_PCIE_0_BCR>;
- reset-names = "pci";
+ resets = <&gcc GCC_PCIE_1_BCR>,
+ <&gcc GCC_PCIE_1_LINK_DOWN_BCR>;
+ reset-names = "pci",
+ "link_down";
perst-gpios = <&tlmm 2 GPIO_ACTIVE_LOW>;
wake-gpios = <&tlmm 0 GPIO_ACTIVE_HIGH>;
--
2.34.1On Wed, May 07, 2025 at 11:10:15AM GMT, Ziyue Zhang wrote: > Add compatible for qcs8300 platform, with sa8775p as the fallback. > > Signed-off-by: Ziyue Zhang <quic_ziyuzhan@quicinc.com> > --- > .../bindings/pci/qcom,pcie-sa8775p.yaml | 26 ++++++++++++++----- > 1 file changed, 19 insertions(+), 7 deletions(-) > > diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie-sa8775p.yaml b/Documentation/devicetree/bindings/pci/qcom,pcie-sa8775p.yaml > index efde49d1bef8..154bb60be402 100644 > --- a/Documentation/devicetree/bindings/pci/qcom,pcie-sa8775p.yaml > +++ b/Documentation/devicetree/bindings/pci/qcom,pcie-sa8775p.yaml > @@ -16,7 +16,12 @@ description: > > properties: > compatible: > - const: qcom,pcie-sa8775p > + oneOf: > + - const: qcom,pcie-sa8775p > + - items: > + - enum: > + - qcom,pcie-qcs8300 > + - const: qcom,pcie-sa8775p > > reg: > minItems: 6 > @@ -45,7 +50,7 @@ properties: > > interrupts: > minItems: 8 > - maxItems: 8 > + maxItems: 9 I don't understand why this is flexible for sa8775p. I assume this wasn't tested or finished, just like your previous patch suggested. Please send complete bindings once you finish them or explain what exactly changed in the meantime. Best regards, Krzysztof
On 5/7/2025 1:10 PM, Krzysztof Kozlowski wrote: > On Wed, May 07, 2025 at 11:10:15AM GMT, Ziyue Zhang wrote: >> Add compatible for qcs8300 platform, with sa8775p as the fallback. >> >> Signed-off-by: Ziyue Zhang <quic_ziyuzhan@quicinc.com> >> --- >> .../bindings/pci/qcom,pcie-sa8775p.yaml | 26 ++++++++++++++----- >> 1 file changed, 19 insertions(+), 7 deletions(-) >> >> diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie-sa8775p.yaml b/Documentation/devicetree/bindings/pci/qcom,pcie-sa8775p.yaml >> index efde49d1bef8..154bb60be402 100644 >> --- a/Documentation/devicetree/bindings/pci/qcom,pcie-sa8775p.yaml >> +++ b/Documentation/devicetree/bindings/pci/qcom,pcie-sa8775p.yaml >> @@ -16,7 +16,12 @@ description: >> >> properties: >> compatible: >> - const: qcom,pcie-sa8775p >> + oneOf: >> + - const: qcom,pcie-sa8775p >> + - items: >> + - enum: >> + - qcom,pcie-qcs8300 >> + - const: qcom,pcie-sa8775p >> >> reg: >> minItems: 6 >> @@ -45,7 +50,7 @@ properties: >> >> interrupts: >> minItems: 8 >> - maxItems: 8 >> + maxItems: 9 > I don't understand why this is flexible for sa8775p. I assume this > wasn't tested or finished, just like your previous patch suggested. > > Please send complete bindings once you finish them or explain what > exactly changed in the meantime. > > Best regards, > Krzysztof Hi Krzysztof Global interrupt is optional in the PCIe driver. It is not present in the SA8775p PCIe device tree node, but it is required for the QCS8300 I did the DTBs and yaml checks before pushing this patch. This is how I became aware that `maxItem` needed to be changed to 9. BRs Ziyue
On 07/05/2025 10:19, Ziyue Zhang wrote: > > On 5/7/2025 1:10 PM, Krzysztof Kozlowski wrote: >> On Wed, May 07, 2025 at 11:10:15AM GMT, Ziyue Zhang wrote: >>> Add compatible for qcs8300 platform, with sa8775p as the fallback. >>> >>> Signed-off-by: Ziyue Zhang <quic_ziyuzhan@quicinc.com> >>> --- >>> .../bindings/pci/qcom,pcie-sa8775p.yaml | 26 ++++++++++++++----- >>> 1 file changed, 19 insertions(+), 7 deletions(-) >>> >>> diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie-sa8775p.yaml b/Documentation/devicetree/bindings/pci/qcom,pcie-sa8775p.yaml >>> index efde49d1bef8..154bb60be402 100644 >>> --- a/Documentation/devicetree/bindings/pci/qcom,pcie-sa8775p.yaml >>> +++ b/Documentation/devicetree/bindings/pci/qcom,pcie-sa8775p.yaml >>> @@ -16,7 +16,12 @@ description: >>> >>> properties: >>> compatible: >>> - const: qcom,pcie-sa8775p >>> + oneOf: >>> + - const: qcom,pcie-sa8775p >>> + - items: >>> + - enum: >>> + - qcom,pcie-qcs8300 >>> + - const: qcom,pcie-sa8775p >>> >>> reg: >>> minItems: 6 >>> @@ -45,7 +50,7 @@ properties: >>> >>> interrupts: >>> minItems: 8 >>> - maxItems: 8 >>> + maxItems: 9 >> I don't understand why this is flexible for sa8775p. I assume this >> wasn't tested or finished, just like your previous patch suggested. >> >> Please send complete bindings once you finish them or explain what >> exactly changed in the meantime. >> >> Best regards, >> Krzysztof > > Hi Krzysztof > Global interrupt is optional in the PCIe driver. It is not present in > the SA8775p PCIe device tree node, but it is required for the QCS8300 And hardware? > I did the DTBs and yaml checks before pushing this patch. This is how > I became aware that `maxItem` needed to be changed to 9. If it is required for QCS8300, then you are supposed to make it required in the binding for this device. Look at other bindings. Best regards, Krzysztof
On 5/7/2025 4:25 PM, Krzysztof Kozlowski wrote: > On 07/05/2025 10:19, Ziyue Zhang wrote: >> On 5/7/2025 1:10 PM, Krzysztof Kozlowski wrote: >>> On Wed, May 07, 2025 at 11:10:15AM GMT, Ziyue Zhang wrote: >>>> Add compatible for qcs8300 platform, with sa8775p as the fallback. >>>> >>>> Signed-off-by: Ziyue Zhang <quic_ziyuzhan@quicinc.com> >>>> --- >>>> .../bindings/pci/qcom,pcie-sa8775p.yaml | 26 ++++++++++++++----- >>>> 1 file changed, 19 insertions(+), 7 deletions(-) >>>> >>>> diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie-sa8775p.yaml b/Documentation/devicetree/bindings/pci/qcom,pcie-sa8775p.yaml >>>> index efde49d1bef8..154bb60be402 100644 >>>> --- a/Documentation/devicetree/bindings/pci/qcom,pcie-sa8775p.yaml >>>> +++ b/Documentation/devicetree/bindings/pci/qcom,pcie-sa8775p.yaml >>>> @@ -16,7 +16,12 @@ description: >>>> >>>> properties: >>>> compatible: >>>> - const: qcom,pcie-sa8775p >>>> + oneOf: >>>> + - const: qcom,pcie-sa8775p >>>> + - items: >>>> + - enum: >>>> + - qcom,pcie-qcs8300 >>>> + - const: qcom,pcie-sa8775p >>>> >>>> reg: >>>> minItems: 6 >>>> @@ -45,7 +50,7 @@ properties: >>>> >>>> interrupts: >>>> minItems: 8 >>>> - maxItems: 8 >>>> + maxItems: 9 >>> I don't understand why this is flexible for sa8775p. I assume this >>> wasn't tested or finished, just like your previous patch suggested. >>> >>> Please send complete bindings once you finish them or explain what >>> exactly changed in the meantime. >>> >>> Best regards, >>> Krzysztof >> Hi Krzysztof >> Global interrupt is optional in the PCIe driver. It is not present in >> the SA8775p PCIe device tree node, but it is required for the QCS8300 > And hardware? The PCIe controller on the SA8775p is also capable of generating a global interrupt. >> I did the DTBs and yaml checks before pushing this patch. This is how >> I became aware that `maxItem` needed to be changed to 9. > If it is required for QCS8300, then you are supposed to make it required > in the binding for this device. Look at other bindings. The global interrupt is not mandatory. The PCIe driver can still function without this interrupt, but it will offer a better user experience when the device is plugged in or removed. On other platforms, the global interrupt is also optional, and `minItems` and `maxItems` are set to 8 and 9 respectively. Please refer to `qcom,pcie - sm8550.yaml`, `qcom,pcie - sm8450.yaml`, and `qcom,pcie - x1e80100.yaml`. > > Best regards, > Krzysztof -- With best wishes Qiang Yu
On 07/05/2025 11:56, Qiang Yu wrote: > > On 5/7/2025 4:25 PM, Krzysztof Kozlowski wrote: >> On 07/05/2025 10:19, Ziyue Zhang wrote: >>> On 5/7/2025 1:10 PM, Krzysztof Kozlowski wrote: >>>> On Wed, May 07, 2025 at 11:10:15AM GMT, Ziyue Zhang wrote: >>>>> Add compatible for qcs8300 platform, with sa8775p as the fallback. >>>>> >>>>> Signed-off-by: Ziyue Zhang <quic_ziyuzhan@quicinc.com> >>>>> --- >>>>> .../bindings/pci/qcom,pcie-sa8775p.yaml | 26 ++++++++++++++----- >>>>> 1 file changed, 19 insertions(+), 7 deletions(-) >>>>> >>>>> diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie-sa8775p.yaml b/Documentation/devicetree/bindings/pci/qcom,pcie-sa8775p.yaml >>>>> index efde49d1bef8..154bb60be402 100644 >>>>> --- a/Documentation/devicetree/bindings/pci/qcom,pcie-sa8775p.yaml >>>>> +++ b/Documentation/devicetree/bindings/pci/qcom,pcie-sa8775p.yaml >>>>> @@ -16,7 +16,12 @@ description: >>>>> >>>>> properties: >>>>> compatible: >>>>> - const: qcom,pcie-sa8775p >>>>> + oneOf: >>>>> + - const: qcom,pcie-sa8775p >>>>> + - items: >>>>> + - enum: >>>>> + - qcom,pcie-qcs8300 >>>>> + - const: qcom,pcie-sa8775p >>>>> >>>>> reg: >>>>> minItems: 6 >>>>> @@ -45,7 +50,7 @@ properties: >>>>> >>>>> interrupts: >>>>> minItems: 8 >>>>> - maxItems: 8 >>>>> + maxItems: 9 >>>> I don't understand why this is flexible for sa8775p. I assume this >>>> wasn't tested or finished, just like your previous patch suggested. >>>> >>>> Please send complete bindings once you finish them or explain what >>>> exactly changed in the meantime. >>>> >>>> Best regards, >>>> Krzysztof >>> Hi Krzysztof >>> Global interrupt is optional in the PCIe driver. It is not present in >>> the SA8775p PCIe device tree node, but it is required for the QCS8300 >> And hardware? > > The PCIe controller on the SA8775p is also capable of generating a global > interrupt. >>> I did the DTBs and yaml checks before pushing this patch. This is how >>> I became aware that `maxItem` needed to be changed to 9. >> If it is required for QCS8300, then you are supposed to make it required >> in the binding for this device. Look at other bindings. > > The global interrupt is not mandatory. The PCIe driver can still function > without this interrupt, but it will offer a better user experience when > the device is plugged in or removed. On other platforms, the global > interrupt is also optional, and `minItems` and `maxItems` are set to 8 and > 9 respectively. Please refer to `qcom,pcie - sm8550.yaml`, > `qcom,pcie - sm8450.yaml`, and `qcom,pcie - x1e80100.yaml`. I don't know what does it prove. You cannot add requirement of global interrupt to existing devices because it would be an ABI break. Best regards, Krzysztof
On 5/7/2025 6:03 PM, Krzysztof Kozlowski wrote: > On 07/05/2025 11:56, Qiang Yu wrote: >> On 5/7/2025 4:25 PM, Krzysztof Kozlowski wrote: >>> On 07/05/2025 10:19, Ziyue Zhang wrote: >>>> On 5/7/2025 1:10 PM, Krzysztof Kozlowski wrote: >>>>> On Wed, May 07, 2025 at 11:10:15AM GMT, Ziyue Zhang wrote: >>>>>> Add compatible for qcs8300 platform, with sa8775p as the fallback. >>>>>> >>>>>> Signed-off-by: Ziyue Zhang <quic_ziyuzhan@quicinc.com> >>>>>> --- >>>>>> .../bindings/pci/qcom,pcie-sa8775p.yaml | 26 ++++++++++++++----- >>>>>> 1 file changed, 19 insertions(+), 7 deletions(-) >>>>>> >>>>>> diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie-sa8775p.yaml b/Documentation/devicetree/bindings/pci/qcom,pcie-sa8775p.yaml >>>>>> index efde49d1bef8..154bb60be402 100644 >>>>>> --- a/Documentation/devicetree/bindings/pci/qcom,pcie-sa8775p.yaml >>>>>> +++ b/Documentation/devicetree/bindings/pci/qcom,pcie-sa8775p.yaml >>>>>> @@ -16,7 +16,12 @@ description: >>>>>> >>>>>> properties: >>>>>> compatible: >>>>>> - const: qcom,pcie-sa8775p >>>>>> + oneOf: >>>>>> + - const: qcom,pcie-sa8775p >>>>>> + - items: >>>>>> + - enum: >>>>>> + - qcom,pcie-qcs8300 >>>>>> + - const: qcom,pcie-sa8775p >>>>>> >>>>>> reg: >>>>>> minItems: 6 >>>>>> @@ -45,7 +50,7 @@ properties: >>>>>> >>>>>> interrupts: >>>>>> minItems: 8 >>>>>> - maxItems: 8 >>>>>> + maxItems: 9 >>>>> I don't understand why this is flexible for sa8775p. I assume this >>>>> wasn't tested or finished, just like your previous patch suggested. >>>>> >>>>> Please send complete bindings once you finish them or explain what >>>>> exactly changed in the meantime. >>>>> >>>>> Best regards, >>>>> Krzysztof >>>> Hi Krzysztof >>>> Global interrupt is optional in the PCIe driver. It is not present in >>>> the SA8775p PCIe device tree node, but it is required for the QCS8300 >>> And hardware? >> The PCIe controller on the SA8775p is also capable of generating a global >> interrupt. >>>> I did the DTBs and yaml checks before pushing this patch. This is how >>>> I became aware that `maxItem` needed to be changed to 9. >>> If it is required for QCS8300, then you are supposed to make it required >>> in the binding for this device. Look at other bindings. >> The global interrupt is not mandatory. The PCIe driver can still function >> without this interrupt, but it will offer a better user experience when >> the device is plugged in or removed. On other platforms, the global >> interrupt is also optional, and `minItems` and `maxItems` are set to 8 and >> 9 respectively. Please refer to `qcom,pcie - sm8550.yaml`, >> `qcom,pcie - sm8450.yaml`, and `qcom,pcie - x1e80100.yaml`. > I don't know what does it prove. You cannot add requirement of global > interrupt to existing devices because it would be an ABI break. IIUC, this will not break ABI because pcie_qcom.c parses this irq using "irq = platform_get_irq_byname_optional(pdev, "global");" > > Best regards, > Krzysztof -- With best wishes Qiang Yu
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