qcs8300 pcie1 phy use the same clocks as sa8775p, in the review comments
of qcs8300 patches, gcc aux clock should be removed and replace it with
phy_aux clock.So move "qcom,sa8775p-qmp-gen4x4-pcie-phy" compatible from
7 clocks' list to 6 clocks' list to solve the dtb check error.

qcs8300 pcie phy only use 6 clocks, so move qcs8300 gen4x2 pcie phy
compatible from 7 clocks' list to 6 clocks' list.

Signed-off-by: Ziyue Zhang <quic_ziyuzhan@quicinc.com>
---
 .../devicetree/bindings/phy/qcom,sc8280xp-qmp-pcie-phy.yaml   | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-pcie-phy.yaml b/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-pcie-phy.yaml
index 2c6c9296e4c0..a11a7e78636d 100644
--- a/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-pcie-phy.yaml
+++ b/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-pcie-phy.yaml
@@ -176,6 +176,8 @@ allOf:
           contains:
             enum:
               - qcom,qcs615-qmp-gen3x1-pcie-phy
+              - qcom,qcs8300-qmp-gen4x2-pcie-phy
+              - qcom,sa8775p-qmp-gen4x4-pcie-phy
               - qcom,sc8280xp-qmp-gen3x1-pcie-phy
               - qcom,sc8280xp-qmp-gen3x2-pcie-phy
               - qcom,sc8280xp-qmp-gen3x4-pcie-phy
@@ -196,9 +198,7 @@ allOf:
         compatible:
           contains:
             enum:
-              - qcom,qcs8300-qmp-gen4x2-pcie-phy
               - qcom,sa8775p-qmp-gen4x2-pcie-phy
-              - qcom,sa8775p-qmp-gen4x4-pcie-phy
     then:
       properties:
         clocks:
-- 
2.34.1

On Wed, May 07, 2025 at 11:10:14AM GMT, Ziyue Zhang wrote:
> qcs8300 pcie1 phy use the same clocks as sa8775p, in the review comments
> of qcs8300 patches, gcc aux clock should be removed and replace it with
> phy_aux clock.So move "qcom,sa8775p-qmp-gen4x4-pcie-phy" compatible from
> 7 clocks' list to 6 clocks' list to solve the dtb check error.
> 
> qcs8300 pcie phy only use 6 clocks, so move qcs8300 gen4x2 pcie phy
> compatible from 7 clocks' list to 6 clocks' list.

I don't understand any of this. You just submitted the bindings not so
far ago. Does this mean they were never tested?

What does it mean that gcc aux clock should be removed in the review
comments?

Best regards,
Krzysztof

Hi Krzysztof

In the first place I upstreamed the dt-bindings for QCS8300 PCIe PHY, I 
did the checking for both DTBs and yaml. The dt-binding patch got 
applied but gcc_aux_clk is recommended to be removed from PCIe PHY 
device tree node, so I need to update the bindings, number of clocks 
required by the PHY is changed to 6 from 7. BRs Ziyue

在 5/7/2025 1:09 PM, Krzysztof Kozlowski 写道:
> On Wed, May 07, 2025 at 11:10:14AM GMT, Ziyue Zhang wrote:
>> qcs8300 pcie1 phy use the same clocks as sa8775p, in the review comments
>> of qcs8300 patches, gcc aux clock should be removed and replace it with
>> phy_aux clock.So move "qcom,sa8775p-qmp-gen4x4-pcie-phy" compatible from
>> 7 clocks' list to 6 clocks' list to solve the dtb check error.
>>
>> qcs8300 pcie phy only use 6 clocks, so move qcs8300 gen4x2 pcie phy
>> compatible from 7 clocks' list to 6 clocks' list.
> I don't understand any of this. You just submitted the bindings not so
> far ago. Does this mean they were never tested?
>
> What does it mean that gcc aux clock should be removed in the review
> comments?
>
> Best regards,
> Krzysztof
>