Update text binding to YAML.
Changes during conversion:
- Add a fallback for "nvidia,tegra30-apbdma" as it is
  compatible with the IP core on "nvidia,tegra20-apbdma".
- Update examples and include appropriate file directives to resolve
  errors identified by `dt_binding_check` and `dtbs_check`.

Signed-off-by: Charan Pedumuru <charan.pedumuru@gmail.com>
---
 .../bindings/dma/nvidia,tegra20-apbdma.txt         | 44 -----------
 .../bindings/dma/nvidia,tegra20-apbdma.yaml        | 89 ++++++++++++++++++++++
 2 files changed, 89 insertions(+), 44 deletions(-)

diff --git a/Documentation/devicetree/bindings/dma/nvidia,tegra20-apbdma.txt b/Documentation/devicetree/bindings/dma/nvidia,tegra20-apbdma.txt
deleted file mode 100644
index 447fb44e7abeaa7ca3010b9518533e786cce56a8..0000000000000000000000000000000000000000
--- a/Documentation/devicetree/bindings/dma/nvidia,tegra20-apbdma.txt
+++ /dev/null
@@ -1,44 +0,0 @@
-* NVIDIA Tegra APB DMA controller
-
-Required properties:
-- compatible: Should be "nvidia,<chip>-apbdma"
-- reg: Should contain DMA registers location and length. This should include
-  all of the per-channel registers.
-- interrupts: Should contain all of the per-channel DMA interrupts.
-- clocks: Must contain one entry, for the module clock.
-  See ../clocks/clock-bindings.txt for details.
-- resets : Must contain an entry for each entry in reset-names.
-  See ../reset/reset.txt for details.
-- reset-names : Must include the following entries:
-  - dma
-- #dma-cells : Must be <1>. This dictates the length of DMA specifiers in
-  client nodes' dmas properties. The specifier represents the DMA request
-  select value for the peripheral. For more details, consult the Tegra TRM's
-  documentation of the APB DMA channel control register REQ_SEL field.
-
-Examples:
-
-apbdma: dma@6000a000 {
-	compatible = "nvidia,tegra20-apbdma";
-	reg = <0x6000a000 0x1200>;
-	interrupts = < 0 136 0x04
-		       0 137 0x04
-		       0 138 0x04
-		       0 139 0x04
-		       0 140 0x04
-		       0 141 0x04
-		       0 142 0x04
-		       0 143 0x04
-		       0 144 0x04
-		       0 145 0x04
-		       0 146 0x04
-		       0 147 0x04
-		       0 148 0x04
-		       0 149 0x04
-		       0 150 0x04
-		       0 151 0x04 >;
-	clocks = <&tegra_car 34>;
-	resets = <&tegra_car 34>;
-	reset-names = "dma";
-	#dma-cells = <1>;
-};
diff --git a/Documentation/devicetree/bindings/dma/nvidia,tegra20-apbdma.yaml b/Documentation/devicetree/bindings/dma/nvidia,tegra20-apbdma.yaml
new file mode 100644
index 0000000000000000000000000000000000000000..9ff2bc279f839658e707552856ab5f559093ff33
--- /dev/null
+++ b/Documentation/devicetree/bindings/dma/nvidia,tegra20-apbdma.yaml
@@ -0,0 +1,89 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/dma/nvidia,tegra20-apbdma.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: NVIDIA Tegra APB DMA Controller
+
+description:
+  The NVIDIA Tegra APB DMA controller is a hardware component that
+  enables direct memory access (DMA) on Tegra systems. It facilitates
+  data transfer between I/O devices and main memory without constant
+  CPU intervention.
+
+maintainers:
+  - Jonathan Hunter <jonathanh@nvidia.com>
+
+properties:
+  compatible:
+    oneOf:
+      - const: nvidia,tegra20-apbdma
+      - items:
+          - const: nvidia,tegra30-apbdma
+          - const: nvidia,tegra20-apbdma
+
+  reg:
+    maxItems: 1
+
+  "#dma-cells":
+    const: 1
+
+  clocks:
+    maxItems: 1
+
+  interrupts:
+    description:
+      Should contain all of the per-channel DMA interrupts in
+      ascending order with respect to the DMA channel index.
+    minItems: 1
+    maxItems: 32
+
+  resets:
+    maxItems: 1
+
+  reset-names:
+    const: dma
+
+required:
+  - compatible
+  - reg
+  - "#dma-cells"
+  - clocks
+  - interrupts
+  - resets
+  - reset-names
+
+allOf:
+  - $ref: dma-controller.yaml#
+
+unevaluatedProperties: false
+
+examples:
+  - |
+    #include <dt-bindings/reset/tegra186-reset.h>
+    dma-controller@6000a000 {
+        compatible = "nvidia,tegra30-apbdma", "nvidia,tegra20-apbdma";
+        reg = <0x6000a000 0x1200>;
+        interrupts = <0 136 0x04>,
+                     <0 137 0x04>,
+                     <0 138 0x04>,
+                     <0 139 0x04>,
+                     <0 140 0x04>,
+                     <0 141 0x04>,
+                     <0 142 0x04>,
+                     <0 143 0x04>,
+                     <0 144 0x04>,
+                     <0 145 0x04>,
+                     <0 146 0x04>,
+                     <0 147 0x04>,
+                     <0 148 0x04>,
+                     <0 149 0x04>,
+                     <0 150 0x04>,
+                     <0 151 0x04>;
+        clocks = <&tegra_car 34>;
+        resets = <&tegra_car 34>;
+        reset-names = "dma";
+        #dma-cells = <1>;
+    };
+...

-- 
2.43.0

On 06/05/2025 13:02, Charan Pedumuru wrote:
> +
> +allOf:
> +  - $ref: dma-controller.yaml#
> +
> +unevaluatedProperties: false
> +
> +examples:
> +  - |
> +    #include <dt-bindings/reset/tegra186-reset.h>
> +    dma-controller@6000a000 {
> +        compatible = "nvidia,tegra30-apbdma", "nvidia,tegra20-apbdma";
> +        reg = <0x6000a000 0x1200>;
> +        interrupts = <0 136 0x04>,

You gave me little time to respond - 15 minutes - and then you sent v3.

Use the header and its defines instead of hard-coding it. Wasn't this
the entire point why you included the header in the first place in v1?
Otherwise why was it included?

> 


Best regards,
Krzysztof

On 06-05-2025 16:42, Krzysztof Kozlowski wrote:
> On 06/05/2025 13:02, Charan Pedumuru wrote:
>> +
>> +allOf:
>> +  - $ref: dma-controller.yaml#
>> +
>> +unevaluatedProperties: false
>> +
>> +examples:
>> +  - |
>> +    #include <dt-bindings/reset/tegra186-reset.h>
>> +    dma-controller@6000a000 {
>> +        compatible = "nvidia,tegra30-apbdma", "nvidia,tegra20-apbdma";
>> +        reg = <0x6000a000 0x1200>;
>> +        interrupts = <0 136 0x04>,
> 
> You gave me little time to respond - 15 minutes - and then you sent v3.
> 
> Use the header and its defines instead of hard-coding it. Wasn't this
> the entire point why you included the header in the first place in v1?
> Otherwise why was it included?


Oh my bad, now I got it, I will use #include <dt-bindings/interrupt-controller/arm-gic.h> header and redefine the interrupts with 
interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH> format instead of hard coding. Thanks for your patience and clarification.

> 
>>
> 
> 
> Best regards,
> Krzysztof

-- 
Best Regards,
Charan.

On 06/05/2025 13:36, Charan Pedumuru wrote:
> 
> 
> On 06-05-2025 16:42, Krzysztof Kozlowski wrote:
>> On 06/05/2025 13:02, Charan Pedumuru wrote:
>>> +
>>> +allOf:
>>> +  - $ref: dma-controller.yaml#
>>> +
>>> +unevaluatedProperties: false
>>> +
>>> +examples:
>>> +  - |
>>> +    #include <dt-bindings/reset/tegra186-reset.h>
>>> +    dma-controller@6000a000 {
>>> +        compatible = "nvidia,tegra30-apbdma", "nvidia,tegra20-apbdma";
>>> +        reg = <0x6000a000 0x1200>;
>>> +        interrupts = <0 136 0x04>,
>>
>> You gave me little time to respond - 15 minutes - and then you sent v3.
>>
>> Use the header and its defines instead of hard-coding it. Wasn't this
>> the entire point why you included the header in the first place in v1?
>> Otherwise why was it included?
> 
> 
> Oh my bad, now I got it, I will use #include <dt-bindings/interrupt-controller/arm-gic.h> header and redefine the interrupts with 
> interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH> format instead of hard coding. Thanks for your patience and clarification.
Thanks

Best regards,
Krzysztof