Convert the OpenRISC OMPIC interrupt controller binding to schema
format. It's a straight-forward conversion of the typical interrupt
controller.

Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
---
 .../interrupt-controller/openrisc,ompic.txt   | 22 ---------
 .../interrupt-controller/openrisc,ompic.yaml  | 45 +++++++++++++++++++
 2 files changed, 45 insertions(+), 22 deletions(-)
 delete mode 100644 Documentation/devicetree/bindings/interrupt-controller/openrisc,ompic.txt
 create mode 100644 Documentation/devicetree/bindings/interrupt-controller/openrisc,ompic.yaml

diff --git a/Documentation/devicetree/bindings/interrupt-controller/openrisc,ompic.txt b/Documentation/devicetree/bindings/interrupt-controller/openrisc,ompic.txt
deleted file mode 100644
index caec07cc7149..000000000000
--- a/Documentation/devicetree/bindings/interrupt-controller/openrisc,ompic.txt
+++ /dev/null
@@ -1,22 +0,0 @@
-Open Multi-Processor Interrupt Controller
-
-Required properties:
-
-- compatible : This should be "openrisc,ompic"
-- reg : Specifies base physical address and size of the register space. The
-  size is based on the number of cores the controller has been configured
-  to handle, this should be set to 8 bytes per cpu core.
-- interrupt-controller : Identifies the node as an interrupt controller.
-- #interrupt-cells : This should be set to 0 as this will not be an irq
-  parent.
-- interrupts : Specifies the interrupt line to which the ompic is wired.
-
-Example:
-
-ompic: interrupt-controller@98000000 {
-	compatible = "openrisc,ompic";
-	reg = <0x98000000 16>;
-	interrupt-controller;
-	#interrupt-cells = <0>;
-	interrupts = <1>;
-};
diff --git a/Documentation/devicetree/bindings/interrupt-controller/openrisc,ompic.yaml b/Documentation/devicetree/bindings/interrupt-controller/openrisc,ompic.yaml
new file mode 100644
index 000000000000..4efbfba3aa6b
--- /dev/null
+++ b/Documentation/devicetree/bindings/interrupt-controller/openrisc,ompic.yaml
@@ -0,0 +1,45 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/interrupt-controller/openrisc,ompic.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Open Multi-Processor Interrupt Controller
+
+maintainers:
+  - Stafford Horne <shorne@gmail.com>
+
+properties:
+  compatible:
+    items:
+      - const: openrisc,ompic
+
+  reg:
+    maxItems: 1
+
+  interrupt-controller: true
+
+  '#interrupt-cells':
+    const: 0
+
+  interrupts:
+    maxItems: 1
+
+required:
+  - compatible
+  - reg
+  - interrupt-controller
+  - '#interrupt-cells'
+  - interrupts
+
+additionalProperties: false
+
+examples:
+  - |
+    interrupt-controller@98000000 {
+        compatible = "openrisc,ompic";
+        reg = <0x98000000 16>;
+        interrupt-controller;
+        #interrupt-cells = <0>;
+        interrupts = <1>;
+    };
-- 
2.47.2

Hi Rob,

On Mon, May 05, 2025 at 09:48:12AM -0500, Rob Herring (Arm) wrote:
> Convert the OpenRISC OMPIC interrupt controller binding to schema
> format. It's a straight-forward conversion of the typical interrupt
> controller.
> 
> Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
> ---
>  .../interrupt-controller/openrisc,ompic.txt   | 22 ---------
>  .../interrupt-controller/openrisc,ompic.yaml  | 45 +++++++++++++++++++
>  2 files changed, 45 insertions(+), 22 deletions(-)
>  delete mode 100644 Documentation/devicetree/bindings/interrupt-controller/openrisc,ompic.txt
>  create mode 100644 Documentation/devicetree/bindings/interrupt-controller/openrisc,ompic.yaml
> 
> diff --git a/Documentation/devicetree/bindings/interrupt-controller/openrisc,ompic.txt b/Documentation/devicetree/bindings/interrupt-controller/openrisc,ompic.txt
> deleted file mode 100644
> index caec07cc7149..000000000000
> --- a/Documentation/devicetree/bindings/interrupt-controller/openrisc,ompic.txt
> +++ /dev/null
> @@ -1,22 +0,0 @@
> -Open Multi-Processor Interrupt Controller
> -
> -Required properties:
> -
> -- compatible : This should be "openrisc,ompic"
> -- reg : Specifies base physical address and size of the register space. The
> -  size is based on the number of cores the controller has been configured
> -  to handle, this should be set to 8 bytes per cpu core.
> -- interrupt-controller : Identifies the node as an interrupt controller.
> -- #interrupt-cells : This should be set to 0 as this will not be an irq
> -  parent.
> -- interrupts : Specifies the interrupt line to which the ompic is wired.

I guess this extra documentation is obsorbed by the fact that these are all
standard fields?

> -Example:
> -
> -ompic: interrupt-controller@98000000 {
> -	compatible = "openrisc,ompic";
> -	reg = <0x98000000 16>;
> -	interrupt-controller;
> -	#interrupt-cells = <0>;
> -	interrupts = <1>;
> -};
> diff --git a/Documentation/devicetree/bindings/interrupt-controller/openrisc,ompic.yaml b/Documentation/devicetree/bindings/interrupt-controller/openrisc,ompic.yaml
> new file mode 100644
> index 000000000000..4efbfba3aa6b
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/interrupt-controller/openrisc,ompic.yaml
> @@ -0,0 +1,45 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/interrupt-controller/openrisc,ompic.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Open Multi-Processor Interrupt Controller
> +
> +maintainers:
> +  - Stafford Horne <shorne@gmail.com>
> +
> +properties:
> +  compatible:
> +    items:
> +      - const: openrisc,ompic
> +
> +  reg:
> +    maxItems: 1
> +
> +  interrupt-controller: true
> +
> +  '#interrupt-cells':
> +    const: 0
> +
> +  interrupts:
> +    maxItems: 1
> +
> +required:
> +  - compatible
> +  - reg
> +  - interrupt-controller
> +  - '#interrupt-cells'
> +  - interrupts
> +
> +additionalProperties: false
> +
> +examples:
> +  - |
> +    interrupt-controller@98000000 {
> +        compatible = "openrisc,ompic";
> +        reg = <0x98000000 16>;
> +        interrupt-controller;
> +        #interrupt-cells = <0>;
> +        interrupts = <1>;
> +    };

I think this is ok.

I will queue this via the OpenRISC queue.

-Stafford

On Tue, May 6, 2025 at 11:17 AM Stafford Horne <shorne@gmail.com> wrote:
>
> Hi Rob,
>
> On Mon, May 05, 2025 at 09:48:12AM -0500, Rob Herring (Arm) wrote:
> > Convert the OpenRISC OMPIC interrupt controller binding to schema
> > format. It's a straight-forward conversion of the typical interrupt
> > controller.
> >
> > Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
> > ---
> >  .../interrupt-controller/openrisc,ompic.txt   | 22 ---------
> >  .../interrupt-controller/openrisc,ompic.yaml  | 45 +++++++++++++++++++
> >  2 files changed, 45 insertions(+), 22 deletions(-)
> >  delete mode 100644 Documentation/devicetree/bindings/interrupt-controller/openrisc,ompic.txt
> >  create mode 100644 Documentation/devicetree/bindings/interrupt-controller/openrisc,ompic.yaml
> >
> > diff --git a/Documentation/devicetree/bindings/interrupt-controller/openrisc,ompic.txt b/Documentation/devicetree/bindings/interrupt-controller/openrisc,ompic.txt
> > deleted file mode 100644
> > index caec07cc7149..000000000000
> > --- a/Documentation/devicetree/bindings/interrupt-controller/openrisc,ompic.txt
> > +++ /dev/null
> > @@ -1,22 +0,0 @@
> > -Open Multi-Processor Interrupt Controller
> > -
> > -Required properties:
> > -
> > -- compatible : This should be "openrisc,ompic"
> > -- reg : Specifies base physical address and size of the register space. The
> > -  size is based on the number of cores the controller has been configured
> > -  to handle, this should be set to 8 bytes per cpu core.
> > -- interrupt-controller : Identifies the node as an interrupt controller.
> > -- #interrupt-cells : This should be set to 0 as this will not be an irq
> > -  parent.
> > -- interrupts : Specifies the interrupt line to which the ompic is wired.
>
> I guess this extra documentation is obsorbed by the fact that these are all
> standard fields?

Right, we only put details unique to this binding if any.

Rob