Add device tree for the Luckfox Omni3576 Carrier Board with Core3576
Module, powered by the Rockchip RK3576 SoC with four Cortex-A72 cores,
four Cortex-A53 cores, and a Mali-G52 MC3 GPU. This initial
implementation enables essential functionality for booting Linux and
basic connectivity.
Supported and tested features:
- UART for serial console
- SD card for storage
- PCIe with NVMe SSD (detected, mounted, and fully functional)
- Gigabit Ethernet 0 with RGMII PHY
- USB 2.0 host ports
- RK806 PMIC for power management
- RTC with timekeeping and wake-up
- GPIO-controlled LED with heartbeat trigger
- eMMC (enabled, not populated on tested board)
The device tree provides a foundation for further peripheral support, such
as WiFi, MIPI-DSI, HDMI, and Ethernet 1, in future updates.
Tested on Linux 6.15-rc4
Signed-off-by: John Clark <inindev@gmail.com>
---
arch/arm64/boot/dts/rockchip/Makefile | 1 +
.../dts/rockchip/rk3576-luckfox-omni3576.dts | 779 ++++++++++++++++++
2 files changed, 780 insertions(+)
create mode 100644 arch/arm64/boot/dts/rockchip/rk3576-luckfox-omni3576.dts
diff --git a/arch/arm64/boot/dts/rockchip/Makefile b/arch/arm64/boot/dts/rockchip/Makefile
index 7948522cb225..22d74367b7e6 100644
--- a/arch/arm64/boot/dts/rockchip/Makefile
+++ b/arch/arm64/boot/dts/rockchip/Makefile
@@ -136,6 +136,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-wolfvision-pf5-display-vz.dtbo
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-wolfvision-pf5-io-expander.dtbo
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3576-armsom-sige5.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3576-evb1-v10.dtb
+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3576-luckfox-omni3576.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3576-roc-pc.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3576-rock-4d.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3582-radxa-e52c.dtb
diff --git a/arch/arm64/boot/dts/rockchip/rk3576-luckfox-omni3576.dts b/arch/arm64/boot/dts/rockchip/rk3576-luckfox-omni3576.dts
new file mode 100644
index 000000000000..73351ba7830c
--- /dev/null
+++ b/arch/arm64/boot/dts/rockchip/rk3576-luckfox-omni3576.dts
@@ -0,0 +1,779 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2024 Rockchip Electronics Co., Ltd.
+ *
+ */
+
+/dts-v1/;
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/leds/common.h>
+#include <dt-bindings/pinctrl/rockchip.h>
+#include <dt-bindings/soc/rockchip,vop2.h>
+#include "rk3576.dtsi"
+
+/ {
+ model = "Luckfox Omni3576";
+ compatible = "luckfox,omni3576", "rockchip,rk3576";
+
+ aliases {
+ ethernet0 = &gmac0;
+ ethernet1 = &gmac1;
+ mmc0 = &sdhci;
+ mmc1 = &sdmmc;
+ };
+
+ chosen {
+ stdout-path = "serial0:1500000n8";
+ };
+
+ hdmi-con {
+ compatible = "hdmi-connector";
+ hdmi-pwr-supply = <&vcc_5v0_hdmi>;
+ type = "a";
+
+ port {
+ hdmi_con_in: endpoint {
+ remote-endpoint = <&hdmi_out_con>;
+ };
+ };
+ };
+
+ leds: leds {
+ compatible = "gpio-leds";
+
+ green_led: green-led {
+ color = <LED_COLOR_ID_GREEN>;
+ function = LED_FUNCTION_HEARTBEAT;
+ gpios = <&gpio1 RK_PD5 GPIO_ACTIVE_HIGH>;
+ linux,default-trigger = "heartbeat";
+ };
+ };
+
+ vcc_5v0_dcin: regulator-vcc-5v0-dcin {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc_5v0_dcin";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ };
+
+ vcc_1v1_nldo_s3: regulator-vcc-1v1-nldo-s3 {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc_1v1_nldo_s3";
+ regulator-boot-on;
+ regulator-always-on;
+ regulator-min-microvolt = <1100000>;
+ regulator-max-microvolt = <1100000>;
+ vin-supply = <&vcc_5v0_sys>;
+ };
+
+ vcc_2v0_pldo_s3: regulator-vcc-2v0-pldo-s3 {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc_2v0_pldo_s3";
+ regulator-boot-on;
+ regulator-always-on;
+ regulator-min-microvolt = <2000000>;
+ regulator-max-microvolt = <2000000>;
+ vin-supply = <&vcc_5v0_sys>;
+ };
+
+ vcc_3v3_pcie: regulator-vcc-3v3-pcie {
+ compatible = "regulator-fixed";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pcie_pwr_en>;
+ regulator-name = "vcc_3v3_pcie";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ enable-active-high;
+ gpio = <&gpio4 RK_PA0 GPIO_ACTIVE_HIGH>;
+ startup-delay-us = <1000>;
+ vin-supply = <&vcc_5v0_sys>;
+ };
+
+ vcc_3v3_rtc_s5: regulator-vcc-3v3-rtc-s5 {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc_3v3_rtc_s5";
+ regulator-boot-on;
+ regulator-always-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ vin-supply = <&vcc_5v0_sys>;
+ };
+
+ vbus_5v0_typec: regulator-vbus-5v0-typec {
+ compatible = "regulator-fixed";
+ regulator-name = "vbus5v0_typec";
+ enable-active-high;
+ gpio = <&gpio3 RK_PD5 GPIO_ACTIVE_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&usb_otg0_pwr_en>;
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ vin-supply = <&vcc_5v0_device>;
+ };
+
+ vcc_5v0_host: regulator-vcc-5v0-host {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc_5v0_host";
+ enable-active-high;
+ gpio = <&gpio0 RK_PC7 GPIO_ACTIVE_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&usb_host_pwr_en>;
+ regulator-boot-on;
+ regulator-always-on;
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ vin-supply = <&vcc_5v0_device>;
+ };
+
+ vcc_5v0_sys: regulator-vcc-5v0-sys {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc_5v0_sys";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ vin-supply = <&vcc_5v0_dcin>;
+ };
+
+ vcc_5v0_device: regulator-vcc-5v0-device {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc_5v0_device";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ vin-supply = <&vcc_5v0_dcin>;
+ };
+
+ vcc_5v0_hdmi: regulator-vcc-5v0-hdmi {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc_5v0_hdmi";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ regulator-always-on;
+ regulator-boot-on;
+ enable-active-high;
+ gpio = <&gpio4 RK_PC6 GPIO_ACTIVE_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&hdmi_con_en>;
+ vin-supply = <&vcc_5v0_sys>;
+ };
+};
+
+&combphy0_ps {
+ status = "okay";
+};
+
+&combphy1_psu {
+ status = "okay";
+};
+
+&cpu_l0 {
+ cpu-supply = <&vdd_cpu_lit_s0>;
+};
+
+&cpu_l1 {
+ cpu-supply = <&vdd_cpu_lit_s0>;
+};
+
+&cpu_l2 {
+ cpu-supply = <&vdd_cpu_lit_s0>;
+};
+
+&cpu_l3 {
+ cpu-supply = <&vdd_cpu_lit_s0>;
+};
+
+&cpu_b0 {
+ cpu-supply = <&vdd_cpu_big_s0>;
+};
+
+&cpu_b1 {
+ cpu-supply = <&vdd_cpu_big_s0>;
+};
+
+&cpu_b2 {
+ cpu-supply = <&vdd_cpu_big_s0>;
+};
+
+&cpu_b3 {
+ cpu-supply = <&vdd_cpu_big_s0>;
+};
+
+&gmac0 {
+ clock_in_out = "output";
+ phy-handle = <&rgmii_phy0>;
+ phy-mode = "rgmii-rxid";
+ pinctrl-names = "default";
+ pinctrl-0 = <ð0m0_miim
+ ð0m0_tx_bus2
+ ð0m0_rx_bus2
+ ð0m0_rgmii_clk
+ ð0m0_rgmii_bus
+ ðm0_clk0_25m_out>;
+ snps,reset-gpio = <&gpio2 RK_PB3 GPIO_ACTIVE_LOW>;
+ snps,reset-active-low;
+ snps,reset-delays-us = <0 20000 100000>;
+ tx_delay = <0x20>;
+ status = "okay";
+};
+
+&gmac1 {
+ clock_in_out = "output";
+ phy-handle = <&rgmii_phy1>;
+ phy-mode = "rgmii-rxid";
+ pinctrl-names = "default";
+ pinctrl-0 = <ð1m0_miim
+ ð1m0_tx_bus2
+ ð1m0_rx_bus2
+ ð1m0_rgmii_clk
+ ð1m0_rgmii_bus
+ ðm0_clk1_25m_out>;
+ snps,reset-gpio = <&gpio2 RK_PB4 GPIO_ACTIVE_LOW>;
+ snps,reset-active-low;
+ snps,reset-delays-us = <0 20000 100000>;
+ tx_delay = <0x20>;
+ status = "okay";
+};
+
+&gpu {
+ mali-supply = <&vdd_gpu_s0>;
+ status = "okay";
+};
+
+&hdmi {
+ status = "okay";
+};
+
+&hdmi_in {
+ hdmi_in_vp0: endpoint {
+ remote-endpoint = <&vp0_out_hdmi>;
+ };
+};
+
+&hdmi_out {
+ hdmi_out_con: endpoint {
+ remote-endpoint = <&hdmi_con_in>;
+ };
+};
+
+&hdptxphy {
+ phy-supply = <&vdda0v75_hdmi_s0>;
+ status = "okay";
+};
+
+&i2c1 {
+ status = "okay";
+
+ pmic@23 {
+ compatible = "rockchip,rk806";
+ reg = <0x23>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ interrupt-parent = <&gpio0>;
+ interrupts = <6 IRQ_TYPE_LEVEL_LOW>;
+ pinctrl-names = "default", "pmic-power-off";
+ pinctrl-0 = <&pmic_pins>, <&rk806_dvs1_null>,
+ <&rk806_dvs2_null>, <&rk806_dvs3_null>;
+ pinctrl-1 = <&rk806_dvs1_pwrdn>;
+ system-power-controller;
+
+ vcc1-supply = <&vcc_5v0_sys>;
+ vcc2-supply = <&vcc_5v0_sys>;
+ vcc3-supply = <&vcc_5v0_sys>;
+ vcc4-supply = <&vcc_5v0_sys>;
+ vcc5-supply = <&vcc_5v0_sys>;
+ vcc6-supply = <&vcc_5v0_sys>;
+ vcc7-supply = <&vcc_5v0_sys>;
+ vcc8-supply = <&vcc_5v0_sys>;
+ vcc9-supply = <&vcc_5v0_sys>;
+ vcc10-supply = <&vcc_5v0_sys>;
+ vcc11-supply = <&vcc_2v0_pldo_s3>;
+ vcc12-supply = <&vcc_5v0_sys>;
+ vcc13-supply = <&vcc_1v1_nldo_s3>;
+ vcc14-supply = <&vcc_1v1_nldo_s3>;
+ vcca-supply = <&vcc_5v0_sys>;
+
+ pwrkey {
+ status = "okay";
+ };
+
+ rk806_dvs1_null: dvs1-null-pins {
+ pins = "gpio_pwrctrl2";
+ function = "pin_fun0";
+ };
+
+ rk806_dvs2_null: dvs2-null-pins {
+ pins = "gpio_pwrctrl2";
+ function = "pin_fun0";
+ };
+
+ rk806_dvs3_null: dvs3-null-pins {
+ pins = "gpio_pwrctrl3";
+ function = "pin_fun0";
+ };
+
+ rk806_dvs1_slp: dvs1-slp-pins {
+ pins = "gpio_pwrctrl1";
+ function = "pin_fun1";
+ };
+
+ rk806_dvs1_pwrdn: dvs1-pwrdn-pins {
+ pins = "gpio_pwrctrl1";
+ function = "pin_fun2";
+ };
+
+ rk806_dvs1_rst: dvs1-rst-pins {
+ pins = "gpio_pwrctrl1";
+ function = "pin_fun3";
+ };
+
+ rk806_dvs2_slp: dvs2-slp-pins {
+ pins = "gpio_pwrctrl2";
+ function = "pin_fun1";
+ };
+
+ rk806_dvs2_pwrdn: dvs2-pwrdn-pins {
+ pins = "gpio_pwrctrl2";
+ function = "pin_fun2";
+ };
+
+ rk806_dvs2_rst: dvs2-rst-pins {
+ pins = "gpio_pwrctrl2";
+ function = "pin_fun3";
+ };
+
+ rk806_dvs2_dvs: dvs2-dvs-pins {
+ pins = "gpio_pwrctrl2";
+ function = "pin_fun4";
+ };
+
+ rk806_dvs2_gpio: dvs2-gpio-pins {
+ pins = "gpio_pwrctrl2";
+ function = "pin_fun5";
+ };
+
+
+ rk806_dvs3_slp: dvs3-slp-pins {
+ pins = "gpio_pwrctrl3";
+ function = "pin_fun1";
+ };
+
+ rk806_dvs3_pwrdn: dvs3-pwrdn-pins {
+ pins = "gpio_pwrctrl3";
+ function = "pin_fun2";
+ };
+
+ rk806_dvs3_rst: dvs3-rst-pins {
+ pins = "gpio_pwrctrl3";
+ function = "pin_fun3";
+ };
+
+ rk806_dvs3_dvs: dvs3-dvs-pins {
+ pins = "gpio_pwrctrl3";
+ function = "pin_fun4";
+ };
+
+ rk806_dvs3_gpio: dvs3-gpio-pins {
+ pins = "gpio_pwrctrl3";
+ function = "pin_fun5";
+ };
+
+ regulators {
+ vdd_cpu_big_s0: dcdc-reg1 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <550000>;
+ regulator-max-microvolt = <950000>;
+ regulator-ramp-delay = <12500>;
+ regulator-name = "vdd_cpu_big_s0";
+ regulator-enable-ramp-delay = <400>;
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vdd_npu_s0: dcdc-reg2 {
+ regulator-boot-on;
+ regulator-min-microvolt = <550000>;
+ regulator-max-microvolt = <950000>;
+ regulator-ramp-delay = <12500>;
+ regulator-name = "vdd_npu_s0";
+ regulator-enable-ramp-delay = <400>;
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vdd_cpu_lit_s0: dcdc-reg3 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <550000>;
+ regulator-max-microvolt = <950000>;
+ regulator-ramp-delay = <12500>;
+ regulator-name = "vdd_cpu_lit_s0";
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ regulator-suspend-microvolt = <750000>;
+ };
+ };
+
+ vcc_3v3_s3: dcdc-reg4 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vcc_3v3_s3";
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <3300000>;
+ };
+ };
+
+ vdd_gpu_s0: dcdc-reg5 {
+ regulator-boot-on;
+ regulator-min-microvolt = <550000>;
+ regulator-max-microvolt = <900000>;
+ regulator-ramp-delay = <12500>;
+ regulator-name = "vdd_gpu_s0";
+ regulator-enable-ramp-delay = <400>;
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ regulator-suspend-microvolt = <850000>;
+ };
+ };
+
+ vddq_ddr_s0: dcdc-reg6 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-name = "vddq_ddr_s0";
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vdd_logic_s0: dcdc-reg7 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <550000>;
+ regulator-max-microvolt = <800000>;
+ regulator-name = "vdd_logic_s0";
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vcc_1v8_s3: dcdc-reg8 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-name = "vcc_1v8_s3";
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <1800000>;
+ };
+ };
+
+ vdd2_ddr_s3: dcdc-reg9 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-name = "vdd2_ddr_s3";
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ };
+ };
+
+ vdd_ddr_s0: dcdc-reg10 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <550000>;
+ regulator-max-microvolt = <1200000>;
+ regulator-name = "vdd_ddr_s0";
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vcca_1v8_s0: pldo-reg1 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-name = "vcca_1v8_s0";
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vcca1v8_pldo2_s0: pldo-reg2 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-name = "vcca1v8_pldo2_s0";
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vdda_1v2_s0: pldo-reg3 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <1200000>;
+ regulator-max-microvolt = <1200000>;
+ regulator-name = "vdda_1v2_s0";
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vcca_3v3_s0: pldo-reg4 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vcca_3v3_s0";
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vccio_sd_s0: pldo-reg5 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vccio_sd_s0";
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vcca1v8_pldo6_s3: pldo-reg6 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-name = "vcca1v8_pldo6_s3";
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <1800000>;
+ };
+ };
+
+ vdd_0v75_s3: nldo-reg1 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <750000>;
+ regulator-max-microvolt = <750000>;
+ regulator-name = "vdd_0v75_s3";
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <750000>;
+ };
+ };
+
+ vdda_ddr_pll_s0: nldo-reg2 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <850000>;
+ regulator-max-microvolt = <850000>;
+ regulator-name = "vdda_ddr_pll_s0";
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vdda0v75_hdmi_s0: nldo-reg3 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <837500>;
+ regulator-max-microvolt = <837500>;
+ regulator-name = "vdda0v75_hdmi_s0";
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vdda_0v85_s0: nldo-reg4 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <850000>;
+ regulator-max-microvolt = <850000>;
+ regulator-name = "vdda_0v85_s0";
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vdda_0v75_s0: nldo-reg5 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <750000>;
+ regulator-max-microvolt = <750000>;
+ regulator-name = "vdda_0v75_s0";
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+ };
+ };
+};
+
+&i2c2 {
+ status = "okay";
+ hym8563: rtc@51 {
+ compatible = "haoyu,hym8563";
+ reg = <0x51>;
+ #clock-cells = <0>;
+ clock-output-names = "hym8563";
+ interrupt-parent = <&gpio0>;
+ interrupts = <RK_PA5 IRQ_TYPE_LEVEL_LOW>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&hym8563_int>;
+ wakeup-source;
+ };
+};
+
+&mdio0 {
+ rgmii_phy0: phy@0 {
+ compatible = "ethernet-phy-ieee802.3-c22";
+ reg = <0x0>;
+ clocks = <&cru REFCLKO25M_GMAC0_OUT>;
+ };
+};
+
+&mdio1 {
+ rgmii_phy1: phy@0 {
+ compatible = "ethernet-phy-ieee802.3-c22";
+ reg = <0x0>;
+ clocks = <&cru REFCLKO25M_GMAC1_OUT>;
+ };
+};
+
+&pcie0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pcie_reset>;
+ reset-gpios = <&gpio2 RK_PB1 GPIO_ACTIVE_HIGH>;
+ vpcie3v3-supply = <&vcc_3v3_pcie>;
+ status = "okay";
+};
+
+&pinctrl {
+ hdmi {
+ hdmi_con_en: hdmi-con-en {
+ rockchip,pins = <4 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+
+ hym8563 {
+ hym8563_int: hym8563-int {
+ rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>;
+ };
+ };
+
+ leds {
+ led_green_pin: led-green-pin {
+ rockchip,pins = <1 RK_PD5 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+
+ pcie {
+ pcie_pwr_en: pcie-pwr-en {
+ rockchip,pins = <4 RK_PA0 RK_FUNC_GPIO &pcfg_pull_up>;
+ };
+
+ pcie_reset: pcie-reset {
+ rockchip,pins = <2 RK_PB1 RK_FUNC_GPIO &pcfg_pull_up>;
+ };
+ };
+
+ usb {
+ usb_host_pwr_en: usb-host-pwr-en {
+ rockchip,pins = <1 RK_PC7 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+
+ usb_otg0_pwr_en: usb-otg0-pwr-en {
+ rockchip,pins = <3 RK_PD5 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+
+ usbc0_int: usbc0-int {
+ rockchip,pins = <3 RK_PD4 RK_FUNC_GPIO &pcfg_pull_up>;
+ };
+ };
+};
+
+&saradc {
+ status = "okay";
+ vref-supply = <&vcca_1v8_s0>;
+};
+
+&sdhci {
+ bus-width = <8>;
+ full-pwr-cycle-in-suspend;
+ max-frequency = <200000000>;
+ mmc-hs400-1_8v;
+ mmc-hs400-enhanced-strobe;
+ no-sdio;
+ no-sd;
+ non-removable;
+ status = "okay";
+};
+
+&sdmmc {
+ bus-width = <4>;
+ cap-mmc-highspeed;
+ cap-sd-highspeed;
+ disable-wp;
+ max-frequency = <200000000>;
+ no-sdio;
+ no-mmc;
+ sd-uhs-sdr104;
+ vmmc-supply = <&vcc_3v3_s3>;
+ vqmmc-supply = <&vccio_sd_s0>;
+ status = "okay";
+};
+
+&uart0 {
+ status = "okay";
+};
+
+&uart4 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart4m1_xfer &uart4m1_ctsn>;
+ status = "okay";
+};
+
+&u2phy1 {
+ status = "okay";
+};
+
+&u2phy1_otg {
+ phy-supply = <&vcc_5v0_host>;
+ status = "okay";
+};
+
+&usb_drd1_dwc3 {
+ dr_mode = "host";
+ status = "okay";
+};
+
+&vop {
+ vop-supply = <&vdd_logic_s0>;
+ status = "okay";
+};
+
+&vop_mmu {
+ status = "okay";
+};
+
+&vp0 {
+ vp0_out_hdmi: endpoint@ROCKCHIP_VOP2_EP_HDMI0 {
+ reg = <ROCKCHIP_VOP2_EP_HDMI0>;
+ remote-endpoint = <&hdmi_in_vp0>;
+ };
+};
--
2.39.5Hi John,
On 2025-05-04 12:24, John Clark wrote:
> Add device tree for the Luckfox Omni3576 Carrier Board with Core3576
> Module, powered by the Rockchip RK3576 SoC with four Cortex-A72 cores,
> four Cortex-A53 cores, and a Mali-G52 MC3 GPU. This initial
> implementation enables essential functionality for booting Linux and
> basic connectivity.
>
> Supported and tested features:
> - UART for serial console
> - SD card for storage
> - PCIe with NVMe SSD (detected, mounted, and fully functional)
> - Gigabit Ethernet 0 with RGMII PHY
> - USB 2.0 host ports
> - RK806 PMIC for power management
> - RTC with timekeeping and wake-up
> - GPIO-controlled LED with heartbeat trigger
> - eMMC (enabled, not populated on tested board)
>
> The device tree provides a foundation for further peripheral support, such
> as WiFi, MIPI-DSI, HDMI, and Ethernet 1, in future updates.
>
> Tested on Linux 6.15-rc4
>
> Signed-off-by: John Clark <inindev@gmail.com>
> ---
> arch/arm64/boot/dts/rockchip/Makefile | 1 +
> .../dts/rockchip/rk3576-luckfox-omni3576.dts | 779 ++++++++++++++++++
> 2 files changed, 780 insertions(+)
> create mode 100644 arch/arm64/boot/dts/rockchip/rk3576-luckfox-omni3576.dts
>
> diff --git a/arch/arm64/boot/dts/rockchip/Makefile b/arch/arm64/boot/dts/rockchip/Makefile
> index 7948522cb225..22d74367b7e6 100644
> --- a/arch/arm64/boot/dts/rockchip/Makefile
> +++ b/arch/arm64/boot/dts/rockchip/Makefile
> @@ -136,6 +136,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-wolfvision-pf5-display-vz.dtbo
> dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-wolfvision-pf5-io-expander.dtbo
> dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3576-armsom-sige5.dtb
> dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3576-evb1-v10.dtb
> +dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3576-luckfox-omni3576.dtb
> dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3576-roc-pc.dtb
> dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3576-rock-4d.dtb
> dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3582-radxa-e52c.dtb
> diff --git a/arch/arm64/boot/dts/rockchip/rk3576-luckfox-omni3576.dts b/arch/arm64/boot/dts/rockchip/rk3576-luckfox-omni3576.dts
> new file mode 100644
> index 000000000000..73351ba7830c
> --- /dev/null
> +++ b/arch/arm64/boot/dts/rockchip/rk3576-luckfox-omni3576.dts
> @@ -0,0 +1,779 @@
> +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
> +/*
> + * Copyright (c) 2024 Rockchip Electronics Co., Ltd.
> + *
> + */
> +
> +/dts-v1/;
> +
> +#include <dt-bindings/gpio/gpio.h>
> +#include <dt-bindings/leds/common.h>
> +#include <dt-bindings/pinctrl/rockchip.h>
> +#include <dt-bindings/soc/rockchip,vop2.h>
> +#include "rk3576.dtsi"
> +
> +/ {
> + model = "Luckfox Omni3576";
> + compatible = "luckfox,omni3576", "rockchip,rk3576";
Because this is a carrier board this should probably be something like:
compatible = "luckfox,omni3576", "luckfox,core3576", "rockchip,rk3576";
And this .dts-file should be split up into something like:
- rk3576-luckfox-core3576.dtsi for parts related to the Core3576 SoM
- rk3576-luckfox-omni3576.dts for parts only related to the carrier board
Regards,
Jonas
[snip]
Hi John,
On 2025-05-04 12:24, John Clark wrote:
> Add device tree for the Luckfox Omni3576 Carrier Board with Core3576
> Module, powered by the Rockchip RK3576 SoC with four Cortex-A72 cores,
> four Cortex-A53 cores, and a Mali-G52 MC3 GPU. This initial
> implementation enables essential functionality for booting Linux and
> basic connectivity.
>
> Supported and tested features:
> - UART for serial console
> - SD card for storage
> - PCIe with NVMe SSD (detected, mounted, and fully functional)
> - Gigabit Ethernet 0 with RGMII PHY
> - USB 2.0 host ports
> - RK806 PMIC for power management
> - RTC with timekeeping and wake-up
> - GPIO-controlled LED with heartbeat trigger
> - eMMC (enabled, not populated on tested board)
>
> The device tree provides a foundation for further peripheral support, such
> as WiFi, MIPI-DSI, HDMI, and Ethernet 1, in future updates.
>
> Tested on Linux 6.15-rc4
>
> Signed-off-by: John Clark <inindev@gmail.com>
> ---
> arch/arm64/boot/dts/rockchip/Makefile | 1 +
> .../dts/rockchip/rk3576-luckfox-omni3576.dts | 779 ++++++++++++++++++
> 2 files changed, 780 insertions(+)
> create mode 100644 arch/arm64/boot/dts/rockchip/rk3576-luckfox-omni3576.dts
>
> diff --git a/arch/arm64/boot/dts/rockchip/Makefile b/arch/arm64/boot/dts/rockchip/Makefile
> index 7948522cb225..22d74367b7e6 100644
> --- a/arch/arm64/boot/dts/rockchip/Makefile
> +++ b/arch/arm64/boot/dts/rockchip/Makefile
> @@ -136,6 +136,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-wolfvision-pf5-display-vz.dtbo
> dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-wolfvision-pf5-io-expander.dtbo
> dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3576-armsom-sige5.dtb
> dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3576-evb1-v10.dtb
> +dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3576-luckfox-omni3576.dtb
> dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3576-roc-pc.dtb
> dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3576-rock-4d.dtb
> dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3582-radxa-e52c.dtb
> diff --git a/arch/arm64/boot/dts/rockchip/rk3576-luckfox-omni3576.dts b/arch/arm64/boot/dts/rockchip/rk3576-luckfox-omni3576.dts
> new file mode 100644
> index 000000000000..73351ba7830c
> --- /dev/null
> +++ b/arch/arm64/boot/dts/rockchip/rk3576-luckfox-omni3576.dts
> @@ -0,0 +1,779 @@
> +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
> +/*
> + * Copyright (c) 2024 Rockchip Electronics Co., Ltd.
> + *
> + */
> +
> +/dts-v1/;
> +
> +#include <dt-bindings/gpio/gpio.h>
> +#include <dt-bindings/leds/common.h>
> +#include <dt-bindings/pinctrl/rockchip.h>
> +#include <dt-bindings/soc/rockchip,vop2.h>
> +#include "rk3576.dtsi"
> +
> +/ {
> + model = "Luckfox Omni3576";
> + compatible = "luckfox,omni3576", "rockchip,rk3576";
> +
> + aliases {
> + ethernet0 = &gmac0;
> + ethernet1 = &gmac1;
> + mmc0 = &sdhci;
> + mmc1 = &sdmmc;
> + };
> +
> + chosen {
> + stdout-path = "serial0:1500000n8";
> + };
> +
> + hdmi-con {
> + compatible = "hdmi-connector";
> + hdmi-pwr-supply = <&vcc_5v0_hdmi>;
> + type = "a";
> +
> + port {
> + hdmi_con_in: endpoint {
> + remote-endpoint = <&hdmi_out_con>;
> + };
> + };
> + };
> +
> + leds: leds {
> + compatible = "gpio-leds";
> +
> + green_led: green-led {
> + color = <LED_COLOR_ID_GREEN>;
> + function = LED_FUNCTION_HEARTBEAT;
> + gpios = <&gpio1 RK_PD5 GPIO_ACTIVE_HIGH>;
This should probably also have a pinctrl to configure the gpio pin
referenced here.
> + linux,default-trigger = "heartbeat";
> + };
> + };
> +
> + vcc_5v0_dcin: regulator-vcc-5v0-dcin {
> + compatible = "regulator-fixed";
> + regulator-name = "vcc_5v0_dcin";
> + regulator-always-on;
> + regulator-boot-on;
> + regulator-min-microvolt = <5000000>;
> + regulator-max-microvolt = <5000000>;
> + };
> +
> + vcc_1v1_nldo_s3: regulator-vcc-1v1-nldo-s3 {
> + compatible = "regulator-fixed";
> + regulator-name = "vcc_1v1_nldo_s3";
> + regulator-boot-on;
> + regulator-always-on;
Please use consistent property order for all regulator nodes, e.g.
vcc_5v0_dcin used always-on before boot-on, and here you use boot-on
before always-on.
> + regulator-min-microvolt = <1100000>;
> + regulator-max-microvolt = <1100000>;
> + vin-supply = <&vcc_5v0_sys>;
> + };
> +
> + vcc_2v0_pldo_s3: regulator-vcc-2v0-pldo-s3 {
> + compatible = "regulator-fixed";
> + regulator-name = "vcc_2v0_pldo_s3";
> + regulator-boot-on;
> + regulator-always-on;
Same here.
> + regulator-min-microvolt = <2000000>;
> + regulator-max-microvolt = <2000000>;
> + vin-supply = <&vcc_5v0_sys>;
> + };
> +
> + vcc_3v3_pcie: regulator-vcc-3v3-pcie {
> + compatible = "regulator-fixed";
> + pinctrl-names = "default";
> + pinctrl-0 = <&pcie_pwr_en>;
> + regulator-name = "vcc_3v3_pcie";
> + regulator-min-microvolt = <3300000>;
> + regulator-max-microvolt = <3300000>;
> + enable-active-high;
> + gpio = <&gpio4 RK_PA0 GPIO_ACTIVE_HIGH>;
Please use the gpios property instead of the somewhat depracated gpio
property. Also please consider consistent property order.
> + startup-delay-us = <1000>;
> + vin-supply = <&vcc_5v0_sys>;
> + };
> +
> + vcc_3v3_rtc_s5: regulator-vcc-3v3-rtc-s5 {
> + compatible = "regulator-fixed";
> + regulator-name = "vcc_3v3_rtc_s5";
> + regulator-boot-on;
> + regulator-always-on;
Same here.
> + regulator-min-microvolt = <3300000>;
> + regulator-max-microvolt = <3300000>;
> + vin-supply = <&vcc_5v0_sys>;
> + };
> +
> + vbus_5v0_typec: regulator-vbus-5v0-typec {
> + compatible = "regulator-fixed";
> + regulator-name = "vbus5v0_typec";
> + enable-active-high;
> + gpio = <&gpio3 RK_PD5 GPIO_ACTIVE_HIGH>;
Same here.
> + pinctrl-names = "default";
> + pinctrl-0 = <&usb_otg0_pwr_en>;
> + regulator-min-microvolt = <5000000>;
> + regulator-max-microvolt = <5000000>;
> + vin-supply = <&vcc_5v0_device>;
> + };
> +
> + vcc_5v0_host: regulator-vcc-5v0-host {
> + compatible = "regulator-fixed";
> + regulator-name = "vcc_5v0_host";
> + enable-active-high;
> + gpio = <&gpio0 RK_PC7 GPIO_ACTIVE_HIGH>;
Same here.
> + pinctrl-names = "default";
> + pinctrl-0 = <&usb_host_pwr_en>;
> + regulator-boot-on;
> + regulator-always-on;
Same here.
> + regulator-min-microvolt = <5000000>;
> + regulator-max-microvolt = <5000000>;
> + vin-supply = <&vcc_5v0_device>;
> + };
> +
> + vcc_5v0_sys: regulator-vcc-5v0-sys {
> + compatible = "regulator-fixed";
> + regulator-name = "vcc_5v0_sys";
> + regulator-always-on;
> + regulator-boot-on;
> + regulator-min-microvolt = <5000000>;
> + regulator-max-microvolt = <5000000>;
> + vin-supply = <&vcc_5v0_dcin>;
> + };
> +
> + vcc_5v0_device: regulator-vcc-5v0-device {
> + compatible = "regulator-fixed";
> + regulator-name = "vcc_5v0_device";
> + regulator-always-on;
> + regulator-boot-on;
> + regulator-min-microvolt = <5000000>;
> + regulator-max-microvolt = <5000000>;
> + vin-supply = <&vcc_5v0_dcin>;
> + };
> +
> + vcc_5v0_hdmi: regulator-vcc-5v0-hdmi {
> + compatible = "regulator-fixed";
> + regulator-name = "vcc_5v0_hdmi";
> + regulator-min-microvolt = <5000000>;
> + regulator-max-microvolt = <5000000>;
> + regulator-always-on;
> + regulator-boot-on;
And here always/boot-on are listed after min/max props, please use
consistent property order.
> + enable-active-high;
> + gpio = <&gpio4 RK_PC6 GPIO_ACTIVE_HIGH>;
Same as above regarding gpio vs gpios.
> + pinctrl-names = "default";
> + pinctrl-0 = <&hdmi_con_en>;
> + vin-supply = <&vcc_5v0_sys>;
> + };
> +};
> +
> +&combphy0_ps {
> + status = "okay";
> +};
> +
> +&combphy1_psu {
> + status = "okay";
> +};
> +
> +&cpu_l0 {
> + cpu-supply = <&vdd_cpu_lit_s0>;
> +};
> +
> +&cpu_l1 {
> + cpu-supply = <&vdd_cpu_lit_s0>;
> +};
> +
> +&cpu_l2 {
> + cpu-supply = <&vdd_cpu_lit_s0>;
> +};
> +
> +&cpu_l3 {
> + cpu-supply = <&vdd_cpu_lit_s0>;
> +};
> +
> +&cpu_b0 {
> + cpu-supply = <&vdd_cpu_big_s0>;
> +};
> +
> +&cpu_b1 {
> + cpu-supply = <&vdd_cpu_big_s0>;
> +};
> +
> +&cpu_b2 {
> + cpu-supply = <&vdd_cpu_big_s0>;
> +};
> +
> +&cpu_b3 {
> + cpu-supply = <&vdd_cpu_big_s0>;
> +};
> +
> +&gmac0 {
> + clock_in_out = "output";
> + phy-handle = <&rgmii_phy0>;
> + phy-mode = "rgmii-rxid";
See Andrew's remark on v1 of this patch.
> + pinctrl-names = "default";
> + pinctrl-0 = <ð0m0_miim
> + ð0m0_tx_bus2
> + ð0m0_rx_bus2
> + ð0m0_rgmii_clk
> + ð0m0_rgmii_bus
> + ðm0_clk0_25m_out>;
> + snps,reset-gpio = <&gpio2 RK_PB3 GPIO_ACTIVE_LOW>;
> + snps,reset-active-low;
> + snps,reset-delays-us = <0 20000 100000>;
The snps,reset- props are depracated, please move to reset props in the
Ethernet PHY node.
> + tx_delay = <0x20>;
> + status = "okay";
> +};
> +
> +&gmac1 {
> + clock_in_out = "output";
> + phy-handle = <&rgmii_phy1>;
> + phy-mode = "rgmii-rxid";
Same here.
> + pinctrl-names = "default";
> + pinctrl-0 = <ð1m0_miim
> + ð1m0_tx_bus2
> + ð1m0_rx_bus2
> + ð1m0_rgmii_clk
> + ð1m0_rgmii_bus
> + ðm0_clk1_25m_out>;
> + snps,reset-gpio = <&gpio2 RK_PB4 GPIO_ACTIVE_LOW>;
> + snps,reset-active-low;
> + snps,reset-delays-us = <0 20000 100000>;
Same here.
> + tx_delay = <0x20>;
> + status = "okay";
> +};
> +
> +&gpu {
> + mali-supply = <&vdd_gpu_s0>;
> + status = "okay";
> +};
> +
> +&hdmi {
> + status = "okay";
> +};
> +
> +&hdmi_in {
> + hdmi_in_vp0: endpoint {
> + remote-endpoint = <&vp0_out_hdmi>;
> + };
> +};
> +
> +&hdmi_out {
> + hdmi_out_con: endpoint {
> + remote-endpoint = <&hdmi_con_in>;
> + };
> +};
> +
> +&hdptxphy {
> + phy-supply = <&vdda0v75_hdmi_s0>;
> + status = "okay";
> +};
> +
> +&i2c1 {
> + status = "okay";
> +
> + pmic@23 {
> + compatible = "rockchip,rk806";
> + reg = <0x23>;
> + #gpio-cells = <2>;
> + gpio-controller;
> + interrupt-parent = <&gpio0>;
> + interrupts = <6 IRQ_TYPE_LEVEL_LOW>;
> + pinctrl-names = "default", "pmic-power-off";
To my knowledge the pmic-power-off state is vendor kernel specific and
should probably not be added without being described in the dt-binding.
> + pinctrl-0 = <&pmic_pins>, <&rk806_dvs1_null>,
> + <&rk806_dvs2_null>, <&rk806_dvs3_null>;
> + pinctrl-1 = <&rk806_dvs1_pwrdn>;
> + system-power-controller;
> +
> + vcc1-supply = <&vcc_5v0_sys>;
> + vcc2-supply = <&vcc_5v0_sys>;
> + vcc3-supply = <&vcc_5v0_sys>;
> + vcc4-supply = <&vcc_5v0_sys>;
> + vcc5-supply = <&vcc_5v0_sys>;
> + vcc6-supply = <&vcc_5v0_sys>;
> + vcc7-supply = <&vcc_5v0_sys>;
> + vcc8-supply = <&vcc_5v0_sys>;
> + vcc9-supply = <&vcc_5v0_sys>;
> + vcc10-supply = <&vcc_5v0_sys>;
> + vcc11-supply = <&vcc_2v0_pldo_s3>;
> + vcc12-supply = <&vcc_5v0_sys>;
> + vcc13-supply = <&vcc_1v1_nldo_s3>;
> + vcc14-supply = <&vcc_1v1_nldo_s3>;
> + vcca-supply = <&vcc_5v0_sys>;
> +
> + pwrkey {
> + status = "okay";
> + };
This node is vendor specific and is not described in the dt-bindings.
> +
> + rk806_dvs1_null: dvs1-null-pins {
> + pins = "gpio_pwrctrl2";
> + function = "pin_fun0";
> + };
> +
> + rk806_dvs2_null: dvs2-null-pins {
> + pins = "gpio_pwrctrl2";
> + function = "pin_fun0";
> + };
> +
> + rk806_dvs3_null: dvs3-null-pins {
> + pins = "gpio_pwrctrl3";
> + function = "pin_fun0";
> + };
> +
> + rk806_dvs1_slp: dvs1-slp-pins {
> + pins = "gpio_pwrctrl1";
> + function = "pin_fun1";
> + };
> +
> + rk806_dvs1_pwrdn: dvs1-pwrdn-pins {
> + pins = "gpio_pwrctrl1";
> + function = "pin_fun2";
> + };
> +
> + rk806_dvs1_rst: dvs1-rst-pins {
> + pins = "gpio_pwrctrl1";
> + function = "pin_fun3";
> + };
> +
> + rk806_dvs2_slp: dvs2-slp-pins {
> + pins = "gpio_pwrctrl2";
> + function = "pin_fun1";
> + };
> +
> + rk806_dvs2_pwrdn: dvs2-pwrdn-pins {
> + pins = "gpio_pwrctrl2";
> + function = "pin_fun2";
> + };
> +
> + rk806_dvs2_rst: dvs2-rst-pins {
> + pins = "gpio_pwrctrl2";
> + function = "pin_fun3";
> + };
> +
> + rk806_dvs2_dvs: dvs2-dvs-pins {
> + pins = "gpio_pwrctrl2";
> + function = "pin_fun4";
> + };
> +
> + rk806_dvs2_gpio: dvs2-gpio-pins {
> + pins = "gpio_pwrctrl2";
> + function = "pin_fun5";
> + };
> +
> +
> + rk806_dvs3_slp: dvs3-slp-pins {
> + pins = "gpio_pwrctrl3";
> + function = "pin_fun1";
> + };
> +
> + rk806_dvs3_pwrdn: dvs3-pwrdn-pins {
> + pins = "gpio_pwrctrl3";
> + function = "pin_fun2";
> + };
> +
> + rk806_dvs3_rst: dvs3-rst-pins {
> + pins = "gpio_pwrctrl3";
> + function = "pin_fun3";
> + };
> +
> + rk806_dvs3_dvs: dvs3-dvs-pins {
> + pins = "gpio_pwrctrl3";
> + function = "pin_fun4";
> + };
> +
> + rk806_dvs3_gpio: dvs3-gpio-pins {
> + pins = "gpio_pwrctrl3";
> + function = "pin_fun5";
> + };
> +
> + regulators {
> + vdd_cpu_big_s0: dcdc-reg1 {
> + regulator-always-on;
> + regulator-boot-on;
> + regulator-min-microvolt = <550000>;
> + regulator-max-microvolt = <950000>;
> + regulator-ramp-delay = <12500>;
> + regulator-name = "vdd_cpu_big_s0";
> + regulator-enable-ramp-delay = <400>;
> + regulator-state-mem {
> + regulator-off-in-suspend;
> + };
> + };
> +
> + vdd_npu_s0: dcdc-reg2 {
> + regulator-boot-on;
> + regulator-min-microvolt = <550000>;
> + regulator-max-microvolt = <950000>;
> + regulator-ramp-delay = <12500>;
> + regulator-name = "vdd_npu_s0";
> + regulator-enable-ramp-delay = <400>;
> + regulator-state-mem {
> + regulator-off-in-suspend;
> + };
> + };
> +
> + vdd_cpu_lit_s0: dcdc-reg3 {
> + regulator-always-on;
> + regulator-boot-on;
> + regulator-min-microvolt = <550000>;
> + regulator-max-microvolt = <950000>;
> + regulator-ramp-delay = <12500>;
> + regulator-name = "vdd_cpu_lit_s0";
> + regulator-state-mem {
> + regulator-off-in-suspend;
> + regulator-suspend-microvolt = <750000>;
> + };
> + };
> +
> + vcc_3v3_s3: dcdc-reg4 {
> + regulator-always-on;
> + regulator-boot-on;
> + regulator-min-microvolt = <3300000>;
> + regulator-max-microvolt = <3300000>;
> + regulator-name = "vcc_3v3_s3";
> + regulator-state-mem {
> + regulator-on-in-suspend;
> + regulator-suspend-microvolt = <3300000>;
> + };
> + };
> +
> + vdd_gpu_s0: dcdc-reg5 {
> + regulator-boot-on;
> + regulator-min-microvolt = <550000>;
> + regulator-max-microvolt = <900000>;
> + regulator-ramp-delay = <12500>;
> + regulator-name = "vdd_gpu_s0";
> + regulator-enable-ramp-delay = <400>;
> + regulator-state-mem {
> + regulator-off-in-suspend;
> + regulator-suspend-microvolt = <850000>;
> + };
> + };
> +
> + vddq_ddr_s0: dcdc-reg6 {
> + regulator-always-on;
> + regulator-boot-on;
> + regulator-name = "vddq_ddr_s0";
> + regulator-state-mem {
> + regulator-off-in-suspend;
> + };
> + };
> +
> + vdd_logic_s0: dcdc-reg7 {
> + regulator-always-on;
> + regulator-boot-on;
> + regulator-min-microvolt = <550000>;
> + regulator-max-microvolt = <800000>;
> + regulator-name = "vdd_logic_s0";
> + regulator-state-mem {
> + regulator-off-in-suspend;
> + };
> + };
> +
> + vcc_1v8_s3: dcdc-reg8 {
> + regulator-always-on;
> + regulator-boot-on;
> + regulator-min-microvolt = <1800000>;
> + regulator-max-microvolt = <1800000>;
> + regulator-name = "vcc_1v8_s3";
> + regulator-state-mem {
> + regulator-on-in-suspend;
> + regulator-suspend-microvolt = <1800000>;
> + };
> + };
> +
> + vdd2_ddr_s3: dcdc-reg9 {
> + regulator-always-on;
> + regulator-boot-on;
> + regulator-name = "vdd2_ddr_s3";
> + regulator-state-mem {
> + regulator-on-in-suspend;
> + };
> + };
> +
> + vdd_ddr_s0: dcdc-reg10 {
> + regulator-always-on;
> + regulator-boot-on;
> + regulator-min-microvolt = <550000>;
> + regulator-max-microvolt = <1200000>;
> + regulator-name = "vdd_ddr_s0";
> + regulator-state-mem {
> + regulator-off-in-suspend;
> + };
> + };
> +
> + vcca_1v8_s0: pldo-reg1 {
> + regulator-always-on;
> + regulator-boot-on;
> + regulator-min-microvolt = <1800000>;
> + regulator-max-microvolt = <1800000>;
> + regulator-name = "vcca_1v8_s0";
> + regulator-state-mem {
> + regulator-off-in-suspend;
> + };
> + };
> +
> + vcca1v8_pldo2_s0: pldo-reg2 {
> + regulator-always-on;
> + regulator-boot-on;
> + regulator-min-microvolt = <1800000>;
> + regulator-max-microvolt = <1800000>;
> + regulator-name = "vcca1v8_pldo2_s0";
> + regulator-state-mem {
> + regulator-off-in-suspend;
> + };
> + };
> +
> + vdda_1v2_s0: pldo-reg3 {
> + regulator-always-on;
> + regulator-boot-on;
> + regulator-min-microvolt = <1200000>;
> + regulator-max-microvolt = <1200000>;
> + regulator-name = "vdda_1v2_s0";
> + regulator-state-mem {
> + regulator-off-in-suspend;
> + };
> + };
> +
> + vcca_3v3_s0: pldo-reg4 {
> + regulator-always-on;
> + regulator-boot-on;
> + regulator-min-microvolt = <3300000>;
> + regulator-max-microvolt = <3300000>;
> + regulator-name = "vcca_3v3_s0";
> + regulator-state-mem {
> + regulator-off-in-suspend;
> + };
> + };
> +
> + vccio_sd_s0: pldo-reg5 {
> + regulator-always-on;
> + regulator-boot-on;
> + regulator-min-microvolt = <1800000>;
> + regulator-max-microvolt = <3300000>;
> + regulator-name = "vccio_sd_s0";
> + regulator-state-mem {
> + regulator-off-in-suspend;
> + };
> + };
> +
> + vcca1v8_pldo6_s3: pldo-reg6 {
> + regulator-always-on;
> + regulator-boot-on;
> + regulator-min-microvolt = <1800000>;
> + regulator-max-microvolt = <1800000>;
> + regulator-name = "vcca1v8_pldo6_s3";
> + regulator-state-mem {
> + regulator-on-in-suspend;
> + regulator-suspend-microvolt = <1800000>;
> + };
> + };
> +
> + vdd_0v75_s3: nldo-reg1 {
> + regulator-always-on;
> + regulator-boot-on;
> + regulator-min-microvolt = <750000>;
> + regulator-max-microvolt = <750000>;
> + regulator-name = "vdd_0v75_s3";
> + regulator-state-mem {
> + regulator-on-in-suspend;
> + regulator-suspend-microvolt = <750000>;
> + };
> + };
> +
> + vdda_ddr_pll_s0: nldo-reg2 {
> + regulator-always-on;
> + regulator-boot-on;
> + regulator-min-microvolt = <850000>;
> + regulator-max-microvolt = <850000>;
> + regulator-name = "vdda_ddr_pll_s0";
> + regulator-state-mem {
> + regulator-off-in-suspend;
> + };
> + };
> +
> + vdda0v75_hdmi_s0: nldo-reg3 {
> + regulator-always-on;
> + regulator-boot-on;
> + regulator-min-microvolt = <837500>;
> + regulator-max-microvolt = <837500>;
> + regulator-name = "vdda0v75_hdmi_s0";
> + regulator-state-mem {
> + regulator-off-in-suspend;
> + };
> + };
> +
> + vdda_0v85_s0: nldo-reg4 {
> + regulator-always-on;
> + regulator-boot-on;
> + regulator-min-microvolt = <850000>;
> + regulator-max-microvolt = <850000>;
> + regulator-name = "vdda_0v85_s0";
> + regulator-state-mem {
> + regulator-off-in-suspend;
> + };
> + };
> +
> + vdda_0v75_s0: nldo-reg5 {
> + regulator-always-on;
> + regulator-boot-on;
> + regulator-min-microvolt = <750000>;
> + regulator-max-microvolt = <750000>;
> + regulator-name = "vdda_0v75_s0";
> + regulator-state-mem {
> + regulator-off-in-suspend;
> + };
> + };
> + };
> + };
> +};
> +
> +&i2c2 {
> + status = "okay";
please add a blank line, DT coding style recommend a blank line between
properties and child nodes.
> + hym8563: rtc@51 {
> + compatible = "haoyu,hym8563";
> + reg = <0x51>;
> + #clock-cells = <0>;
> + clock-output-names = "hym8563";
> + interrupt-parent = <&gpio0>;
> + interrupts = <RK_PA5 IRQ_TYPE_LEVEL_LOW>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&hym8563_int>;
> + wakeup-source;
> + };
> +};
> +
> +&mdio0 {
> + rgmii_phy0: phy@0 {
> + compatible = "ethernet-phy-ieee802.3-c22";
> + reg = <0x0>;
> + clocks = <&cru REFCLKO25M_GMAC0_OUT>;
Please add Ethernet PHY reset props here.
> + };
> +};
> +
> +&mdio1 {
> + rgmii_phy1: phy@0 {
> + compatible = "ethernet-phy-ieee802.3-c22";
> + reg = <0x0>;
> + clocks = <&cru REFCLKO25M_GMAC1_OUT>;
And here.
> + };
> +};
> +
> +&pcie0 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pcie_reset>;
> + reset-gpios = <&gpio2 RK_PB1 GPIO_ACTIVE_HIGH>;
> + vpcie3v3-supply = <&vcc_3v3_pcie>;
> + status = "okay";
> +};
> +
> +&pinctrl {
> + hdmi {
> + hdmi_con_en: hdmi-con-en {
> + rockchip,pins = <4 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>;
> + };
> + };
> +
> + hym8563 {
> + hym8563_int: hym8563-int {
> + rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>;
> + };
> + };
> +
> + leds {
> + led_green_pin: led-green-pin {
> + rockchip,pins = <1 RK_PD5 RK_FUNC_GPIO &pcfg_pull_none>;
> + };
> + };
> +
> + pcie {
> + pcie_pwr_en: pcie-pwr-en {
> + rockchip,pins = <4 RK_PA0 RK_FUNC_GPIO &pcfg_pull_up>;
> + };
> +
> + pcie_reset: pcie-reset {
> + rockchip,pins = <2 RK_PB1 RK_FUNC_GPIO &pcfg_pull_up>;
> + };
> + };
> +
> + usb {
> + usb_host_pwr_en: usb-host-pwr-en {
> + rockchip,pins = <1 RK_PC7 RK_FUNC_GPIO &pcfg_pull_none>;
> + };
> +
> + usb_otg0_pwr_en: usb-otg0-pwr-en {
> + rockchip,pins = <3 RK_PD5 RK_FUNC_GPIO &pcfg_pull_none>;
> + };
> +
> + usbc0_int: usbc0-int {
> + rockchip,pins = <3 RK_PD4 RK_FUNC_GPIO &pcfg_pull_up>;
> + };
> + };
> +};
> +
> +&saradc {
> + status = "okay";
> + vref-supply = <&vcca_1v8_s0>;
> +};
> +
> +&sdhci {
> + bus-width = <8>;
> + full-pwr-cycle-in-suspend;
> + max-frequency = <200000000>;
> + mmc-hs400-1_8v;
> + mmc-hs400-enhanced-strobe;
> + no-sdio;
> + no-sd;
> + non-removable;
This should probably have vmmc/vqmmc-supply?
> + status = "okay";
> +};
> +
> +&sdmmc {
> + bus-width = <4>;
> + cap-mmc-highspeed;
Enable of mmc speed when no-mmc look a little bit strange.
> + cap-sd-highspeed;
> + disable-wp;
> + max-frequency = <200000000>;
> + no-sdio;
> + no-mmc;
Are we sure about no-mmc? The datasheet for rk3576 list:
SD/MMC interface
- Compliance to SD v3.0, MMC v4.51
- Supports 4-bit data bus
I would suggest you test with no-mmc removed (and cap-mmc-highspeed not
removed) together with a sd-card to emmc adapter, the emmc will probably
be detected and working.
Regards,
Jonas
> + sd-uhs-sdr104;
> + vmmc-supply = <&vcc_3v3_s3>;
> + vqmmc-supply = <&vccio_sd_s0>;
> + status = "okay";
> +};
> +
> +&uart0 {
> + status = "okay";
> +};
> +
> +&uart4 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&uart4m1_xfer &uart4m1_ctsn>;
> + status = "okay";
> +};
> +
> +&u2phy1 {
> + status = "okay";
> +};
> +
> +&u2phy1_otg {
> + phy-supply = <&vcc_5v0_host>;
> + status = "okay";
> +};
> +
> +&usb_drd1_dwc3 {
> + dr_mode = "host";
> + status = "okay";
> +};
> +
> +&vop {
> + vop-supply = <&vdd_logic_s0>;
> + status = "okay";
> +};
> +
> +&vop_mmu {
> + status = "okay";
> +};
> +
> +&vp0 {
> + vp0_out_hdmi: endpoint@ROCKCHIP_VOP2_EP_HDMI0 {
> + reg = <ROCKCHIP_VOP2_EP_HDMI0>;
> + remote-endpoint = <&hdmi_in_vp0>;
> + };
> +};
> > +&gmac0 {
> > + clock_in_out = "output";
> > + phy-handle = <&rgmii_phy0>;
> > + phy-mode = "rgmii-rxid";
>
> See Andrew's remark on v1 of this patch.
Hi John
If you have questions, please ask. It is not a good idea to silently
ignore reviewers comments. Either do something about it, ask
questions, or politely argue why the reviewer is wrong, because
sometimes we are.
> > + pinctrl-names = "default";
> > + pinctrl-0 = <ð0m0_miim
> > + ð0m0_tx_bus2
> > + ð0m0_rx_bus2
> > + ð0m0_rgmii_clk
> > + ð0m0_rgmii_bus
> > + ðm0_clk0_25m_out>;
> > + snps,reset-gpio = <&gpio2 RK_PB3 GPIO_ACTIVE_LOW>;
> > + snps,reset-active-low;
> > + snps,reset-delays-us = <0 20000 100000>;
>
> The snps,reset- props are depracated, please move to reset props in the
> Ethernet PHY node.
FYI: snps,dwmac.yaml says:
snps,reset-gpio:
deprecated: true
maxItems: 1
description:
PHY Reset GPIO
Anything with 'deprecated: true' you should not be using in new DT
blobs. Don't blindly copy vendor DT, you need to verify it is up to
Mainline quality, and if not, bring it up to Mainline quality.
> > + tx_delay = <0x20>;
This property probably plays a role in the issue with phy-mode.
arch/arm64/boot/dts/rockchip$ grep "rgmii-id" *
rk3328-orangepi-r1-plus-lts.dts: phy-mode = "rgmii-id";
rk3566-bigtreetech-cb2.dtsi: phy-mode = "rgmii-id";
rk3566-nanopi-r3s.dts: phy-mode = "rgmii-id";
rk3566-odroid-m1s.dts: phy-mode = "rgmii-id";
rk3566-orangepi-3b.dtsi: phy-mode = "rgmii-id";
rk3566-radxa-zero-3e.dts: phy-mode = "rgmii-id";
rk3566-rock-3c.dts: phy-mode = "rgmii-id";
rk3568-evb1-v10.dts: phy-mode = "rgmii-id";
rk3568-evb1-v10.dts: phy-mode = "rgmii-id";
...
etc.
You might be able to learn something from these.
Andrew
On 5/4/25 10:12 AM, Andrew Lunn wrote:
>>> +&gmac0 {
>>> + clock_in_out = "output";
>>> + phy-handle = <&rgmii_phy0>;
>>> + phy-mode = "rgmii-rxid";
>>
>> See Andrew's remark on v1 of this patch.
>
> Hi John
>
> If you have questions, please ask. It is not a good idea to silently
> ignore reviewers comments. Either do something about it, ask
> questions, or politely argue why the reviewer is wrong, because
> sometimes we are.
>
Hi Andrew,
Thanks for your feedback and the link to the RGMII delays discussion. I
assumed you suggested switching to phy-mode = "rgmii-id" from
rgmii-rxid. The vendor’s downstream kernel uses rgmii-rxid with tx_delay
= <0x20>, as shown in my post. I tried rgmii-id and removed tx_delay,
but the interface failed to get a DHCP address. Reverting to rgmii-rxid
with the delay restored functionality. Any advice on correctly
configuring rgmii-id or adjusting delays for this board?
Best,
John Clark
>>> + pinctrl-names = "default";
>>> + pinctrl-0 = <ð0m0_miim
>>> + ð0m0_tx_bus2
>>> + ð0m0_rx_bus2
>>> + ð0m0_rgmii_clk
>>> + ð0m0_rgmii_bus
>>> + ðm0_clk0_25m_out>;
>>> + snps,reset-gpio = <&gpio2 RK_PB3 GPIO_ACTIVE_LOW>;
>>> + snps,reset-active-low;
>>> + snps,reset-delays-us = <0 20000 100000>;
>>
>> The snps,reset- props are depracated, please move to reset props in the
>> Ethernet PHY node.
>
> FYI: snps,dwmac.yaml says:
>
> snps,reset-gpio:
> deprecated: true
> maxItems: 1
> description:
> PHY Reset GPIO
>
> Anything with 'deprecated: true' you should not be using in new DT
> blobs. Don't blindly copy vendor DT, you need to verify it is up to
> Mainline quality, and if not, bring it up to Mainline quality.
>
>>> + tx_delay = <0x20>;
>
> This property probably plays a role in the issue with phy-mode.
>
> arch/arm64/boot/dts/rockchip$ grep "rgmii-id" *
> rk3328-orangepi-r1-plus-lts.dts: phy-mode = "rgmii-id";
> rk3566-bigtreetech-cb2.dtsi: phy-mode = "rgmii-id";
> rk3566-nanopi-r3s.dts: phy-mode = "rgmii-id";
> rk3566-odroid-m1s.dts: phy-mode = "rgmii-id";
> rk3566-orangepi-3b.dtsi: phy-mode = "rgmii-id";
> rk3566-radxa-zero-3e.dts: phy-mode = "rgmii-id";
> rk3566-rock-3c.dts: phy-mode = "rgmii-id";
> rk3568-evb1-v10.dts: phy-mode = "rgmii-id";
> rk3568-evb1-v10.dts: phy-mode = "rgmii-id";
> ...
> etc.
>
> You might be able to learn something from these.
>
> Andrew
On Sun, May 04, 2025 at 05:02:33PM -0400, John Clark wrote:
> On 5/4/25 10:12 AM, Andrew Lunn wrote:
> > > > +&gmac0 {
> > > > + clock_in_out = "output";
> > > > + phy-handle = <&rgmii_phy0>;
> > > > + phy-mode = "rgmii-rxid";
> > >
> > > See Andrew's remark on v1 of this patch.
> >
> > Hi John
> >
> > If you have questions, please ask. It is not a good idea to silently
> > ignore reviewers comments. Either do something about it, ask
> > questions, or politely argue why the reviewer is wrong, because
> > sometimes we are.
> >
> Hi Andrew,
> Thanks for your feedback and the link to the RGMII delays discussion. I
> assumed you suggested switching to phy-mode = "rgmii-id" from rgmii-rxid.
> The vendor’s downstream kernel uses rgmii-rxid with tx_delay = <0x20>, as
> shown in my post. I tried rgmii-id and removed tx_delay, but the interface
> failed to get a DHCP address. Reverting to rgmii-rxid with the delay
> restored functionality. Any advice on correctly configuring rgmii-id or
> adjusting delays for this board?
What PHY is it? Are you using the correct PHY driver for it, or
genphy?
rk3576-rock-4d.dts and rk3576-armsom-sige5.dts show that it is
possible to use this SoC with the correct 'rgmii-id',
Andrew
On 5/4/25 7:01 PM, Andrew Lunn wrote:
> On Sun, May 04, 2025 at 05:02:33PM -0400, John Clark wrote:
>> On 5/4/25 10:12 AM, Andrew Lunn wrote:
>>>>> +&gmac0 {
>>>>> + clock_in_out = "output";
>>>>> + phy-handle = <&rgmii_phy0>;
>>>>> + phy-mode = "rgmii-rxid";
>>>>
>>>> See Andrew's remark on v1 of this patch.
>>>
>>> Hi John
>>>
>>> If you have questions, please ask. It is not a good idea to silently
>>> ignore reviewers comments. Either do something about it, ask
>>> questions, or politely argue why the reviewer is wrong, because
>>> sometimes we are.
>>>
>> Hi Andrew,
>> Thanks for your feedback and the link to the RGMII delays discussion. I
>> assumed you suggested switching to phy-mode = "rgmii-id" from rgmii-rxid.
>> The vendor’s downstream kernel uses rgmii-rxid with tx_delay = <0x20>, as
>> shown in my post. I tried rgmii-id and removed tx_delay, but the interface
>> failed to get a DHCP address. Reverting to rgmii-rxid with the delay
>> restored functionality. Any advice on correctly configuring rgmii-id or
>> adjusting delays for this board?
>
> What PHY is it? Are you using the correct PHY driver for it, or
> genphy?
>
MAE0621A-Q3C
http://www.maxio-tech.com/product/12928/12929/12930/12931.html
> rk3576-rock-4d.dts and rk3576-armsom-sige5.dts show that it is
> possible to use this SoC with the correct 'rgmii-id',
>
> Andrew
> > What PHY is it? Are you using the correct PHY driver for it, or > > genphy? > > > MAE0621A-Q3C > http://www.maxio-tech.com/product/12928/12929/12930/12931.html Mainline does not have a PHY driver for this. So nothing is controlling the delays in the PHY. So what you have above works by luck, and is likely to break once there is a PHY driver. So i suggest you drop the Ethernet nodes for the moment. There does appear to be a PHY driver here: https://github.com/CoreELEC/linux-amlogic/blob/5.15.153_202501/drivers/net/phy/maxio.c but it has a number of things wrong with it. You might want to search around and see if there are any cleaner versions around, or if anybody is working on upstreaming a driver for this PHY. Andrew
On 5/4/25 8:45 PM, Andrew Lunn wrote: >>> What PHY is it? Are you using the correct PHY driver for it, or >>> genphy? >>> >> MAE0621A-Q3C >> http://www.maxio-tech.com/product/12928/12929/12930/12931.html > > Mainline does not have a PHY driver for this. So nothing is > controlling the delays in the PHY. So what you have above works by > luck, and is likely to break once there is a PHY driver. So i suggest > you drop the Ethernet nodes for the moment. > > There does appear to be a PHY driver here: > > https://github.com/CoreELEC/linux-amlogic/blob/5.15.153_202501/drivers/net/phy/maxio.c > > but it has a number of things wrong with it. You might want to search > around and see if there are any cleaner versions around, or if anybody > is working on upstreaming a driver for this PHY. > > Andrew > Hi Andrew, Thank you for your valuable feedback and for pointing me toward investigating the PHY configuration further. After digging deeper into the MAE0621A-Q3C PHY (PHY ID 0x7b744412), I now understand why it performs reliably: the generic PHY driver relies on the GMAC to set RGMII delays (tx_delay=0x20, rx_delay=0x10), enabling a stable 1Gbps link for gmac0 in rgmii-rxid mode, while rgmii-id failed in my tests due to the driver’s lack of internal delay configuration. Given the critical role of networking for development, I’d like to retain the GMAC nodes in v3 using this setup, but I’d greatly appreciate your approval on whether the generic PHY driver is suitable in rgmii-rxid mode for now. I’m eager to explore a Maxio-specific driver for mainline compatibility and would be grateful for any guidance on existing upstreaming efforts for this PHY. Best regards, John
> Hi Andrew, > Thank you for your valuable feedback and for pointing me toward > investigating the PHY configuration further. After digging deeper into the > MAE0621A-Q3C PHY (PHY ID 0x7b744412), I now understand why it performs > reliably: the generic PHY driver relies on the GMAC to set RGMII delays > (tx_delay=0x20, rx_delay=0x10), enabling a stable 1Gbps link for gmac0 in > rgmii-rxid mode, while rgmii-id failed in my tests due to the driver’s lack > of internal delay configuration. Given the critical role of networking for > development, I’d like to retain the GMAC nodes in v3 using this setup, but > I’d greatly appreciate your approval on whether the generic PHY driver is > suitable in rgmii-rxid mode for now. Device Tree describes the hardware. The hardware does not appear to have the 2ns delay added by extra long clock lines, so your DT description of the hardware using 'rgmii-rxid' is wrong. If we where to accept this broken description now, it really will break when the MAE0621A driver is merged and it correctly sets the RGMII delays. So sorry, no we cannot accept it. For you own development work, you can merge the driver i pointed to into your tree. It needs work, but it is not terrible. So it should work for you. > I’m eager to explore a Maxio-specific > driver for mainline compatibility and would be grateful for any guidance on > existing upstreaming efforts for this PHY. This is the first time i've heard of this device, so i have no idea if anybody else is working on it. I would suggest you reach out to the author of that patch. Andrew
On 5/4/25 8:45 PM, Andrew Lunn wrote: >>> What PHY is it? Are you using the correct PHY driver for it, or >>> genphy? >>> >> MAE0621A-Q3C >> http://www.maxio-tech.com/product/12928/12929/12930/12931.html > > Mainline does not have a PHY driver for this. So nothing is > controlling the delays in the PHY. So what you have above works by > luck, and is likely to break once there is a PHY driver. So i suggest > you drop the Ethernet nodes for the moment. > The chip claims to be a pin-for-pin clone of the rtl8211f. Empirical testing has demonstrated it to be extremely stable. Without networking IO the board is very difficult to develop against. I can disable networking if that is the consensus. > There does appear to be a PHY driver here: > > https://github.com/CoreELEC/linux-amlogic/blob/5.15.153_202501/drivers/net/phy/maxio.c > > but it has a number of things wrong with it. You might want to search > around and see if there are any cleaner versions around, or if anybody > is working on upstreaming a driver for this PHY. > > Andrew
Hi,
On Mon May 5, 2025 at 2:52 AM CEST, John Clark wrote:
> On 5/4/25 8:45 PM, Andrew Lunn wrote:
>>>> What PHY is it? Are you using the correct PHY driver for it, or
>>>> genphy?
>>>>
>>> MAE0621A-Q3C
>>> http://www.maxio-tech.com/product/12928/12929/12930/12931.html
>>
>> Mainline does not have a PHY driver for this. So nothing is
>> controlling the delays in the PHY. So what you have above works by
>> luck, and is likely to break once there is a PHY driver. So i suggest
>> you drop the Ethernet nodes for the moment.
>>
> The chip claims to be a pin-for-pin clone of the rtl8211f. Empirical
> testing has demonstrated it to be extremely stable. Without networking
> IO the board is very difficult to develop against. I can disable
> networking if that is the consensus.
>
>> There does appear to be a PHY driver here:
>>
>> https://github.com/CoreELEC/linux-amlogic/blob/5.15.153_202501/drivers/net/phy/maxio.c
>>
>> but it has a number of things wrong with it. You might want to search
>> around and see if there are any cleaner versions around, or if anybody
>> is working on upstreaming a driver for this PHY.
It may be nothing, but to me this is getting too much of a coincidence.
I have a NanoPi R5S and I want(ed) to look at its gmac node as well,
because it (also) has some deprecated properties ... and
``phy-mode = "rgmii"`` which was done deliberately in commit
31425b1fadb2 ("arm64: dts: rockchip: fix gmac support for NanoPi R5S")
and the change was away from "rgmii-id" ... and it has a RTL8211F-CG.
Unfortunately the commit message doesn't say *why* it changed.
I also have a Quartz64-B, which also has a RTL8211F-CG and it has
``phy-mode = "rgmii"``, changed from "rgmii-id" in commit
16bc4d196b2a ("arm64: dts: rockchip: Fix ethernet on production Quartz64-B")
And maybe related, but a bit different is the Quartz64-A which I also
have, which also has ``phy-mode = "rgmii"`` which I'm reasonably sure
was done deliberately (by Peter Geis, who also made the previously
mentioned commit for Q64-B). Q64-A's PHY is YT-8511C 'though'.
And then there's an 'issue' with Q64-A and Q64-B when U-Boot enabled the
ethernet driver causing massive packet loss:
https://lore.kernel.org/u-boot/2086393.9F9pDXStbY@bagend/
"configs: rockchip: Enable ethernet driver on RK356x boards"
(packet loss on Q64-B was significantly higher then on Q64-A)
As I said, it could be a coincidence and if it is, just tell me and I'll
stay out of this thread going further.
In any case, thanks for "Add informative text about RGMII delays", that
is quite useful :-)
Cheers,
Diederik
> I have a NanoPi R5S and I want(ed) to look at its gmac node as well,
> because it (also) has some deprecated properties ... and
> ``phy-mode = "rgmii"`` which was done deliberately in commit
> 31425b1fadb2 ("arm64: dts: rockchip: fix gmac support for NanoPi R5S")
> and the change was away from "rgmii-id" ... and it has a RTL8211F-CG.
> Unfortunately the commit message doesn't say *why* it changed.
Often the developer does not actually understand RGMII delays. They
simply try things at random until it works, and then call it done.
Over the last year or more i've been much more strict at this, looking
at more patches for .dts files and pointing out errors. Hopefully with
time the errors will become less frequent as developers start to
learn, and there are more good examples top copy/paste. But it also
require some vendors to fix their broken MAC drivers.
Andrew
On 5/4/25 7:01 PM, Andrew Lunn wrote:
> On Sun, May 04, 2025 at 05:02:33PM -0400, John Clark wrote:
>> On 5/4/25 10:12 AM, Andrew Lunn wrote:
>>>>> +&gmac0 {
>>>>> + clock_in_out = "output";
>>>>> + phy-handle = <&rgmii_phy0>;
>>>>> + phy-mode = "rgmii-rxid";
>>>>
>>>> See Andrew's remark on v1 of this patch.
>>>
>>> Hi John
>>>
>>> If you have questions, please ask. It is not a good idea to silently
>>> ignore reviewers comments. Either do something about it, ask
>>> questions, or politely argue why the reviewer is wrong, because
>>> sometimes we are.
>>>
>> Hi Andrew,
>> Thanks for your feedback and the link to the RGMII delays discussion. I
>> assumed you suggested switching to phy-mode = "rgmii-id" from rgmii-rxid.
>> The vendor’s downstream kernel uses rgmii-rxid with tx_delay = <0x20>, as
>> shown in my post. I tried rgmii-id and removed tx_delay, but the interface
>> failed to get a DHCP address. Reverting to rgmii-rxid with the delay
>> restored functionality. Any advice on correctly configuring rgmii-id or
>> adjusting delays for this board?
>
> What PHY is it? Are you using the correct PHY driver for it, or
> genphy?
>
This fails:
&gmac0 {
clock_in_out = "output";
phy-handle = <&rgmii_phy0>;
phy-mode = "rgmii-id";
pinctrl-names = "default";
pinctrl-0 = <ð0m0_miim
ð0m0_tx_bus2
ð0m0_rx_bus2
ð0m0_rgmii_clk
ð0m0_rgmii_bus
ðm0_clk0_25m_out>;
status = "okay";
};
&mdio0 {
rgmii_phy0: ethernet-phy@0 {
compatible = "ethernet-phy-ieee802.3-c22";
reg = <0x0>;
clocks = <&cru REFCLKO25M_GMAC0_OUT>;
pinctrl-names = "default";
pinctrl-0 = <&gmac0_rst>;
reset-assert-us = <20000>;
reset-deassert-us = <100000>;
reset-gpios = <&gpio2 RK_PB3 GPIO_ACTIVE_LOW>;
};
};
&pinctrl {
gmac {
gmac0_rst: gmac0-rst {
rockchip,pins = <2 RK_PB3 RK_FUNC_GPIO
&pcfg_pull_none>;
};
};
};
This works:
&gmac0 {
clock_in_out = "output";
phy-handle = <&rgmii_phy0>;
phy-mode = "rgmii-rxid";
pinctrl-names = "default";
pinctrl-0 = <ð0m0_miim
ð0m0_tx_bus2
ð0m0_rx_bus2
ð0m0_rgmii_clk
ð0m0_rgmii_bus
ðm0_clk0_25m_out>;
tx_delay = <0x20>;
status = "okay";
};
&mdio0 {
rgmii_phy0: ethernet-phy@0 {
compatible = "ethernet-phy-ieee802.3-c22";
reg = <0x0>;
clocks = <&cru REFCLKO25M_GMAC0_OUT>;
pinctrl-names = "default";
pinctrl-0 = <&gmac0_rst>;
reset-assert-us = <20000>;
reset-deassert-us = <100000>;
reset-gpios = <&gpio2 RK_PB3 GPIO_ACTIVE_LOW>;
};
};
&pinctrl {
gmac {
gmac0_rst: gmac0-rst {
rockchip,pins = <2 RK_PB3 RK_FUNC_GPIO
&pcfg_pull_none>;
};
};
};
>
> rk3576-rock-4d.dts and rk3576-armsom-sige5.dts show that it is
> possible to use this SoC with the correct 'rgmii-id',
>
> Andrew
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