From: Miquel Sabaté Solà <mikisabate@gmail.com>

Fix a couple of spelling issues plus some minor details on the grammar.

Signed-off-by: Miquel Sabaté Solà <mikisabate@gmail.com>
---
 arch/riscv/Kconfig | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig
index 1fd197afd2f7..3f40e33bc115 100644
--- a/arch/riscv/Kconfig
+++ b/arch/riscv/Kconfig
@@ -664,12 +664,12 @@ config RISCV_ISA_V_PREEMPTIVE
 	default y
 	help
 	  Usually, in-kernel SIMD routines are run with preemption disabled.
-	  Functions which envoke long running SIMD thus must yield core's
+	  Functions which invoke long running SIMD thus must yield the core's
 	  vector unit to prevent blocking other tasks for too long.
 
-	  This config allows kernel to run SIMD without explicitly disable
-	  preemption. Enabling this config will result in higher memory
-	  consumption due to the allocation of per-task's kernel Vector context.
+	  This config allows the kernel to run SIMD without explicitly disabling
+	  preemption. Enabling this config will result in higher memory consumption
+	  due to the allocation of per-task's kernel Vector context.
 
 config RISCV_ISA_ZAWRS
 	bool "Zawrs extension support for more efficient busy waiting"
-- 
2.49.0

Hi Miquel,

Your patch title should be prefixed with "riscv" or "RISC-V", but no 
need to resend, I'll fix it when I merge your patch.

On 01/05/2025 15:03, mikisabate@gmail.com wrote:
> From: Miquel Sabaté Solà <mikisabate@gmail.com>
>
> Fix a couple of spelling issues plus some minor details on the grammar.
>
> Signed-off-by: Miquel Sabaté Solà <mikisabate@gmail.com>
> ---
>   arch/riscv/Kconfig | 8 ++++----
>   1 file changed, 4 insertions(+), 4 deletions(-)
>
> diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig
> index 1fd197afd2f7..3f40e33bc115 100644
> --- a/arch/riscv/Kconfig
> +++ b/arch/riscv/Kconfig
> @@ -664,12 +664,12 @@ config RISCV_ISA_V_PREEMPTIVE
>   	default y
>   	help
>   	  Usually, in-kernel SIMD routines are run with preemption disabled.
> -	  Functions which envoke long running SIMD thus must yield core's
> +	  Functions which invoke long running SIMD thus must yield the core's
>   	  vector unit to prevent blocking other tasks for too long.
>   
> -	  This config allows kernel to run SIMD without explicitly disable
> -	  preemption. Enabling this config will result in higher memory
> -	  consumption due to the allocation of per-task's kernel Vector context.
> +	  This config allows the kernel to run SIMD without explicitly disabling
> +	  preemption. Enabling this config will result in higher memory consumption
> +	  due to the allocation of per-task's kernel Vector context.
>   
>   config RISCV_ISA_ZAWRS
>   	bool "Zawrs extension support for more efficient busy waiting"


Reviewed-by: Alexandre Ghiti <alexghiti@rivosinc.com>

Thanks,

Alex

On dt., de maig 06 2025, Alexandre Ghiti wrote:

> Hi Miquel,
>
> Your patch title should be prefixed with "riscv" or "RISC-V", but no need to
> resend, I'll fix it when I merge your patch.

Yikes! I'll keep this in mind next time. Thanks!

>
> On 01/05/2025 15:03, mikisabate@gmail.com wrote:
>> From: Miquel Sabaté Solà <mikisabate@gmail.com>
>>
>> Fix a couple of spelling issues plus some minor details on the grammar.
>>
>> Signed-off-by: Miquel Sabaté Solà <mikisabate@gmail.com>
>> ---
>>   arch/riscv/Kconfig | 8 ++++----
>>   1 file changed, 4 insertions(+), 4 deletions(-)
>>
>> diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig
>> index 1fd197afd2f7..3f40e33bc115 100644
>> --- a/arch/riscv/Kconfig
>> +++ b/arch/riscv/Kconfig
>> @@ -664,12 +664,12 @@ config RISCV_ISA_V_PREEMPTIVE
>>   	default y
>>   	help
>>   	  Usually, in-kernel SIMD routines are run with preemption disabled.
>> -	  Functions which envoke long running SIMD thus must yield core's
>> +	  Functions which invoke long running SIMD thus must yield the core's
>>   	  vector unit to prevent blocking other tasks for too long.
>>   -	  This config allows kernel to run SIMD without explicitly disable
>> -	  preemption. Enabling this config will result in higher memory
>> -	  consumption due to the allocation of per-task's kernel Vector context.
>> +	  This config allows the kernel to run SIMD without explicitly disabling
>> +	  preemption. Enabling this config will result in higher memory consumption
>> +	  due to the allocation of per-task's kernel Vector context.
>>     config RISCV_ISA_ZAWRS
>>   	bool "Zawrs extension support for more efficient busy waiting"
>
>
> Reviewed-by: Alexandre Ghiti <alexghiti@rivosinc.com>
>
> Thanks,
>
> Alex