From: Mohammad Rafi Shaik <quic_mohs@quicinc.com>
Add WSA LPASS macro Codec along with SoundWire controller.
Signed-off-by: Mohammad Rafi Shaik <quic_mohs@quicinc.com>
Co-developed-by: Prasad Kumpatla <quic_pkumpatl@quicinc.com>
Signed-off-by: Prasad Kumpatla <quic_pkumpatl@quicinc.com>
---
arch/arm64/boot/dts/qcom/sc7280.dtsi | 68 ++++++++++++++++++++++++++++
1 file changed, 68 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi
index 3453740c0d14..d4aacb97a18c 100644
--- a/arch/arm64/boot/dts/qcom/sc7280.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi
@@ -2601,6 +2601,64 @@
status = "disabled";
};
+ lpass_wsa_macro: codec@3240000 {
+ compatible = "qcom,sc7280-lpass-wsa-macro";
+ reg = <0x0 0x03240000 0x0 0x1000>;
+
+ clocks = <&lpass_aon LPASS_AON_CC_TX_MCLK_CLK>,
+ <&lpass_aon LPASS_AON_CC_TX_MCLK_2X_CLK>,
+ <&lpass_va_macro>;
+ clock-names = "mclk", "npl", "fsgen";
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&lpass_wsa_swr_clk>, <&lpass_wsa_swr_data>;
+
+ power-domains = <&lpass_hm LPASS_CORE_CC_LPASS_CORE_HM_GDSC>,
+ <&lpass_aon LPASS_AON_CC_LPASS_AUDIO_HM_GDSC>;
+ power-domain-names = "macro", "dcodec";
+
+ #clock-cells = <0>;
+ clock-output-names = "mclk";
+ #sound-dai-cells = <1>;
+
+ status = "disabled";
+ };
+
+ swr2: soundwire@3250000 {
+ compatible = "qcom,soundwire-v1.6.0";
+ reg = <0x0 0x03250000 0x0 0x2000>;
+
+ interrupts = <GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&lpass_wsa_macro>;
+ clock-names = "iface";
+
+ resets = <&lpass_audiocc LPASS_AUDIO_SWR_WSA_CGCR>;
+ reset-names = "swr_audio_cgcr";
+
+ qcom,din-ports = <2>;
+ qcom,dout-ports = <6>;
+
+ qcom,ports-sinterval-low = /bits/ 8 <0x07 0x1f 0x3f 0x07
+ 0x1f 0x3f 0x0f 0x0f>;
+ qcom,ports-offset1 = /bits/ 8 <0x01 0x02 0x0c 0x06 0x12 0x0d 0x07 0x0a>;
+ qcom,ports-offset2 = /bits/ 8 <0xff 0x00 0x1f 0xff 0x00 0x1f 0x00 0x00>;
+ qcom,ports-hstart = /bits/ 8 <0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff>;
+ qcom,ports-hstop = /bits/ 8 <0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff>;
+ qcom,ports-word-length = /bits/ 8 <0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff>;
+ qcom,ports-block-pack-mode = /bits/ 8 <0xff 0xff 0x01 0xff 0xff 0x01
+ 0xff 0xff>;
+ qcom,ports-block-group-count = /bits/ 8 <0xff 0xff 0xff 0xff 0xff 0xff
+ 0xff 0xff>;
+ qcom,ports-lane-control = /bits/ 8 <0xff 0xff 0xff 0xff 0xff 0xff
+ 0xff 0xff>;
+
+ #address-cells = <2>;
+ #size-cells = <0>;
+ #sound-dai-cells = <1>;
+
+ status = "disabled";
+ };
+
lpass_audiocc: clock-controller@3300000 {
compatible = "qcom,sc7280-lpassaudiocc";
reg = <0 0x03300000 0 0x30000>,
@@ -2807,6 +2865,16 @@
pins = "gpio1", "gpio2", "gpio14";
function = "swr_tx_data";
};
+
+ lpass_wsa_swr_clk: wsa-swr-clk-state {
+ pins = "gpio10";
+ function = "wsa_swr_clk";
+ };
+
+ lpass_wsa_swr_data: wsa-swr-data-state {
+ pins = "gpio11";
+ function = "wsa_swr_data";
+ };
};
gpu: gpu@3d00000 {
--
2.17.1
On 4/29/25 11:24 AM, Prasad Kumpatla wrote:
> From: Mohammad Rafi Shaik <quic_mohs@quicinc.com>
>
> Add WSA LPASS macro Codec along with SoundWire controller.
>
> Signed-off-by: Mohammad Rafi Shaik <quic_mohs@quicinc.com>
> Co-developed-by: Prasad Kumpatla <quic_pkumpatl@quicinc.com>
> Signed-off-by: Prasad Kumpatla <quic_pkumpatl@quicinc.com>
> ---
> arch/arm64/boot/dts/qcom/sc7280.dtsi | 68 ++++++++++++++++++++++++++++
> 1 file changed, 68 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi
> index 3453740c0d14..d4aacb97a18c 100644
> --- a/arch/arm64/boot/dts/qcom/sc7280.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi
> @@ -2601,6 +2601,64 @@
> status = "disabled";
> };
>
> + lpass_wsa_macro: codec@3240000 {
> + compatible = "qcom,sc7280-lpass-wsa-macro";
> + reg = <0x0 0x03240000 0x0 0x1000>;
> +
> + clocks = <&lpass_aon LPASS_AON_CC_TX_MCLK_CLK>,
> + <&lpass_aon LPASS_AON_CC_TX_MCLK_2X_CLK>,
> + <&lpass_va_macro>;
> + clock-names = "mclk", "npl", "fsgen";
Please make this a vertical list
> +
> + pinctrl-names = "default";
> + pinctrl-0 = <&lpass_wsa_swr_clk>, <&lpass_wsa_swr_data>;
property-n
property-names
across all changes, please
[...]
> + swr2: soundwire@3250000 {
> + compatible = "qcom,soundwire-v1.6.0";
> + reg = <0x0 0x03250000 0x0 0x2000>;
> +
> + interrupts = <GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&lpass_wsa_macro>;
> + clock-names = "iface";
> +
> + resets = <&lpass_audiocc LPASS_AUDIO_SWR_WSA_CGCR>;
> + reset-names = "swr_audio_cgcr";
> +
> + qcom,din-ports = <2>;
The computer tells me it should be 3
Konrad
On 4/29/2025 4:21 PM, Konrad Dybcio wrote:
> On 4/29/25 11:24 AM, Prasad Kumpatla wrote:
>> From: Mohammad Rafi Shaik <quic_mohs@quicinc.com>
>>
>> Add WSA LPASS macro Codec along with SoundWire controller.
>>
>> Signed-off-by: Mohammad Rafi Shaik <quic_mohs@quicinc.com>
>> Co-developed-by: Prasad Kumpatla <quic_pkumpatl@quicinc.com>
>> Signed-off-by: Prasad Kumpatla <quic_pkumpatl@quicinc.com>
>> ---
>> arch/arm64/boot/dts/qcom/sc7280.dtsi | 68 ++++++++++++++++++++++++++++
>> 1 file changed, 68 insertions(+)
>>
>> diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi
>> index 3453740c0d14..d4aacb97a18c 100644
>> --- a/arch/arm64/boot/dts/qcom/sc7280.dtsi
>> +++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi
>> @@ -2601,6 +2601,64 @@
>> status = "disabled";
>> };
>>
>> + lpass_wsa_macro: codec@3240000 {
>> + compatible = "qcom,sc7280-lpass-wsa-macro";
>> + reg = <0x0 0x03240000 0x0 0x1000>;
>> +
>> + clocks = <&lpass_aon LPASS_AON_CC_TX_MCLK_CLK>,
>> + <&lpass_aon LPASS_AON_CC_TX_MCLK_2X_CLK>,
>> + <&lpass_va_macro>;
>> + clock-names = "mclk", "npl", "fsgen";
>
> Please make this a vertical list
Ack>
>> +
>> + pinctrl-names = "default";
>> + pinctrl-0 = <&lpass_wsa_swr_clk>, <&lpass_wsa_swr_data>;
>
> property-n
> property-names
>
> across all changes, please
>
> [...]
Ack>
>> + swr2: soundwire@3250000 {
>> + compatible = "qcom,soundwire-v1.6.0";
>> + reg = <0x0 0x03250000 0x0 0x2000>;
>> +
>> + interrupts = <GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH>;
>> + clocks = <&lpass_wsa_macro>;
>> + clock-names = "iface";
>> +
>> + resets = <&lpass_audiocc LPASS_AUDIO_SWR_WSA_CGCR>;
>> + reset-names = "swr_audio_cgcr";
>> +
>> + qcom,din-ports = <2>;
>
> The computer tells me it should be 3
For swr2 - soundwire version-V1.6.0 contains din-ports as 2 only. Please
refer below link
https://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git/tree/arch/arm64/boot/dts/qcom/sc8280xp.dtsi#n2931
Thanks,
Prasad>
>
> Konrad
On 5/8/25 6:31 PM, Prasad Kumpatla wrote:
>
>
> On 4/29/2025 4:21 PM, Konrad Dybcio wrote:
>> On 4/29/25 11:24 AM, Prasad Kumpatla wrote:
>>> From: Mohammad Rafi Shaik <quic_mohs@quicinc.com>
>>>
>>> Add WSA LPASS macro Codec along with SoundWire controller.
>>>
>>> Signed-off-by: Mohammad Rafi Shaik <quic_mohs@quicinc.com>
>>> Co-developed-by: Prasad Kumpatla <quic_pkumpatl@quicinc.com>
>>> Signed-off-by: Prasad Kumpatla <quic_pkumpatl@quicinc.com>
>>> ---
[...]
>>> + swr2: soundwire@3250000 {
>>> + compatible = "qcom,soundwire-v1.6.0";
>>> + reg = <0x0 0x03250000 0x0 0x2000>;
>>> +
>>> + interrupts = <GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH>;
>>> + clocks = <&lpass_wsa_macro>;
>>> + clock-names = "iface";
>>> +
>>> + resets = <&lpass_audiocc LPASS_AUDIO_SWR_WSA_CGCR>;
>>> + reset-names = "swr_audio_cgcr";
>>> +
>>> + qcom,din-ports = <2>;
>>
>> The computer tells me it should be 3
> For swr2 - soundwire version-V1.6.0 contains din-ports as 2 only. Please refer below link
> https://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git/tree/arch/arm64/boot/dts/qcom/sc8280xp.dtsi#n2931
I'm referring to what I've seen in the internal data as parameters,
please doublecheck
Konrad
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