Ethernet boot requires CPSW nodes to be present starting from R5 SPL
stage. Add bootph-all property to required nodes to enable Ethernet boot
for AM62P5-SK and J722S-EVM.
Reviewed-by: Roger Quadros <rogerq@kernel.org>
Signed-off-by: Chintan Vankar <c-vankar@ti.com>
---
Link to v3:
https://lore.kernel.org/r/20250425051055.2393301-3-c-vankar@ti.com/
Changes from v3 to v4:
- No changes.
arch/arm64/boot/dts/ti/k3-am62p-j722s-common-main.dtsi | 3 +++
arch/arm64/boot/dts/ti/k3-am62p5-sk.dts | 2 ++
arch/arm64/boot/dts/ti/k3-j722s-evm.dts | 3 +++
3 files changed, 8 insertions(+)
diff --git a/arch/arm64/boot/dts/ti/k3-am62p-j722s-common-main.dtsi b/arch/arm64/boot/dts/ti/k3-am62p-j722s-common-main.dtsi
index 7b65538110e8..11f484f88603 100644
--- a/arch/arm64/boot/dts/ti/k3-am62p-j722s-common-main.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-am62p-j722s-common-main.dtsi
@@ -50,6 +50,7 @@ phy_gmii_sel: phy@4044 {
compatible = "ti,am654-phy-gmii-sel";
reg = <0x4044 0x8>;
#phy-cells = <1>;
+ bootph-all;
};
epwm_tbclk: clock-controller@4130 {
@@ -730,6 +731,7 @@ cpsw_port1: port@1 {
mac-address = [00 00 00 00 00 00];
ti,syscon-efuse = <&cpsw_mac_syscon 0x0>;
status = "disabled";
+ bootph-all;
};
cpsw_port2: port@2 {
@@ -751,6 +753,7 @@ cpsw3g_mdio: mdio@f00 {
clock-names = "fck";
bus_freq = <1000000>;
status = "disabled";
+ bootph-all;
};
cpts@3d000 {
diff --git a/arch/arm64/boot/dts/ti/k3-am62p5-sk.dts b/arch/arm64/boot/dts/ti/k3-am62p5-sk.dts
index d29f524600af..5b2f0945a9eb 100644
--- a/arch/arm64/boot/dts/ti/k3-am62p5-sk.dts
+++ b/arch/arm64/boot/dts/ti/k3-am62p5-sk.dts
@@ -227,6 +227,7 @@ main_mdio1_pins_default: main-mdio1-default-pins {
AM62PX_IOPAD(0x0160, PIN_OUTPUT, 0) /* (F17) MDIO0_MDC */
AM62PX_IOPAD(0x015c, PIN_INPUT, 0) /* (F16) MDIO0_MDIO */
>;
+ bootph-all;
};
main_mmc1_pins_default: main-mmc1-default-pins {
@@ -496,6 +497,7 @@ &cpsw3g_mdio {
cpsw3g_phy0: ethernet-phy@0 {
reg = <0>;
+ bootph-all;
ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
ti,min-output-impedance;
diff --git a/arch/arm64/boot/dts/ti/k3-j722s-evm.dts b/arch/arm64/boot/dts/ti/k3-j722s-evm.dts
index 34b9d190800e..93d770c5792e 100644
--- a/arch/arm64/boot/dts/ti/k3-j722s-evm.dts
+++ b/arch/arm64/boot/dts/ti/k3-j722s-evm.dts
@@ -310,6 +310,7 @@ mdio_pins_default: mdio-default-pins {
J722S_IOPAD(0x0160, PIN_OUTPUT, 0) /* (AC24) MDIO0_MDC */
J722S_IOPAD(0x015c, PIN_INPUT, 0) /* (AD25) MDIO0_MDIO */
>;
+ bootph-all;
};
ospi0_pins_default: ospi0-default-pins {
@@ -344,6 +345,7 @@ J722S_IOPAD(0x0140, PIN_OUTPUT, 0) /* (AF24) RGMII1_TD3 */
J722S_IOPAD(0x0130, PIN_OUTPUT, 0) /* (AG26) RGMII1_TXC */
J722S_IOPAD(0x012c, PIN_OUTPUT, 0) /* (AF25) RGMII1_TX_CTL */
>;
+ bootph-all;
};
main_usb1_pins_default: main-usb1-default-pins {
@@ -388,6 +390,7 @@ &cpsw3g_mdio {
cpsw3g_phy0: ethernet-phy@0 {
reg = <0>;
+ bootph-all;
ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
ti,min-output-impedance;
--
2.34.1
On 12:56-20250429, Chintan Vankar wrote:
> Ethernet boot requires CPSW nodes to be present starting from R5 SPL
> stage. Add bootph-all property to required nodes to enable Ethernet boot
> for AM62P5-SK and J722S-EVM.
>
> Reviewed-by: Roger Quadros <rogerq@kernel.org>
> Signed-off-by: Chintan Vankar <c-vankar@ti.com>
> ---
>
> Link to v3:
> https://lore.kernel.org/r/20250425051055.2393301-3-c-vankar@ti.com/
>
> Changes from v3 to v4:
> - No changes.
>
> arch/arm64/boot/dts/ti/k3-am62p-j722s-common-main.dtsi | 3 +++
Please notice that we have the same problem[1] here as well.
[1] https://lore.kernel.org/all/20250425212427.vvyocc4mmne5g3vq@vividly/
> arch/arm64/boot/dts/ti/k3-am62p5-sk.dts | 2 ++
> arch/arm64/boot/dts/ti/k3-j722s-evm.dts | 3 +++
> 3 files changed, 8 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/ti/k3-am62p-j722s-common-main.dtsi b/arch/arm64/boot/dts/ti/k3-am62p-j722s-common-main.dtsi
> index 7b65538110e8..11f484f88603 100644
> --- a/arch/arm64/boot/dts/ti/k3-am62p-j722s-common-main.dtsi
> +++ b/arch/arm64/boot/dts/ti/k3-am62p-j722s-common-main.dtsi
> @@ -50,6 +50,7 @@ phy_gmii_sel: phy@4044 {
> compatible = "ti,am654-phy-gmii-sel";
> reg = <0x4044 0x8>;
> #phy-cells = <1>;
> + bootph-all;
> };
>
> epwm_tbclk: clock-controller@4130 {
> @@ -730,6 +731,7 @@ cpsw_port1: port@1 {
> mac-address = [00 00 00 00 00 00];
> ti,syscon-efuse = <&cpsw_mac_syscon 0x0>;
> status = "disabled";
> + bootph-all;
> };
>
> cpsw_port2: port@2 {
> @@ -751,6 +753,7 @@ cpsw3g_mdio: mdio@f00 {
> clock-names = "fck";
> bus_freq = <1000000>;
> status = "disabled";
> + bootph-all;
> };
>
> cpts@3d000 {
> diff --git a/arch/arm64/boot/dts/ti/k3-am62p5-sk.dts b/arch/arm64/boot/dts/ti/k3-am62p5-sk.dts
> index d29f524600af..5b2f0945a9eb 100644
> --- a/arch/arm64/boot/dts/ti/k3-am62p5-sk.dts
> +++ b/arch/arm64/boot/dts/ti/k3-am62p5-sk.dts
> @@ -227,6 +227,7 @@ main_mdio1_pins_default: main-mdio1-default-pins {
> AM62PX_IOPAD(0x0160, PIN_OUTPUT, 0) /* (F17) MDIO0_MDC */
> AM62PX_IOPAD(0x015c, PIN_INPUT, 0) /* (F16) MDIO0_MDIO */
> >;
> + bootph-all;
> };
>
> main_mmc1_pins_default: main-mmc1-default-pins {
> @@ -496,6 +497,7 @@ &cpsw3g_mdio {
>
> cpsw3g_phy0: ethernet-phy@0 {
> reg = <0>;
> + bootph-all;
> ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
> ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
> ti,min-output-impedance;
> diff --git a/arch/arm64/boot/dts/ti/k3-j722s-evm.dts b/arch/arm64/boot/dts/ti/k3-j722s-evm.dts
> index 34b9d190800e..93d770c5792e 100644
> --- a/arch/arm64/boot/dts/ti/k3-j722s-evm.dts
> +++ b/arch/arm64/boot/dts/ti/k3-j722s-evm.dts
> @@ -310,6 +310,7 @@ mdio_pins_default: mdio-default-pins {
> J722S_IOPAD(0x0160, PIN_OUTPUT, 0) /* (AC24) MDIO0_MDC */
> J722S_IOPAD(0x015c, PIN_INPUT, 0) /* (AD25) MDIO0_MDIO */
> >;
> + bootph-all;
> };
>
> ospi0_pins_default: ospi0-default-pins {
> @@ -344,6 +345,7 @@ J722S_IOPAD(0x0140, PIN_OUTPUT, 0) /* (AF24) RGMII1_TD3 */
> J722S_IOPAD(0x0130, PIN_OUTPUT, 0) /* (AG26) RGMII1_TXC */
> J722S_IOPAD(0x012c, PIN_OUTPUT, 0) /* (AF25) RGMII1_TX_CTL */
> >;
> + bootph-all;
> };
>
> main_usb1_pins_default: main-usb1-default-pins {
> @@ -388,6 +390,7 @@ &cpsw3g_mdio {
>
> cpsw3g_phy0: ethernet-phy@0 {
> reg = <0>;
> + bootph-all;
> ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
> ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
> ti,min-output-impedance;
> --
> 2.34.1
>
--
Regards,
Nishanth Menon
Key (0xDDB5849D1736249D) / Fingerprint: F8A2 8693 54EB 8232 17A3 1A34 DDB5 849D 1736 249D
Hello Nishanth,
On 4/29/2025 4:57 PM, Nishanth Menon wrote:
> On 12:56-20250429, Chintan Vankar wrote:
>> Ethernet boot requires CPSW nodes to be present starting from R5 SPL
>> stage. Add bootph-all property to required nodes to enable Ethernet boot
>> for AM62P5-SK and J722S-EVM.
>>
>> Reviewed-by: Roger Quadros <rogerq@kernel.org>
>> Signed-off-by: Chintan Vankar <c-vankar@ti.com>
>> ---
>>
>> Link to v3:
>> https://lore.kernel.org/r/20250425051055.2393301-3-c-vankar@ti.com/
>>
>> Changes from v3 to v4:
>> - No changes.
>>
>> arch/arm64/boot/dts/ti/k3-am62p-j722s-common-main.dtsi | 3 +++
>
> Please notice that we have the same problem[1] here as well.
>
> [1] https://lore.kernel.org/all/20250425212427.vvyocc4mmne5g3vq@vividly/
I have added "bootph-all" property in the common file of J722S-EVM and
AM62P5-SK since we are enabling Ethernet boot for both the boards. Are
you referring to move the nodes I have added in
"k3-am62p-j722s-common-main.dtsi" to respective board files,
"k3-am62p5-sk.dts" and "k3-j722s-evm.dts".
Regards,
Chintan.
>
>> arch/arm64/boot/dts/ti/k3-am62p5-sk.dts | 2 ++
>> arch/arm64/boot/dts/ti/k3-j722s-evm.dts | 3 +++
>> 3 files changed, 8 insertions(+)
>>
>> diff --git a/arch/arm64/boot/dts/ti/k3-am62p-j722s-common-main.dtsi b/arch/arm64/boot/dts/ti/k3-am62p-j722s-common-main.dtsi
>> index 7b65538110e8..11f484f88603 100644
>> --- a/arch/arm64/boot/dts/ti/k3-am62p-j722s-common-main.dtsi
>> +++ b/arch/arm64/boot/dts/ti/k3-am62p-j722s-common-main.dtsi
>> @@ -50,6 +50,7 @@ phy_gmii_sel: phy@4044 {
>> compatible = "ti,am654-phy-gmii-sel";
>> reg = <0x4044 0x8>;
>> #phy-cells = <1>;
>> + bootph-all;
>> };
>>
>> epwm_tbclk: clock-controller@4130 {
>> @@ -730,6 +731,7 @@ cpsw_port1: port@1 {
>> mac-address = [00 00 00 00 00 00];
>> ti,syscon-efuse = <&cpsw_mac_syscon 0x0>;
>> status = "disabled";
>> + bootph-all;
>> };
>>
>> cpsw_port2: port@2 {
>> @@ -751,6 +753,7 @@ cpsw3g_mdio: mdio@f00 {
>> clock-names = "fck";
>> bus_freq = <1000000>;
>> status = "disabled";
>> + bootph-all;
>> };
>>
>> cpts@3d000 {
>> diff --git a/arch/arm64/boot/dts/ti/k3-am62p5-sk.dts b/arch/arm64/boot/dts/ti/k3-am62p5-sk.dts
>> index d29f524600af..5b2f0945a9eb 100644
>> --- a/arch/arm64/boot/dts/ti/k3-am62p5-sk.dts
>> +++ b/arch/arm64/boot/dts/ti/k3-am62p5-sk.dts
>> @@ -227,6 +227,7 @@ main_mdio1_pins_default: main-mdio1-default-pins {
>> AM62PX_IOPAD(0x0160, PIN_OUTPUT, 0) /* (F17) MDIO0_MDC */
>> AM62PX_IOPAD(0x015c, PIN_INPUT, 0) /* (F16) MDIO0_MDIO */
>> >;
>> + bootph-all;
>> };
>>
>> main_mmc1_pins_default: main-mmc1-default-pins {
>> @@ -496,6 +497,7 @@ &cpsw3g_mdio {
>>
>> cpsw3g_phy0: ethernet-phy@0 {
>> reg = <0>;
>> + bootph-all;
>> ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
>> ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
>> ti,min-output-impedance;
>> diff --git a/arch/arm64/boot/dts/ti/k3-j722s-evm.dts b/arch/arm64/boot/dts/ti/k3-j722s-evm.dts
>> index 34b9d190800e..93d770c5792e 100644
>> --- a/arch/arm64/boot/dts/ti/k3-j722s-evm.dts
>> +++ b/arch/arm64/boot/dts/ti/k3-j722s-evm.dts
>> @@ -310,6 +310,7 @@ mdio_pins_default: mdio-default-pins {
>> J722S_IOPAD(0x0160, PIN_OUTPUT, 0) /* (AC24) MDIO0_MDC */
>> J722S_IOPAD(0x015c, PIN_INPUT, 0) /* (AD25) MDIO0_MDIO */
>> >;
>> + bootph-all;
>> };
>>
>> ospi0_pins_default: ospi0-default-pins {
>> @@ -344,6 +345,7 @@ J722S_IOPAD(0x0140, PIN_OUTPUT, 0) /* (AF24) RGMII1_TD3 */
>> J722S_IOPAD(0x0130, PIN_OUTPUT, 0) /* (AG26) RGMII1_TXC */
>> J722S_IOPAD(0x012c, PIN_OUTPUT, 0) /* (AF25) RGMII1_TX_CTL */
>> >;
>> + bootph-all;
>> };
>>
>> main_usb1_pins_default: main-usb1-default-pins {
>> @@ -388,6 +390,7 @@ &cpsw3g_mdio {
>>
>> cpsw3g_phy0: ethernet-phy@0 {
>> reg = <0>;
>> + bootph-all;
>> ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
>> ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
>> ti,min-output-impedance;
>> --
>> 2.34.1
>>
>
On 11:18-20250430, Vankar, Chintan wrote: > Hello Nishanth, > > On 4/29/2025 4:57 PM, Nishanth Menon wrote: > > On 12:56-20250429, Chintan Vankar wrote: > > > Ethernet boot requires CPSW nodes to be present starting from R5 SPL > > > stage. Add bootph-all property to required nodes to enable Ethernet boot > > > for AM62P5-SK and J722S-EVM. > > > > > > Reviewed-by: Roger Quadros <rogerq@kernel.org> > > > Signed-off-by: Chintan Vankar <c-vankar@ti.com> > > > --- > > > > > > Link to v3: > > > https://lore.kernel.org/r/20250425051055.2393301-3-c-vankar@ti.com/ > > > > > > Changes from v3 to v4: > > > - No changes. > > > > > > arch/arm64/boot/dts/ti/k3-am62p-j722s-common-main.dtsi | 3 +++ > > > > Please notice that we have the same problem[1] here as well. > > > > [1] https://lore.kernel.org/all/20250425212427.vvyocc4mmne5g3vq@vividly/ > > I have added "bootph-all" property in the common file of J722S-EVM and > AM62P5-SK since we are enabling Ethernet boot for both the boards. Are > you referring to move the nodes I have added in > "k3-am62p-j722s-common-main.dtsi" to respective board files, > "k3-am62p5-sk.dts" and "k3-j722s-evm.dts". Yes, bootph properties should not be done in SoC dtsi files unless it is mandatory for all boot-modes and all boards. That is not the case here as well. This is the exact comment provided in the previous version for patch 1 with the expectation that you'd apply it to the rest of your series. -- Regards, Nishanth Menon Key (0xDDB5849D1736249D) / Fingerprint: F8A2 8693 54EB 8232 17A3 1A34 DDB5 849D 1736 249D
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