Someone made a typo when they added the RTC to the Sige5 DTS, which
resulted in it using interrupts from GPIO0 B0 instead of GPIO0 A0. The
pinctrl entry for it wasn't typoed though, curiously enough.

The Sige5 v1.1 schematic was used to verify that GPIO0 A0 is the correct
pin for the RTC wakeup interrupt, so let's change it to that.

Fixes: 40f742b07ab2 ("arm64: dts: rockchip: Add rk3576-armsom-sige5 board")
Signed-off-by: Nicolas Frattaroli <nicolas.frattaroli@collabora.com>
---
 arch/arm64/boot/dts/rockchip/rk3576-armsom-sige5.dts | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm64/boot/dts/rockchip/rk3576-armsom-sige5.dts b/arch/arm64/boot/dts/rockchip/rk3576-armsom-sige5.dts
index 964ee351d3b63fcb4ede70f4b6c06541715cfe19..570252c4c0bfe56a3c269e47d81fca7676e61787 100644
--- a/arch/arm64/boot/dts/rockchip/rk3576-armsom-sige5.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3576-armsom-sige5.dts
@@ -616,7 +616,7 @@ hym8563: rtc@51 {
 		reg = <0x51>;
 		clock-output-names = "hym8563";
 		interrupt-parent = <&gpio0>;
-		interrupts = <RK_PB0 IRQ_TYPE_LEVEL_LOW>;
+		interrupts = <RK_PA0 IRQ_TYPE_LEVEL_LOW>;
 		pinctrl-names = "default";
 		pinctrl-0 = <&hym8563_int>;
 		wakeup-source;

---
base-commit: 05c58e5408604391298fccf956f8cd0a4662da73
change-id: 20250429-sige5-rtc-oopsie-d3c5a777e7a8

Best regards,
-- 
Nicolas Frattaroli <nicolas.frattaroli@collabora.com>

On Tue, 29 Apr 2025 18:51:55 +0200, Nicolas Frattaroli wrote:
> Someone made a typo when they added the RTC to the Sige5 DTS, which
> resulted in it using interrupts from GPIO0 B0 instead of GPIO0 A0. The
> pinctrl entry for it wasn't typoed though, curiously enough.
> 
> The Sige5 v1.1 schematic was used to verify that GPIO0 A0 is the correct
> pin for the RTC wakeup interrupt, so let's change it to that.
> 
> [...]

Applied, thanks!

[1/1] arm64: dts: rockchip: fix Sige5 RTC interrupt pin
      commit: 4bf593be2e462623c4c34c7e3b604eb3f8f9de45

Best regards,
-- 
Heiko Stuebner <heiko@sntech.de>