Fix incorrect value mask for register write. Register values are 8-bit,
not 9. If this function was called with a value > 0xFF and an even addr,
it would cause writing to the next register.

Fixes: f2a22e1e172f ("iio: adc: ad7606: Add support for software mode for ad7616")
Signed-off-by: David Lechner <dlechner@baylibre.com>
---
 drivers/iio/adc/ad7606_spi.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/iio/adc/ad7606_spi.c b/drivers/iio/adc/ad7606_spi.c
index bd05357a542cf7234d5bb6b718829d6b720262cd..6c1228c7b1b11058cb5186513f032f7c8c8aa8f4 100644
--- a/drivers/iio/adc/ad7606_spi.c
+++ b/drivers/iio/adc/ad7606_spi.c
@@ -127,7 +127,7 @@ static int ad7606_spi_reg_write(struct ad7606_state *st,
 	struct spi_device *spi = to_spi_device(st->dev);
 
 	st->d16[0] = cpu_to_be16((st->bops->rd_wr_cmd(addr, 1) << 8) |
-				  (val & 0x1FF));
+				  (val & 0xFF));
 
 	return spi_write(spi, &st->d16[0], sizeof(st->d16[0]));
 }

---
base-commit: aa1bd0b0ad048855d9efbee4ee8b9a6eee536256
change-id: 20250428-iio-adc-ad7606_spi-fix-write-value-mask-7acdcca46227

Best regards,
-- 
David Lechner <dlechner@baylibre.com>

On 28.04.2025 20:55, David Lechner wrote:
> Fix incorrect value mask for register write. Register values are 8-bit,
> not 9. If this function was called with a value > 0xFF and an even addr,
> it would cause writing to the next register.
> 
> Fixes: f2a22e1e172f ("iio: adc: ad7606: Add support for software mode for ad7616")
> Signed-off-by: David Lechner <dlechner@baylibre.com>
> ---
>  drivers/iio/adc/ad7606_spi.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/drivers/iio/adc/ad7606_spi.c b/drivers/iio/adc/ad7606_spi.c
> index bd05357a542cf7234d5bb6b718829d6b720262cd..6c1228c7b1b11058cb5186513f032f7c8c8aa8f4 100644
> --- a/drivers/iio/adc/ad7606_spi.c
> +++ b/drivers/iio/adc/ad7606_spi.c
> @@ -127,7 +127,7 @@ static int ad7606_spi_reg_write(struct ad7606_state *st,
>  	struct spi_device *spi = to_spi_device(st->dev);
>  
>  	st->d16[0] = cpu_to_be16((st->bops->rd_wr_cmd(addr, 1) << 8) |
> -				  (val & 0x1FF));
> +				  (val & 0xFF));
>  
>  	return spi_write(spi, &st->d16[0], sizeof(st->d16[0]));
>  }
> 
> ---
> base-commit: aa1bd0b0ad048855d9efbee4ee8b9a6eee536256
> change-id: 20250428-iio-adc-ad7606_spi-fix-write-value-mask-7acdcca46227

Reviewed-by: Angelo Dureghello <adureghello@baylibre.com>

> 
> Best regards,
> -- 
> David Lechner <dlechner@baylibre.com>
>

On Tue, 29 Apr 2025 10:34:14 +0200
Angelo Dureghello <adureghello@baylibre.com> wrote:

> On 28.04.2025 20:55, David Lechner wrote:
> > Fix incorrect value mask for register write. Register values are 8-bit,
> > not 9. If this function was called with a value > 0xFF and an even addr,
> > it would cause writing to the next register.
> > 
> > Fixes: f2a22e1e172f ("iio: adc: ad7606: Add support for software mode for ad7616")
> > Signed-off-by: David Lechner <dlechner@baylibre.com>
Applied and marked for stable.
> > ---
> >  drivers/iio/adc/ad7606_spi.c | 2 +-
> >  1 file changed, 1 insertion(+), 1 deletion(-)
> > 
> > diff --git a/drivers/iio/adc/ad7606_spi.c b/drivers/iio/adc/ad7606_spi.c
> > index bd05357a542cf7234d5bb6b718829d6b720262cd..6c1228c7b1b11058cb5186513f032f7c8c8aa8f4 100644
> > --- a/drivers/iio/adc/ad7606_spi.c
> > +++ b/drivers/iio/adc/ad7606_spi.c
> > @@ -127,7 +127,7 @@ static int ad7606_spi_reg_write(struct ad7606_state *st,
> >  	struct spi_device *spi = to_spi_device(st->dev);
> >  
> >  	st->d16[0] = cpu_to_be16((st->bops->rd_wr_cmd(addr, 1) << 8) |
> > -				  (val & 0x1FF));
> > +				  (val & 0xFF));
> >  
> >  	return spi_write(spi, &st->d16[0], sizeof(st->d16[0]));
> >  }
> > 
> > ---
> > base-commit: aa1bd0b0ad048855d9efbee4ee8b9a6eee536256
> > change-id: 20250428-iio-adc-ad7606_spi-fix-write-value-mask-7acdcca46227  
> 
> Reviewed-by: Angelo Dureghello <adureghello@baylibre.com>
> 
> > 
> > Best regards,
> > -- 
> > David Lechner <dlechner@baylibre.com>
> >   
>