1. Patchew
  2. linux
  3. [PATCH v3 0/3] riscv: sophgo: add mailbox support for CV18XX series SoC
  4. View patch

[PATCH v3 2/3] riscv: dts: add mailbox for Sophgo CV18XX series SoC

Junhui Liu posted 3 patches 9 months, 2 weeks ago
There is a newer version of this series
[PATCH v3 2/3] riscv: dts: add mailbox for Sophgo CV18XX series SoC
Posted by Junhui Liu 9 months, 2 weeks ago 
From: Yuntao Dai <d1581209858@live.com>

Add mailbox node for Sophgo CV18XX series SoC.

Signed-off-by: Yuntao Dai <d1581209858@live.com>
Signed-off-by: Junhui Liu <junhui.liu@pigmoral.tech>
---
 arch/riscv/boot/dts/sophgo/cv18xx.dtsi | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/arch/riscv/boot/dts/sophgo/cv18xx.dtsi b/arch/riscv/boot/dts/sophgo/cv18xx.dtsi
index c18822ec849f353bc296965d2d600a3df314cff6..f7277288f03c024039054bdc4176fc95c2c8be52 100644
--- a/arch/riscv/boot/dts/sophgo/cv18xx.dtsi
+++ b/arch/riscv/boot/dts/sophgo/cv18xx.dtsi
@@ -55,6 +55,13 @@ soc {
 		dma-noncoherent;
 		ranges;
 
+		mailbox: mailbox@1900000 {
+			compatible = "sophgo,cv1800b-mailbox";
+			reg = <0x01900000 0x1000>;
+			interrupts = <101 IRQ_TYPE_LEVEL_HIGH>;
+			#mbox-cells = <2>;
+		};
+
 		clk: clock-controller@3002000 {
 			reg = <0x03002000 0x1000>;
 			clocks = <&osc>;

-- 
2.49.0
Re: [PATCH v3 2/3] riscv: dts: add mailbox for Sophgo CV18XX series SoC
Posted by Conor Dooley 9 months, 2 weeks ago 
On Mon, Apr 28, 2025 at 08:39:45PM +0800, Junhui Liu wrote:
> From: Yuntao Dai <d1581209858@live.com>
> 
> Add mailbox node for Sophgo CV18XX series SoC.
> 
> Signed-off-by: Yuntao Dai <d1581209858@live.com>
> Signed-off-by: Junhui Liu <junhui.liu@pigmoral.tech>
> ---
>  arch/riscv/boot/dts/sophgo/cv18xx.dtsi | 7 +++++++
>  1 file changed, 7 insertions(+)
> 
> diff --git a/arch/riscv/boot/dts/sophgo/cv18xx.dtsi b/arch/riscv/boot/dts/sophgo/cv18xx.dtsi
> index c18822ec849f353bc296965d2d600a3df314cff6..f7277288f03c024039054bdc4176fc95c2c8be52 100644
> --- a/arch/riscv/boot/dts/sophgo/cv18xx.dtsi
> +++ b/arch/riscv/boot/dts/sophgo/cv18xx.dtsi
> @@ -55,6 +55,13 @@ soc {
>  		dma-noncoherent;
>  		ranges;
>  
> +		mailbox: mailbox@1900000 {
> +			compatible = "sophgo,cv1800b-mailbox";
> +			reg = <0x01900000 0x1000>;
> +			interrupts = <101 IRQ_TYPE_LEVEL_HIGH>;
> +			#mbox-cells = <2>;
> +		};

No user added here, is there another series in the works that adds a
user of the mailbox?

> +
>  		clk: clock-controller@3002000 {
>  			reg = <0x03002000 0x1000>;
>  			clocks = <&osc>;
> 
> -- 
> 2.49.0
>
Re: [PATCH v3 2/3] riscv: dts: add mailbox for Sophgo CV18XX series SoC
Posted by Junhui Liu 9 months, 2 weeks ago 
Hi Conor,
Thanks for you review.

The previous email accidentally lost some Cc lists :(, I'm sorry to
harass you.

On 28/04/2025 17:55, Conor Dooley wrote:
> On Mon, Apr 28, 2025 at 08:39:45PM +0800, Junhui Liu wrote:
>> From: Yuntao Dai <d1581209858@live.com>
>> 
>> Add mailbox node for Sophgo CV18XX series SoC.
>> 
>> Signed-off-by: Yuntao Dai <d1581209858@live.com>
>> Signed-off-by: Junhui Liu <junhui.liu@pigmoral.tech>
>> ---
>>  arch/riscv/boot/dts/sophgo/cv18xx.dtsi | 7 +++++++
>>  1 file changed, 7 insertions(+)
>> 
>> diff --git a/arch/riscv/boot/dts/sophgo/cv18xx.dtsi b/arch/riscv/boot/dts/sophgo/cv18xx.dtsi
>> index c18822ec849f353bc296965d2d600a3df314cff6..f7277288f03c024039054bdc4176fc95c2c8be52 100644
>> --- a/arch/riscv/boot/dts/sophgo/cv18xx.dtsi
>> +++ b/arch/riscv/boot/dts/sophgo/cv18xx.dtsi
>> @@ -55,6 +55,13 @@ soc {
>>  		dma-noncoherent;
>>  		ranges;
>>  
>> +		mailbox: mailbox@1900000 {
>> +			compatible = "sophgo,cv1800b-mailbox";
>> +			reg = <0x01900000 0x1000>;
>> +			interrupts = <101 IRQ_TYPE_LEVEL_HIGH>;
>> +			#mbox-cells = <2>;
>> +		};
> 
> No user added here, is there another series in the works that adds a
> user of the mailbox?
> 

There isn't an actual user node in this specific patch. I used a
`mailbox-test` node to verify the functionality in this patch series.

The intended user for this mailbox is the `remoteproc` node. I plan to
submit the `remoteproc` driver patches once the corresponding reset
driver [1] is ready and merged.

link: https://lore.kernel.org/linux-riscv/20250209122936.2338821-1-inochiama@gmail.com/ [1]

>> +
>>  		clk: clock-controller@3002000 {
>>  			reg = <0x03002000 0x1000>;
>>  			clocks = <&osc>;
>> 
>>

-- 
Best regards,
Junhui Liu
Re: [PATCH v3 2/3] riscv: dts: add mailbox for Sophgo CV18XX series SoC
Posted by Inochi Amaoto 9 months, 1 week ago 
On Tue, Apr 29, 2025 at 02:44:10AM +0000, Junhui Liu wrote:
> Hi Conor,
> Thanks for you review.
> 
> The previous email accidentally lost some Cc lists :(, I'm sorry to
> harass you.
> 
> On 28/04/2025 17:55, Conor Dooley wrote:
> > On Mon, Apr 28, 2025 at 08:39:45PM +0800, Junhui Liu wrote:
> >> From: Yuntao Dai <d1581209858@live.com>
> >> 
> >> Add mailbox node for Sophgo CV18XX series SoC.
> >> 
> >> Signed-off-by: Yuntao Dai <d1581209858@live.com>
> >> Signed-off-by: Junhui Liu <junhui.liu@pigmoral.tech>
> >> ---
> >>  arch/riscv/boot/dts/sophgo/cv18xx.dtsi | 7 +++++++
> >>  1 file changed, 7 insertions(+)
> >> 
> >> diff --git a/arch/riscv/boot/dts/sophgo/cv18xx.dtsi b/arch/riscv/boot/dts/sophgo/cv18xx.dtsi
> >> index c18822ec849f353bc296965d2d600a3df314cff6..f7277288f03c024039054bdc4176fc95c2c8be52 100644
> >> --- a/arch/riscv/boot/dts/sophgo/cv18xx.dtsi
> >> +++ b/arch/riscv/boot/dts/sophgo/cv18xx.dtsi
> >> @@ -55,6 +55,13 @@ soc {
> >>  		dma-noncoherent;
> >>  		ranges;
> >>  
> >> +		mailbox: mailbox@1900000 {
> >> +			compatible = "sophgo,cv1800b-mailbox";
> >> +			reg = <0x01900000 0x1000>;
> >> +			interrupts = <101 IRQ_TYPE_LEVEL_HIGH>;
> >> +			#mbox-cells = <2>;
> >> +		};
> > 
> > No user added here, is there another series in the works that adds a
> > user of the mailbox?
> > 
> 
> There isn't an actual user node in this specific patch. I used a
> `mailbox-test` node to verify the functionality in this patch series.
> 

I am happy to see the way you test it. Can you add it to the cover?

> The intended user for this mailbox is the `remoteproc` node. I plan to
> submit the `remoteproc` driver patches once the corresponding reset
> driver [1] is ready and merged.
> 
> link: https://lore.kernel.org/linux-riscv/20250209122936.2338821-1-inochiama@gmail.com/ [1]
> 

I will submit a version for this in the next rc1. I think you can submit
you remoteproc patch in RFC to get it reviewed.

Regards,
Inochi
Re: [PATCH v3 2/3] riscv: dts: add mailbox for Sophgo CV18XX series SoC
Posted by Junhui Liu 9 months, 1 week ago 
Hi Inochi,

On 07/05/2025 20:12, Inochi Amaoto wrote:
> On Tue, Apr 29, 2025 at 02:44:10AM +0000, Junhui Liu wrote:
>> Hi Conor,
>> Thanks for you review.
>> 
>> The previous email accidentally lost some Cc lists :(, I'm sorry to
>> harass you.
>> 
>> On 28/04/2025 17:55, Conor Dooley wrote:
>> > On Mon, Apr 28, 2025 at 08:39:45PM +0800, Junhui Liu wrote:
>> >> From: Yuntao Dai <d1581209858@live.com>
>> >> 
>> >> Add mailbox node for Sophgo CV18XX series SoC.
>> >> 
>> >> Signed-off-by: Yuntao Dai <d1581209858@live.com>
>> >> Signed-off-by: Junhui Liu <junhui.liu@pigmoral.tech>
>> >> ---
>> >>  arch/riscv/boot/dts/sophgo/cv18xx.dtsi | 7 +++++++
>> >>  1 file changed, 7 insertions(+)
>> >> 
>> >> diff --git a/arch/riscv/boot/dts/sophgo/cv18xx.dtsi b/arch/riscv/boot/dts/sophgo/cv18xx.dtsi
>> >> index c18822ec849f353bc296965d2d600a3df314cff6..f7277288f03c024039054bdc4176fc95c2c8be52 100644
>> >> --- a/arch/riscv/boot/dts/sophgo/cv18xx.dtsi
>> >> +++ b/arch/riscv/boot/dts/sophgo/cv18xx.dtsi
>> >> @@ -55,6 +55,13 @@ soc {
>> >>  		dma-noncoherent;
>> >>  		ranges;
>> >>  
>> >> +		mailbox: mailbox@1900000 {
>> >> +			compatible = "sophgo,cv1800b-mailbox";
>> >> +			reg = <0x01900000 0x1000>;
>> >> +			interrupts = <101 IRQ_TYPE_LEVEL_HIGH>;
>> >> +			#mbox-cells = <2>;
>> >> +		};
>> > 
>> > No user added here, is there another series in the works that adds a
>> > user of the mailbox?
>> > 
>> 
>> There isn't an actual user node in this specific patch. I used a
>> `mailbox-test` node to verify the functionality in this patch series.
>> 
> 
> I am happy to see the way you test it. Can you add it to the cover?

Sure, I will post the testing process to the cover letter in the next
version.

> 
>> The intended user for this mailbox is the `remoteproc` node. I plan to
>> submit the `remoteproc` driver patches once the corresponding reset
>> driver [1] is ready and merged.
>> 
>> link: https://lore.kernel.org/linux-riscv/20250209122936.2338821-1-inochiama@gmail.com/ [1]
>> 
> 
> I will submit a version for this in the next rc1. I think you can submit
> you remoteproc patch in RFC to get it reviewed.

ok, thanks.

> 
> Regards,
> Inochi

-- 
Best regards,
Junhui Liu

Patchew 2.1-devel-b67e4c2

© 2016 - 2026 Red Hat, Inc.