[v3] Add support for AD4080 ADC

[PATCH v3 09/11] iio: adc: adi-axi-adc: add num lanes support

Posted by Antoniu Miclaus 9 months, 2 weeks ago

Add support for setting the number of lanes enabled.

Signed-off-by: Antoniu Miclaus <antoniu.miclaus@analog.com>
---
no changes in v3.
 drivers/iio/adc/adi-axi-adc.c | 16 ++++++++++++++++
 1 file changed, 16 insertions(+)

diff --git a/drivers/iio/adc/adi-axi-adc.c b/drivers/iio/adc/adi-axi-adc.c
index bf0155830d87..8ff781ab5ec3 100644
--- a/drivers/iio/adc/adi-axi-adc.c
+++ b/drivers/iio/adc/adi-axi-adc.c
@@ -44,6 +44,7 @@
 #define   ADI_AXI_ADC_REG_CONFIG_CMOS_OR_LVDS_N	BIT(7)
 
 #define ADI_AXI_ADC_REG_CTRL			0x0044
+#define    AXI_AD408X_CTRL_NUM_LANES_MSK	GENMASK(12, 8)
 #define    AXI_AD408X_CTRL_SYNC_MSK		BIT(3)
 #define    ADI_AXI_ADC_CTRL_DDR_EDGESEL_MASK	BIT(1)
 
@@ -451,6 +452,19 @@ static int axi_adc_sync_status_get(struct iio_backend *back, bool *sync_en)
 	return 0;
 }
 
+static int axi_adc_num_lanes_set(struct iio_backend *back,
+				 unsigned int num_lanes)
+{
+	struct adi_axi_adc_state *st = iio_backend_get_priv(back);
+
+	if (!num_lanes)
+		return -EINVAL;
+
+	return regmap_update_bits(st->regmap, ADI_AXI_ADC_REG_CTRL,
+				  AXI_AD408X_CTRL_NUM_LANES_MSK,
+				  FIELD_PREP(AXI_AD408X_CTRL_NUM_LANES_MSK, num_lanes));
+}
+
 static struct iio_buffer *axi_adc_request_buffer(struct iio_backend *back,
 						 struct iio_dev *indio_dev)
 {
@@ -601,6 +615,7 @@ static const struct iio_backend_ops adi_axi_adc_ops = {
 	.chan_status = axi_adc_chan_status,
 	.interface_type_get = axi_adc_interface_type_get,
 	.sync_status_get = axi_adc_sync_status_get,
+	.num_lanes_set = axi_adc_num_lanes_set,
 	.debugfs_reg_access = iio_backend_debugfs_ptr(axi_adc_reg_access),
 	.debugfs_print_chan_status = iio_backend_debugfs_ptr(axi_adc_debugfs_print_chan_status),
 };
@@ -646,6 +661,7 @@ static const struct iio_backend_ops adi_ad408x_ops = {
 	.data_alignment_enable = axi_adc_sync_enable,
 	.data_alignment_disable = axi_adc_sync_disable,
 	.sync_status_get = axi_adc_sync_status_get,
+	.num_lanes_set = axi_adc_num_lanes_set,
 	.debugfs_reg_access = iio_backend_debugfs_ptr(axi_adc_reg_access),
 	.debugfs_print_chan_status = iio_backend_debugfs_ptr(axi_adc_debugfs_print_chan_status),
 };
-- 
2.49.0

Re: [PATCH v3 09/11] iio: adc: adi-axi-adc: add num lanes support

Posted by David Lechner 9 months, 2 weeks ago

On 4/25/25 6:25 AM, Antoniu Miclaus wrote:
> Add support for setting the number of lanes enabled.
> 
> Signed-off-by: Antoniu Miclaus <antoniu.miclaus@analog.com>
> ---
> no changes in v3.
>  drivers/iio/adc/adi-axi-adc.c | 16 ++++++++++++++++
>  1 file changed, 16 insertions(+)
> 
> diff --git a/drivers/iio/adc/adi-axi-adc.c b/drivers/iio/adc/adi-axi-adc.c
> index bf0155830d87..8ff781ab5ec3 100644
> --- a/drivers/iio/adc/adi-axi-adc.c
> +++ b/drivers/iio/adc/adi-axi-adc.c
> @@ -44,6 +44,7 @@
>  #define   ADI_AXI_ADC_REG_CONFIG_CMOS_OR_LVDS_N	BIT(7)
>  
>  #define ADI_AXI_ADC_REG_CTRL			0x0044
> +#define    AXI_AD408X_CTRL_NUM_LANES_MSK	GENMASK(12, 8)

Same comment applies here. It looks like this is common to all cores, so no
AD408X in the name please.

>  #define    AXI_AD408X_CTRL_SYNC_MSK		BIT(3)
>  #define    ADI_AXI_ADC_CTRL_DDR_EDGESEL_MASK	BIT(1)
>  
> @@ -451,6 +452,19 @@ static int axi_adc_sync_status_get(struct iio_backend *back, bool *sync_en)
>  	return 0;
>  }

Re: [PATCH v3 09/11] iio: adc: adi-axi-adc: add num lanes support

Posted by Nuno Sá 9 months, 2 weeks ago

On Fri, 2025-04-25 at 14:25 +0300, Antoniu Miclaus wrote:
> Add support for setting the number of lanes enabled.
> 
> Signed-off-by: Antoniu Miclaus <antoniu.miclaus@analog.com>
> ---

Just one small comment below... With that addressed:

Reviewed-by: Nuno Sá <nuno.sa@analog.com>

> no changes in v3.
>  drivers/iio/adc/adi-axi-adc.c | 16 ++++++++++++++++
>  1 file changed, 16 insertions(+)
> 
> diff --git a/drivers/iio/adc/adi-axi-adc.c b/drivers/iio/adc/adi-axi-adc.c
> index bf0155830d87..8ff781ab5ec3 100644
> --- a/drivers/iio/adc/adi-axi-adc.c
> +++ b/drivers/iio/adc/adi-axi-adc.c
> @@ -44,6 +44,7 @@
>  #define   ADI_AXI_ADC_REG_CONFIG_CMOS_OR_LVDS_N	BIT(7)
>  
>  #define ADI_AXI_ADC_REG_CTRL			0x0044
> +#define    AXI_AD408X_CTRL_NUM_LANES_MSK	GENMASK(12, 8)
>  #define    AXI_AD408X_CTRL_SYNC_MSK		BIT(3)
>  #define    ADI_AXI_ADC_CTRL_DDR_EDGESEL_MASK	BIT(1)
>  
> @@ -451,6 +452,19 @@ static int axi_adc_sync_status_get(struct iio_backend
> *back, bool *sync_en)
>  	return 0;
>  }
>  
> +static int axi_adc_num_lanes_set(struct iio_backend *back,
> +				 unsigned int num_lanes)
> +{
> +	struct adi_axi_adc_state *st = iio_backend_get_priv(back);
> +
> +	if (!num_lanes)
> +		return -EINVAL;
> +
> +	return regmap_update_bits(st->regmap, ADI_AXI_ADC_REG_CTRL,
> +				  AXI_AD408X_CTRL_NUM_LANES_MSK,
> +				  FIELD_PREP(AXI_AD408X_CTRL_NUM_LANES_MSK,
> num_lanes));
> +}
> +
>  static struct iio_buffer *axi_adc_request_buffer(struct iio_backend *back,
>  						 struct iio_dev *indio_dev)
>  {
> @@ -601,6 +615,7 @@ static const struct iio_backend_ops adi_axi_adc_ops = {
>  	.chan_status = axi_adc_chan_status,
>  	.interface_type_get = axi_adc_interface_type_get,
>  	.sync_status_get = axi_adc_sync_status_get,
> +	.num_lanes_set = axi_adc_num_lanes_set,

Not sure if we should set this. Although it might be in the regular/default
register map, I suppose that this not a generic feature all axi-adc backends
inherit from the base design... So, if wrongly used, I guess it would result in
a no-op on the backend side.

>  	.debugfs_reg_access = iio_backend_debugfs_ptr(axi_adc_reg_access),
>  	.debugfs_print_chan_status =
> iio_backend_debugfs_ptr(axi_adc_debugfs_print_chan_status),
>  };
> @@ -646,6 +661,7 @@ static const struct iio_backend_ops adi_ad408x_ops = {
>  	.data_alignment_enable = axi_adc_sync_enable,
>  	.data_alignment_disable = axi_adc_sync_disable,
>  	.sync_status_get = axi_adc_sync_status_get,
> +	.num_lanes_set = axi_adc_num_lanes_set,
>  	.debugfs_reg_access = iio_backend_debugfs_ptr(axi_adc_reg_access),
>  	.debugfs_print_chan_status =
> iio_backend_debugfs_ptr(axi_adc_debugfs_print_chan_status),
>  };