From: Mario Limonciello <mario.limonciello@amd.com>

Introduce documentation for debugging some issues on AMD zen hardware.
As one of the debugging techniques read and add information for
S5_RESET_STATUS register.

Mario Limonciello (4):
  Documentation: Add AMD Zen debugging document
  i2c: piix4: Depends on X86
  i2c: piix4: Move SB800_PIIX4_FCH_PM_ADDR definition to amd/fch.h
  platform/x86/amd: pmc: use FCH_PM_BASE definition

Yazen Ghannam (1):
  x86/CPU/AMD: Print the reason for the last reset

 Documentation/arch/x86/amd-debugging.rst  | 362 ++++++++++++++++++++++
 Documentation/arch/x86/index.rst          |   1 +
 Documentation/arch/x86/resume.svg         |   4 +
 Documentation/arch/x86/suspend.svg        |   4 +
 arch/x86/include/asm/amd/fch.h            |  14 +
 arch/x86/kernel/cpu/amd.c                 |  64 ++++
 drivers/i2c/busses/Kconfig                |   2 +-
 drivers/i2c/busses/i2c-piix4.c            |  18 +-
 drivers/platform/x86/amd/pmc/pmc-quirks.c |   3 +-
 9 files changed, 461 insertions(+), 11 deletions(-)
 create mode 100644 Documentation/arch/x86/amd-debugging.rst
 create mode 100644 Documentation/arch/x86/resume.svg
 create mode 100644 Documentation/arch/x86/suspend.svg
 create mode 100644 arch/x86/include/asm/amd/fch.h

-- 
2.43.0

Mario Limonciello <superm1@kernel.org> writes:

> From: Mario Limonciello <mario.limonciello@amd.com>
>
> Introduce documentation for debugging some issues on AMD zen hardware.
> As one of the debugging techniques read and add information for
> S5_RESET_STATUS register.

I've been assuming that this work will go through the x86 tree; please
let me know if you'd like me to pick it up instead.

Thanks,

jon

On 4/23/2025 10:02 AM, Jonathan Corbet wrote:
> Mario Limonciello <superm1@kernel.org> writes:
> 
>> From: Mario Limonciello <mario.limonciello@amd.com>
>>
>> Introduce documentation for debugging some issues on AMD zen hardware.
>> As one of the debugging techniques read and add information for
>> S5_RESET_STATUS register.
> 
> I've been assuming that this work will go through the x86 tree; please
> let me know if you'd like me to pick it up instead.
> 
> Thanks,
> 
> jon

I think that's probably easier, patch 5 needs patch 1.

Can you drop a tag for patch 1 and patch 5 (from doc perspective) so 
that Ingo can pull them through?

* Mario Limonciello <superm1@kernel.org> wrote:

> From: Mario Limonciello <mario.limonciello@amd.com>
> 
> Introduce documentation for debugging some issues on AMD zen hardware.
> As one of the debugging techniques read and add information for
> S5_RESET_STATUS register.
> 
> Mario Limonciello (4):
>   Documentation: Add AMD Zen debugging document
>   i2c: piix4: Depends on X86
>   i2c: piix4: Move SB800_PIIX4_FCH_PM_ADDR definition to amd/fch.h
>   platform/x86/amd: pmc: use FCH_PM_BASE definition
> 
> Yazen Ghannam (1):
>   x86/CPU/AMD: Print the reason for the last reset

So it looks like there's no new objections/feedback, and to
get the ball rolling, I've applied these 3 preparatory patches
to tip:x86/platform, to get them tested more widely:

   i2c: piix4: Make CONFIG_I2C_PIIX4 dependent on CONFIG_X86
   i2c: piix4, x86/platform: Move the SB800 PIIX4 FCH definitions to <asm/amd/fch.h>
   platform/x86/amd/pmc: Use FCH_PM_BASE definition

Thanks,

	Ingo