From: Carlos Song <carlos.song@nxp.com>
I.MX95 I3C only need two clocks. Add "nxp,imx95-i3c" compatible string for
all I3Cs. And correct I3C2 pclk in wakeup domain to IMX95_CLK_BUSWAKEUP.
Signed-off-by: Carlos Song <carlos.song@nxp.com>
---
- No change for V2
---
arch/arm64/boot/dts/freescale/imx95.dtsi | 12 +++++-------
1 file changed, 5 insertions(+), 7 deletions(-)
diff --git a/arch/arm64/boot/dts/freescale/imx95.dtsi b/arch/arm64/boot/dts/freescale/imx95.dtsi
index 9bb26b466a06..fe28c0c46eb6 100644
--- a/arch/arm64/boot/dts/freescale/imx95.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx95.dtsi
@@ -681,15 +681,14 @@ tpm6: pwm@42510000 {
};
i3c2: i3c@42520000 {
- compatible = "silvaco,i3c-master-v1";
+ compatible = "nxp,imx95-i3c", "silvaco,i3c-master-v1";
reg = <0x42520000 0x10000>;
interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <3>;
#size-cells = <0>;
- clocks = <&scmi_clk IMX95_CLK_BUSAON>,
- <&scmi_clk IMX95_CLK_I3C2>,
+ clocks = <&scmi_clk IMX95_CLK_BUSWAKEUP>,
<&scmi_clk IMX95_CLK_I3C2SLOW>;
- clock-names = "pclk", "fast_clk", "slow_clk";
+ clock-names = "pclk", "fast_clk";
status = "disabled";
};
@@ -1266,15 +1265,14 @@ tpm2: pwm@44320000 {
};
i3c1: i3c@44330000 {
- compatible = "silvaco,i3c-master-v1";
+ compatible = "nxp,imx95-i3c", "silvaco,i3c-master-v1";
reg = <0x44330000 0x10000>;
interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <3>;
#size-cells = <0>;
clocks = <&scmi_clk IMX95_CLK_BUSAON>,
- <&scmi_clk IMX95_CLK_I3C1>,
<&scmi_clk IMX95_CLK_I3C1SLOW>;
- clock-names = "pclk", "fast_clk", "slow_clk";
+ clock-names = "pclk", "fast_clk";
status = "disabled";
};
--
2.34.1
On Mon, Apr 21, 2025 at 07:15:13PM +0800, carlos.song@nxp.com wrote:
> From: Carlos Song <carlos.song@nxp.com>
>
> I.MX95 I3C only need two clocks. Add "nxp,imx95-i3c" compatible string for
> all I3Cs. And correct I3C2 pclk in wakeup domain to IMX95_CLK_BUSWAKEUP.
correct pclk in wakeup domain to IMX95_CLK_BUSWAKEUP need sepeate patch
with fix tag and cc stable
Frank
>
> Signed-off-by: Carlos Song <carlos.song@nxp.com>
> ---
> - No change for V2
> ---
> arch/arm64/boot/dts/freescale/imx95.dtsi | 12 +++++-------
> 1 file changed, 5 insertions(+), 7 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/freescale/imx95.dtsi b/arch/arm64/boot/dts/freescale/imx95.dtsi
> index 9bb26b466a06..fe28c0c46eb6 100644
> --- a/arch/arm64/boot/dts/freescale/imx95.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx95.dtsi
> @@ -681,15 +681,14 @@ tpm6: pwm@42510000 {
> };
>
> i3c2: i3c@42520000 {
> - compatible = "silvaco,i3c-master-v1";
> + compatible = "nxp,imx95-i3c", "silvaco,i3c-master-v1";
> reg = <0x42520000 0x10000>;
> interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>;
> #address-cells = <3>;
> #size-cells = <0>;
> - clocks = <&scmi_clk IMX95_CLK_BUSAON>,
> - <&scmi_clk IMX95_CLK_I3C2>,
> + clocks = <&scmi_clk IMX95_CLK_BUSWAKEUP>,
> <&scmi_clk IMX95_CLK_I3C2SLOW>;
> - clock-names = "pclk", "fast_clk", "slow_clk";
> + clock-names = "pclk", "fast_clk";
> status = "disabled";
> };
>
> @@ -1266,15 +1265,14 @@ tpm2: pwm@44320000 {
> };
>
> i3c1: i3c@44330000 {
> - compatible = "silvaco,i3c-master-v1";
> + compatible = "nxp,imx95-i3c", "silvaco,i3c-master-v1";
> reg = <0x44330000 0x10000>;
> interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
> #address-cells = <3>;
> #size-cells = <0>;
> clocks = <&scmi_clk IMX95_CLK_BUSAON>,
> - <&scmi_clk IMX95_CLK_I3C1>,
> <&scmi_clk IMX95_CLK_I3C1SLOW>;
> - clock-names = "pclk", "fast_clk", "slow_clk";
> + clock-names = "pclk", "fast_clk";
> status = "disabled";
> };
>
> --
> 2.34.1
>
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