[v1] add CPUCL0 clock support for exynosauto v920 SoC

[PATCH 3/3] arm64: dts: exynosautov920: add cpucl0 clock DT nodes

Posted by Shin Son 8 months ago

Add cmu_cpucl0 clocks for switch, cluster, and dbg domains respectively.

Signed-off-by: Shin Son <shin.son@samsung.com>
---
 arch/arm64/boot/dts/exynos/exynosautov920.dtsi | 15 +++++++++++++++
 1 file changed, 15 insertions(+)

diff --git a/arch/arm64/boot/dts/exynos/exynosautov920.dtsi b/arch/arm64/boot/dts/exynos/exynosautov920.dtsi
index fc6ac531d597..d1528633adfe 100644
--- a/arch/arm64/boot/dts/exynos/exynosautov920.dtsi
+++ b/arch/arm64/boot/dts/exynos/exynosautov920.dtsi
@@ -582,6 +582,21 @@ pinctrl_aud: pinctrl@1a460000 {
 			compatible = "samsung,exynosautov920-pinctrl";
 			reg = <0x1a460000 0x10000>;
 		};
+
+		cmu_cpucl0: clock-controller@1ec00000 {
+			compatible = "samsung,exynosautov920-cmu-cpucl0";
+			reg = <0x1EC00000 0x8000>;
+			#clock-cells = <1>;
+
+			clocks = <&xtcxo>,
+				<&cmu_top DOUT_CLKCMU_CPUCL0_SWITCH>,
+				<&cmu_top DOUT_CLKCMU_CPUCL0_CLUSTER>,
+				<&cmu_top DOUT_CLKCMU_CPUCL0_DBG>;
+			clock-names = "oscclk",
+				      "switch",
+				      "cluster",
+				      "dbg";
+		};
 	};
 
 	timer {
-- 
2.49.0

Re: [PATCH 3/3] arm64: dts: exynosautov920: add cpucl0 clock DT nodes

Posted by Krzysztof Kozlowski 7 months, 3 weeks ago

On 18/04/2025 08:15, Shin Son wrote:
> Add cmu_cpucl0 clocks for switch, cluster, and dbg domains respectively.
> 
> Signed-off-by: Shin Son <shin.son@samsung.com>
> ---
>  arch/arm64/boot/dts/exynos/exynosautov920.dtsi | 15 +++++++++++++++
>  1 file changed, 15 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/exynos/exynosautov920.dtsi b/arch/arm64/boot/dts/exynos/exynosautov920.dtsi
> index fc6ac531d597..d1528633adfe 100644
> --- a/arch/arm64/boot/dts/exynos/exynosautov920.dtsi
> +++ b/arch/arm64/boot/dts/exynos/exynosautov920.dtsi
> @@ -582,6 +582,21 @@ pinctrl_aud: pinctrl@1a460000 {
>  			compatible = "samsung,exynosautov920-pinctrl";
>  			reg = <0x1a460000 0x10000>;
>  		};
> +
> +		cmu_cpucl0: clock-controller@1ec00000 {
> +			compatible = "samsung,exynosautov920-cmu-cpucl0";
> +			reg = <0x1EC00000 0x8000>;

Lowercase hex.
> +			#clock-cells = <1>;
> +
> +			clocks = <&xtcxo>,
> +				<&cmu_top DOUT_CLKCMU_CPUCL0_SWITCH>,

This looks misaligned.


Best regards,
Krzysztof

RE: [PATCH 3/3] arm64: dts: exynosautov920: add cpucl0 clock DT nodes

Posted by 손신 7 months, 3 weeks ago

Hello Krzysztof Kozlowski,

> -----Original Message-----
> From: Krzysztof Kozlowski [mailto:krzk@kernel.org]
> Sent: Tuesday, April 22, 2025 5:00 PM
> To: Shin Son <shin.son@samsung.com>; Sylwester Nawrocki
> <s.nawrocki@samsung.com>; Chanwoo Choi <cw00.choi@samsung.com>; Alim
> Akhtar <alim.akhtar@samsung.com>; Michael Turquette
> <mturquette@baylibre.com>; Stephen Boyd <sboyd@kernel.org>; Rob Herring
> <robh@kernel.org>; Conor Dooley <conor+dt@kernel.org>; Sunyeal Hong
> <sunyeal.hong@samsung.com>
> Cc: linux-samsung-soc@vger.kernel.org; linux-clk@vger.kernel.org;
> devicetree@vger.kernel.org; linux-arm-kernel@lists.infradead.org; linux-
> kernel@vger.kernel.org
> Subject: Re: [PATCH 3/3] arm64: dts: exynosautov920: add cpucl0 clock DT
> nodes
> 
> On 18/04/2025 08:15, Shin Son wrote:
> > Add cmu_cpucl0 clocks for switch, cluster, and dbg domains respectively.
> >
> > Signed-off-by: Shin Son <shin.son@samsung.com>
> > ---
> >  arch/arm64/boot/dts/exynos/exynosautov920.dtsi | 15 +++++++++++++++
> >  1 file changed, 15 insertions(+)
> >
> > diff --git a/arch/arm64/boot/dts/exynos/exynosautov920.dtsi
> b/arch/arm64/boot/dts/exynos/exynosautov920.dtsi
> > index fc6ac531d597..d1528633adfe 100644
> > --- a/arch/arm64/boot/dts/exynos/exynosautov920.dtsi
> > +++ b/arch/arm64/boot/dts/exynos/exynosautov920.dtsi
> > @@ -582,6 +582,21 @@ pinctrl_aud: pinctrl@1a460000 {
> >  			compatible = "samsung,exynosautov920-pinctrl";
> >  			reg = <0x1a460000 0x10000>;
> >  		};
> > +
> > +		cmu_cpucl0: clock-controller@1ec00000 {
> > +			compatible = "samsung,exynosautov920-cmu-cpucl0";
> > +			reg = <0x1EC00000 0x8000>;
> 
> Lowercase hex.
> > +			#clock-cells = <1>;
> > +
> > +			clocks = <&xtcxo>,
> > +				<&cmu_top DOUT_CLKCMU_CPUCL0_SWITCH>,
> 
> This looks misaligned.
> 
> 
> Best regards,
> Krzysztof

Thanks for the quick response.
I'll revise everything you pointed out and send an  updated patch shortly.

Best regards,
Shin Son