Add DT bindings for Microchip Azurite DPLL chip family. These chips
provides up to 5 independent DPLL channels, 10 differential or
single-ended inputs and 10 differential or 20 single-ended outputs.
It can be connected via I2C or SPI busses.
Signed-off-by: Ivan Vecera <ivecera@redhat.com>
---
v1->v3:
* single file for both i2c & spi
* 5 compatibles for all supported chips from the family
---
.../bindings/dpll/microchip,zl30731.yaml | 115 ++++++++++++++++++
1 file changed, 115 insertions(+)
create mode 100644 Documentation/devicetree/bindings/dpll/microchip,zl30731.yaml
diff --git a/Documentation/devicetree/bindings/dpll/microchip,zl30731.yaml b/Documentation/devicetree/bindings/dpll/microchip,zl30731.yaml
new file mode 100644
index 0000000000000..cb1486d140382
--- /dev/null
+++ b/Documentation/devicetree/bindings/dpll/microchip,zl30731.yaml
@@ -0,0 +1,115 @@
+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/dpll/microchip,zl3073x.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Microchip Azurite DPLL device
+
+maintainers:
+ - Ivan Vecera <ivecera@redhat.com>
+
+description:
+ Microchip Azurite DPLL (ZL3073x) is a family of DPLL devices that
+ provides up to 5 independent DPLL channels, up to 10 differential or
+ single-ended inputs and 10 differential or 20 single-ended outputs.
+ These devices support both I2C and SPI interfaces.
+
+properties:
+ compatible:
+ enum:
+ - microchip,zl30731
+ - microchip,zl30732
+ - microchip,zl30733
+ - microchip,zl30734
+ - microchip,zl30735
+
+ reg:
+ maxItems: 1
+
+required:
+ - compatible
+ - reg
+
+allOf:
+ - $ref: /schemas/dpll/dpll-device.yaml#
+ - $ref: /schemas/spi/spi-peripheral-props.yaml#
+
+unevaluatedProperties: false
+
+examples:
+ - |
+ i2c {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ dpll@70 {
+ compatible = "microchip,zl30732";
+ reg = <0x70>;
+ dpll-types = "pps", "eec";
+
+ input-pins {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ pin@0 { /* REF0P */
+ reg = <0>;
+ label = "Input 0";
+ supported-frequencies = /bits/ 64 <1 1000>;
+ type = "ext";
+ };
+ };
+
+ output-pins {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ pin@3 { /* OUT1N */
+ reg = <3>;
+ esync-control;
+ label = "Output 1";
+ supported-frequencies = /bits/ 64 <1 10000>;
+ type = "gnss";
+ };
+ };
+ };
+ };
+ - |
+ spi {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ dpll@70 {
+ compatible = "microchip,zl30731";
+ reg = <0x70>;
+ spi-max-frequency = <12500000>;
+
+ dpll-types = "pps";
+
+ input-pins {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ pin@0 { /* REF0P */
+ reg = <0>;
+ label = "Input 0";
+ supported-frequencies = /bits/ 64 <1 1000>;
+ type = "ext";
+ };
+ };
+
+ output-pins {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ pin@3 { /* OUT1N */
+ reg = <3>;
+ esync-control;
+ label = "Output 1";
+ supported-frequencies = /bits/ 64 <1 10000>;
+ type = "gnss";
+ };
+ };
+ };
+ };
+...
--
2.48.1On Wed, 16 Apr 2025 18:21:38 +0200, Ivan Vecera wrote: > Add DT bindings for Microchip Azurite DPLL chip family. These chips > provides up to 5 independent DPLL channels, 10 differential or > single-ended inputs and 10 differential or 20 single-ended outputs. > It can be connected via I2C or SPI busses. > > Signed-off-by: Ivan Vecera <ivecera@redhat.com> > --- > v1->v3: > * single file for both i2c & spi > * 5 compatibles for all supported chips from the family > --- > .../bindings/dpll/microchip,zl30731.yaml | 115 ++++++++++++++++++ > 1 file changed, 115 insertions(+) > create mode 100644 Documentation/devicetree/bindings/dpll/microchip,zl30731.yaml > My bot found errors running 'make dt_binding_check' on your patch: yamllint warnings/errors: dtschema/dtc warnings/errors: /builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/dpll/microchip,zl30731.yaml: $id: Cannot determine base path from $id, relative path/filename doesn't match actual path or filename $id: http://devicetree.org/schemas/dpll/microchip,zl3073x.yaml file: /builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/dpll/microchip,zl30731.yaml doc reference errors (make refcheckdocs): See https://patchwork.ozlabs.org/project/devicetree-bindings/patch/20250416162144.670760-3-ivecera@redhat.com The base for the series is generally the latest rc1. A different dependency should be noted in *this* patch. If you already ran 'make dt_binding_check' and didn't see the above error(s), then make sure 'yamllint' is installed and dt-schema is up to date: pip3 install dtschema --upgrade Please check and re-submit after running the above command yourself. Note that DT_SCHEMA_FILES can be set to your schema file to speed up checking your schema. However, it must be unset to test all examples with your schema.
On Wed, Apr 16, 2025 at 7:42 PM Rob Herring (Arm) <robh@kernel.org> wrote: > > > On Wed, 16 Apr 2025 18:21:38 +0200, Ivan Vecera wrote: > > Add DT bindings for Microchip Azurite DPLL chip family. These chips > > provides up to 5 independent DPLL channels, 10 differential or > > single-ended inputs and 10 differential or 20 single-ended outputs. > > It can be connected via I2C or SPI busses. > > > > Signed-off-by: Ivan Vecera <ivecera@redhat.com> > > --- > > v1->v3: > > * single file for both i2c & spi > > * 5 compatibles for all supported chips from the family > > --- > > .../bindings/dpll/microchip,zl30731.yaml | 115 ++++++++++++++++++ > > 1 file changed, 115 insertions(+) > > create mode 100644 Documentation/devicetree/bindings/dpll/microchip,zl30731.yaml > > > > My bot found errors running 'make dt_binding_check' on your patch: > > yamllint warnings/errors: > > dtschema/dtc warnings/errors: > /builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/dpll/microchip,zl30731.yaml: $id: Cannot determine base path from $id, relative path/filename doesn't match actual path or filename > $id: http://devicetree.org/schemas/dpll/microchip,zl3073x.yaml Oops, my bad... I forgot to update $id after rename of the file... Will fix. Thanks, Ivan
On Wed, Apr 16, 2025 at 08:29:33PM GMT, Ivan Vecera wrote: > On Wed, Apr 16, 2025 at 7:42 PM Rob Herring (Arm) <robh@kernel.org> wrote: > > > > > > On Wed, 16 Apr 2025 18:21:38 +0200, Ivan Vecera wrote: > > > Add DT bindings for Microchip Azurite DPLL chip family. These chips > > > provides up to 5 independent DPLL channels, 10 differential or > > > single-ended inputs and 10 differential or 20 single-ended outputs. > > > It can be connected via I2C or SPI busses. > > > > > > Signed-off-by: Ivan Vecera <ivecera@redhat.com> > > > --- > > > v1->v3: > > > * single file for both i2c & spi > > > * 5 compatibles for all supported chips from the family > > > --- > > > .../bindings/dpll/microchip,zl30731.yaml | 115 ++++++++++++++++++ > > > 1 file changed, 115 insertions(+) > > > create mode 100644 Documentation/devicetree/bindings/dpll/microchip,zl30731.yaml > > > > > > > My bot found errors running 'make dt_binding_check' on your patch: > > > > yamllint warnings/errors: > > > > dtschema/dtc warnings/errors: > > /builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/dpll/microchip,zl30731.yaml: $id: Cannot determine base path from $id, relative path/filename doesn't match actual path or filename > > $id: http://devicetree.org/schemas/dpll/microchip,zl3073x.yaml > > Oops, my bad... I forgot to update $id after rename of the file... > Will fix. No, you forgot to test. You are expected to build your code (and this is here testing) BEFORE you post, not after or not through community resources.
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