Add bindings for NVIDIA VRS (Voltage Regulator Specification) power
sequencer device. NVIDIA VRS PSEQ controls ON/OFF and suspend/resume
power sequencing of system power rails on Tegra234 SoC. This device
also provides 32kHz RTC support with backup battery for system timing.
Signed-off-by: Shubhi Garg <shgarg@nvidia.com>
---
.../bindings/mfd/nvidia,vrs-pseq.yaml | 61 +++++++++++++++++++
1 file changed, 61 insertions(+)
create mode 100644 Documentation/devicetree/bindings/mfd/nvidia,vrs-pseq.yaml
diff --git a/Documentation/devicetree/bindings/mfd/nvidia,vrs-pseq.yaml b/Documentation/devicetree/bindings/mfd/nvidia,vrs-pseq.yaml
new file mode 100644
index 000000000000..d4c5984930e9
--- /dev/null
+++ b/Documentation/devicetree/bindings/mfd/nvidia,vrs-pseq.yaml
@@ -0,0 +1,61 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+# SPDX-FileCopyrightText: Copyright (c) 2025 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/mfd/nvidia,vrs-pseq.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: NVIDIA Voltage Regulator Specification Power Sequencer
+
+maintainers:
+ - Shubhi Garg <shgarg@nvidia.com>
+
+description:
+ NVIDIA Voltage Regulator Specification Power Sequencer device controls ON/OFF
+ and suspend/resume power sequencing of system power rails for NVIDIA
+ SoCs. It provides 32kHz RTC clock support with backup battery for
+ system timing.
+
+properties:
+ compatible:
+ const: nvidia,vrs-pseq
+
+ reg:
+ maxItems: 1
+
+ interrupts:
+ maxItems: 1
+
+ interrupt-controller: true
+
+ '#interrupt-cells':
+ const: 2
+ description:
+ The first cell is the IRQ number, the second cell is the trigger type.
+
+required:
+ - compatible
+ - reg
+ - interrupts
+ - interrupt-controller
+ - "#interrupt-cells"
+
+additionalProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/interrupt-controller/irq.h>
+ i2c {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ vrs@3c {
+ compatible = "nvidia,vrs-pseq";
+ reg = <0x3c>;
+ interrupt-parent = <&pmc>;
+ interrupts = <24 IRQ_TYPE_LEVEL_LOW>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ status = "disabled";
+ };
+ };
--
2.25.1
On Wed, Apr 16, 2025 at 12:06:15PM +0000, Shubhi Garg wrote:
> Add bindings for NVIDIA VRS (Voltage Regulator Specification) power
> sequencer device. NVIDIA VRS PSEQ controls ON/OFF and suspend/resume
> power sequencing of system power rails on Tegra234 SoC. This device
> also provides 32kHz RTC support with backup battery for system timing.
>
> Signed-off-by: Shubhi Garg <shgarg@nvidia.com>
> ---
> .../bindings/mfd/nvidia,vrs-pseq.yaml | 61 +++++++++++++++++++
> 1 file changed, 61 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/mfd/nvidia,vrs-pseq.yaml
>
> diff --git a/Documentation/devicetree/bindings/mfd/nvidia,vrs-pseq.yaml b/Documentation/devicetree/bindings/mfd/nvidia,vrs-pseq.yaml
> new file mode 100644
> index 000000000000..d4c5984930e9
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/mfd/nvidia,vrs-pseq.yaml
> @@ -0,0 +1,61 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +# SPDX-FileCopyrightText: Copyright (c) 2025 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
First I've seen this...
According to this[1], you shouldn't have 'Copyright (c)'. But better
check with your lawyers.
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/mfd/nvidia,vrs-pseq.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: NVIDIA Voltage Regulator Specification Power Sequencer
> +
> +maintainers:
> + - Shubhi Garg <shgarg@nvidia.com>
> +
> +description:
> + NVIDIA Voltage Regulator Specification Power Sequencer device controls ON/OFF
Wrap at 80 char.
> + and suspend/resume power sequencing of system power rails for NVIDIA
> + SoCs. It provides 32kHz RTC clock support with backup battery for
> + system timing.
Nothing in this description indicates it's also an interrupt controller.
> +
> +properties:
> + compatible:
> + const: nvidia,vrs-pseq
> +
> + reg:
> + maxItems: 1
> +
> + interrupts:
> + maxItems: 1
> +
> + interrupt-controller: true
> +
> + '#interrupt-cells':
> + const: 2
> + description:
> + The first cell is the IRQ number, the second cell is the trigger type.
> +
> +required:
> + - compatible
> + - reg
> + - interrupts
> + - interrupt-controller
> + - "#interrupt-cells"
> +
> +additionalProperties: false
> +
> +examples:
> + - |
> + #include <dt-bindings/interrupt-controller/irq.h>
> + i2c {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + vrs@3c {
> + compatible = "nvidia,vrs-pseq";
> + reg = <0x3c>;
> + interrupt-parent = <&pmc>;
> + interrupts = <24 IRQ_TYPE_LEVEL_LOW>;
> + interrupt-controller;
> + #interrupt-cells = <2>;
> + status = "disabled";
Examples should be enabled or removed.
> + };
> + };
> --
> 2.25.1
>
On Mon, Apr 21, 2025 at 5:02 PM Rob Herring <robh@kernel.org> wrote: > > On Wed, Apr 16, 2025 at 12:06:15PM +0000, Shubhi Garg wrote: > > Add bindings for NVIDIA VRS (Voltage Regulator Specification) power > > sequencer device. NVIDIA VRS PSEQ controls ON/OFF and suspend/resume > > power sequencing of system power rails on Tegra234 SoC. This device > > also provides 32kHz RTC support with backup battery for system timing. > > > > Signed-off-by: Shubhi Garg <shgarg@nvidia.com> > > --- > > .../bindings/mfd/nvidia,vrs-pseq.yaml | 61 +++++++++++++++++++ > > 1 file changed, 61 insertions(+) > > create mode 100644 Documentation/devicetree/bindings/mfd/nvidia,vrs-pseq.yaml > > > > diff --git a/Documentation/devicetree/bindings/mfd/nvidia,vrs-pseq.yaml b/Documentation/devicetree/bindings/mfd/nvidia,vrs-pseq.yaml > > new file mode 100644 > > index 000000000000..d4c5984930e9 > > --- /dev/null > > +++ b/Documentation/devicetree/bindings/mfd/nvidia,vrs-pseq.yaml > > @@ -0,0 +1,61 @@ > > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > > +# SPDX-FileCopyrightText: Copyright (c) 2025 NVIDIA CORPORATION & AFFILIATES. All rights reserved. > > First I've seen this... > > According to this[1], you shouldn't have 'Copyright (c)'. But better > check with your lawyers. With the link now: [1] https://reuse.software/faq/
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