This patch describes the clock controller integrated in K230 SoC
and replace dummy clocks with the real ones for UARTs.
Co-developed-by: Troy Mitchell <TroyMitchell988@gmail.com>
Signed-off-by: Troy Mitchell <TroyMitchell988@gmail.com>
Signed-off-by: Xukai Wang <kingxukai@zohomail.com>
---
arch/riscv/boot/dts/canaan/k230.dtsi | 25 +++++++++++++++++--------
1 file changed, 17 insertions(+), 8 deletions(-)
diff --git a/arch/riscv/boot/dts/canaan/k230.dtsi b/arch/riscv/boot/dts/canaan/k230.dtsi
index 95c1a3d8fb1192e30113d96d3e96329545bc6ae7..e688633acbbf2cee36354220c557252111f56ff5 100644
--- a/arch/riscv/boot/dts/canaan/k230.dtsi
+++ b/arch/riscv/boot/dts/canaan/k230.dtsi
@@ -3,6 +3,7 @@
* Copyright (C) 2024 Yangyu Chen <cyy@cyyself.name>
*/
+#include <dt-bindings/clock/canaan,k230-clk.h>
#include <dt-bindings/interrupt-controller/irq.h>
/dts-v1/;
@@ -58,10 +59,10 @@ l2_cache: l2-cache {
};
};
- apb_clk: apb-clk-clock {
+ osc24m: clock-24m {
compatible = "fixed-clock";
- clock-frequency = <50000000>;
- clock-output-names = "apb_clk";
+ clock-frequency = <24000000>;
+ clock-output-names = "osc24m";
#clock-cells = <0>;
};
@@ -89,10 +90,18 @@ clint: timer@f04000000 {
interrupts-extended = <&cpu0_intc 3>, <&cpu0_intc 7>;
};
+ sysclk: clock-controller@91102000 {
+ compatible = "canaan,k230-clk";
+ reg = <0x0 0x91102000 0x0 0x1000>,
+ <0x0 0x91100000 0x0 0x1000>;
+ clocks = <&osc24m>;
+ #clock-cells = <1>;
+ };
+
uart0: serial@91400000 {
compatible = "snps,dw-apb-uart";
reg = <0x0 0x91400000 0x0 0x1000>;
- clocks = <&apb_clk>;
+ clocks = <&sysclk K230_LS_UART0>;
interrupts = <16 IRQ_TYPE_LEVEL_HIGH>;
reg-io-width = <4>;
reg-shift = <2>;
@@ -102,7 +111,7 @@ uart0: serial@91400000 {
uart1: serial@91401000 {
compatible = "snps,dw-apb-uart";
reg = <0x0 0x91401000 0x0 0x1000>;
- clocks = <&apb_clk>;
+ clocks = <&sysclk K230_LS_UART1>;
interrupts = <17 IRQ_TYPE_LEVEL_HIGH>;
reg-io-width = <4>;
reg-shift = <2>;
@@ -112,7 +121,7 @@ uart1: serial@91401000 {
uart2: serial@91402000 {
compatible = "snps,dw-apb-uart";
reg = <0x0 0x91402000 0x0 0x1000>;
- clocks = <&apb_clk>;
+ clocks = <&sysclk K230_LS_UART2>;
interrupts = <18 IRQ_TYPE_LEVEL_HIGH>;
reg-io-width = <4>;
reg-shift = <2>;
@@ -122,7 +131,7 @@ uart2: serial@91402000 {
uart3: serial@91403000 {
compatible = "snps,dw-apb-uart";
reg = <0x0 0x91403000 0x0 0x1000>;
- clocks = <&apb_clk>;
+ clocks = <&sysclk K230_LS_UART3>;
interrupts = <19 IRQ_TYPE_LEVEL_HIGH>;
reg-io-width = <4>;
reg-shift = <2>;
@@ -132,7 +141,7 @@ uart3: serial@91403000 {
uart4: serial@91404000 {
compatible = "snps,dw-apb-uart";
reg = <0x0 0x91404000 0x0 0x1000>;
- clocks = <&apb_clk>;
+ clocks = <&sysclk K230_LS_UART4>;
interrupts = <20 IRQ_TYPE_LEVEL_HIGH>;
reg-io-width = <4>;
reg-shift = <2>;
--
2.34.1