Add a new coresight-tnoc.yaml file to describe the bindings required to
define Trace Network On Chip (TNOC) in device trees. TNOC is an
integration hierarchy which is a hardware component that integrates the
functionalities of TPDA and funnels. It collects trace form subsystems
and transfers to coresight sink.
Signed-off-by: Yuanfang Zhang <quic_yuanfang@quicinc.com>
---
.../bindings/arm/qcom,coresight-tnoc.yaml | 111 +++++++++++++++++++++
1 file changed, 111 insertions(+)
diff --git a/Documentation/devicetree/bindings/arm/qcom,coresight-tnoc.yaml b/Documentation/devicetree/bindings/arm/qcom,coresight-tnoc.yaml
new file mode 100644
index 0000000000000000000000000000000000000000..709c1bc63db48c29bb2b33e7a795a5999768c5e7
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/qcom,coresight-tnoc.yaml
@@ -0,0 +1,111 @@
+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/arm/qcom,coresight-tnoc.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Qualcomm Trace Network On Chip - TNOC
+
+maintainers:
+ - Yuanfang Zhang <quic_yuanfang@quicinc.com>
+
+description:
+ The Trace Network On Chip (TNOC) is an integration hierarchy hardware
+ component that integrates the functionalities of TPDA and funnels.
+
+ It sits in the different subsystem of SOC and aggregates the trace and
+ transports it to Aggregation TNOC or to coresight trace sink eventually.
+ TNOC embeds bridges for all the interfaces APB, ATB, TPDA and NTS (Narrow
+ Time Stamp).
+
+ TNOC can take inputs from different trace sources i.e. ATB, TPDM.
+
+# Need a custom select here or 'arm,primecell' will match on lots of nodes
+select:
+ properties:
+ compatible:
+ contains:
+ enum:
+ - qcom,coresight-tnoc
+ required:
+ - compatible
+
+properties:
+ $nodename:
+ pattern: "^tn(@[0-9a-f]+)$"
+
+ compatible:
+ items:
+ - const: qcom,coresight-tnoc
+ - const: arm,primecell
+
+ reg:
+ maxItems: 1
+
+ clock-names:
+ items:
+ - const: apb_pclk
+
+ clocks:
+ items:
+ - description: APB register access clock
+
+ in-ports:
+ $ref: /schemas/graph.yaml#/properties/ports
+
+ patternProperties:
+ '^port(@[0-9a-f]{1,2})?$':
+ description: Input connections from CoreSight Trace Bus
+ $ref: /schemas/graph.yaml#/properties/port
+
+ out-ports:
+ $ref: /schemas/graph.yaml#/properties/ports
+ additionalProperties: false
+
+ properties:
+ port:
+ description:
+ Output connection to CoreSight Trace Bus
+ $ref: /schemas/graph.yaml#/properties/port
+
+required:
+ - compatible
+ - reg
+ - clocks
+ - clock-names
+ - in-ports
+ - out-ports
+
+additionalProperties: false
+
+examples:
+ - |
+ tn@109ab000 {
+ compatible = "qcom,coresight-tnoc", "arm,primecell";
+ reg = <0x0 0x109ab000 0x0 0x4200>;
+
+ clocks = <&aoss_qmp>;
+ clock-names = "apb_pclk";
+
+ in-ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+
+ tn_ag_in_tpdm_gcc: endpoint {
+ remote-endpoint = <&tpdm_gcc_out_tn_ag>;
+ };
+ };
+ };
+
+ out-ports {
+ port {
+ tn_ag_out_funnel_in1: endpoint {
+ remote-endpoint = <&funnel_in1_in_tn_ag>;
+ };
+ };
+ };
+ };
+...
--
2.34.1On Fri, Apr 11, 2025 at 04:57:52PM +0800, Yuanfang Zhang wrote:
> Add a new coresight-tnoc.yaml file to describe the bindings required to
> define Trace Network On Chip (TNOC) in device trees. TNOC is an
> integration hierarchy which is a hardware component that integrates the
> functionalities of TPDA and funnels. It collects trace form subsystems
> and transfers to coresight sink.
>
> Signed-off-by: Yuanfang Zhang <quic_yuanfang@quicinc.com>
> ---
> .../bindings/arm/qcom,coresight-tnoc.yaml | 111 +++++++++++++++++++++
> 1 file changed, 111 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/arm/qcom,coresight-tnoc.yaml b/Documentation/devicetree/bindings/arm/qcom,coresight-tnoc.yaml
> new file mode 100644
> index 0000000000000000000000000000000000000000..709c1bc63db48c29bb2b33e7a795a5999768c5e7
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/arm/qcom,coresight-tnoc.yaml
> @@ -0,0 +1,111 @@
> +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/arm/qcom,coresight-tnoc.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Qualcomm Trace Network On Chip - TNOC
> +
> +maintainers:
> + - Yuanfang Zhang <quic_yuanfang@quicinc.com>
> +
> +description:
'>' is needed for paragraphs.
> + The Trace Network On Chip (TNOC) is an integration hierarchy hardware
> + component that integrates the functionalities of TPDA and funnels.
> +
> + It sits in the different subsystem of SOC and aggregates the trace and
> + transports it to Aggregation TNOC or to coresight trace sink eventually.
> + TNOC embeds bridges for all the interfaces APB, ATB, TPDA and NTS (Narrow
> + Time Stamp).
> +
> + TNOC can take inputs from different trace sources i.e. ATB, TPDM.
> +
> +# Need a custom select here or 'arm,primecell' will match on lots of nodes
> +select:
> + properties:
> + compatible:
> + contains:
> + enum:
> + - qcom,coresight-tnoc
> + required:
> + - compatible
> +
> +properties:
> + $nodename:
> + pattern: "^tn(@[0-9a-f]+)$"
> +
> + compatible:
> + items:
> + - const: qcom,coresight-tnoc
> + - const: arm,primecell
> +
> + reg:
> + maxItems: 1
> +
> + clock-names:
> + items:
> + - const: apb_pclk
> +
> + clocks:
> + items:
> + - description: APB register access clock
> +
> + in-ports:
> + $ref: /schemas/graph.yaml#/properties/ports
> +
> + patternProperties:
> + '^port(@[0-9a-f]{1,2})?$':
> + description: Input connections from CoreSight Trace Bus
> + $ref: /schemas/graph.yaml#/properties/port
> +
> + out-ports:
> + $ref: /schemas/graph.yaml#/properties/ports
> + additionalProperties: false
> +
> + properties:
> + port:
> + description:
> + Output connection to CoreSight Trace Bus
> + $ref: /schemas/graph.yaml#/properties/port
> +
> +required:
> + - compatible
> + - reg
> + - clocks
> + - clock-names
> + - in-ports
> + - out-ports
> +
> +additionalProperties: false
> +
> +examples:
> + - |
> + tn@109ab000 {
> + compatible = "qcom,coresight-tnoc", "arm,primecell";
> + reg = <0x0 0x109ab000 0x0 0x4200>;
> +
> + clocks = <&aoss_qmp>;
> + clock-names = "apb_pclk";
> +
> + in-ports {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + port@0 {
> + reg = <0>;
> +
> + tn_ag_in_tpdm_gcc: endpoint {
> + remote-endpoint = <&tpdm_gcc_out_tn_ag>;
> + };
> + };
> + };
> +
> + out-ports {
> + port {
> + tn_ag_out_funnel_in1: endpoint {
> + remote-endpoint = <&funnel_in1_in_tn_ag>;
> + };
> + };
> + };
> + };
> +...
>
> --
> 2.34.1
>
On Fri, 11 Apr 2025 16:57:52 +0800, Yuanfang Zhang wrote: > Add a new coresight-tnoc.yaml file to describe the bindings required to > define Trace Network On Chip (TNOC) in device trees. TNOC is an > integration hierarchy which is a hardware component that integrates the > functionalities of TPDA and funnels. It collects trace form subsystems > and transfers to coresight sink. > > Signed-off-by: Yuanfang Zhang <quic_yuanfang@quicinc.com> > --- > .../bindings/arm/qcom,coresight-tnoc.yaml | 111 +++++++++++++++++++++ > 1 file changed, 111 insertions(+) > My bot found errors running 'make dt_binding_check' on your patch: yamllint warnings/errors: dtschema/dtc warnings/errors: /builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/arm/qcom,coresight-tnoc.example.dtb: tn@109ab000 (qcom,coresight-tnoc): reg: [[0, 278573056], [0, 16896]] is too long from schema $id: http://devicetree.org/schemas/arm/qcom,coresight-tnoc.yaml# doc reference errors (make refcheckdocs): See https://patchwork.ozlabs.org/project/devicetree-bindings/patch/20250411-trace-noc-v3-1-1f19ddf7699b@quicinc.com The base for the series is generally the latest rc1. A different dependency should be noted in *this* patch. If you already ran 'make dt_binding_check' and didn't see the above error(s), then make sure 'yamllint' is installed and dt-schema is up to date: pip3 install dtschema --upgrade Please check and re-submit after running the above command yourself. Note that DT_SCHEMA_FILES can be set to your schema file to speed up checking your schema. However, it must be unset to test all examples with your schema.
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