Describe the Software Watchdog Timer available on the S32G platforms.
Cc: Ghennadi Procopciuc <ghennadi.procopciuc@nxp.com>
Cc: Thomas Fossati <thomas.fossati@linaro.org>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
---
.../bindings/watchdog/nxp,s32g2-swt.yaml | 56 +++++++++++++++++++
1 file changed, 56 insertions(+)
create mode 100644 Documentation/devicetree/bindings/watchdog/nxp,s32g2-swt.yaml
diff --git a/Documentation/devicetree/bindings/watchdog/nxp,s32g2-swt.yaml b/Documentation/devicetree/bindings/watchdog/nxp,s32g2-swt.yaml
new file mode 100644
index 000000000000..48ba9e9979ee
--- /dev/null
+++ b/Documentation/devicetree/bindings/watchdog/nxp,s32g2-swt.yaml
@@ -0,0 +1,56 @@
+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/watchdog/nxp,s32g2-swt.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: NXP Software Watchdog Timer (SWT)
+
+maintainers:
+ - Daniel Lezcano <daniel.lezcano@kernel.org>
+
+allOf:
+ - $ref: watchdog.yaml#
+
+properties:
+ compatible:
+ oneOf:
+ - const: nxp,s32g2-swt
+ - items:
+ - const: nxp,s32g3-swt
+ - const: nxp,s32g2-swt
+
+ reg:
+ maxItems: 1
+
+ clocks:
+ items:
+ - description: Counter clock
+ - description: Module clock
+ - description: Register clock
+ minItems: 1
+
+ clock-names:
+ items:
+ - const: counter
+ - const: module
+ - const: register
+ minItems: 1
+
+required:
+ - compatible
+ - reg
+ - clocks
+ - clock-names
+
+unevaluatedProperties: false
+
+examples:
+ - |
+ watchdog@40100000 {
+ compatible = "nxp,s32g2-swt";
+ reg = <0x40100000 0x1000>;
+ clocks = <&clks 0x3a>, <&clks 0x3b>;
+ clock-names = "counter", "module";
+ timeout-sec = <10>;
+ };
--
2.43.0On 07/04/2025 18:03, Daniel Lezcano wrote: > + > +allOf: > + - $ref: watchdog.yaml# > + > +properties: > + compatible: > + oneOf: > + - const: nxp,s32g2-swt > + - items: > + - const: nxp,s32g3-swt > + - const: nxp,s32g2-swt > + > + reg: > + maxItems: 1 > + > + clocks: > + items: > + - description: Counter clock > + - description: Module clock > + - description: Register clock > + minItems: 1 Why clocks are flexible? The SoC does not change between boards. It should be a fixed list - block receives that number of clocks or does not... unless you meant that different instances of the block have different clocks? Best regards, Krzysztof
On 08/04/2025 10:21, Krzysztof Kozlowski wrote: > On 07/04/2025 18:03, Daniel Lezcano wrote: >> + >> +allOf: >> + - $ref: watchdog.yaml# >> + >> +properties: >> + compatible: >> + oneOf: >> + - const: nxp,s32g2-swt >> + - items: >> + - const: nxp,s32g3-swt >> + - const: nxp,s32g2-swt >> + >> + reg: >> + maxItems: 1 >> + >> + clocks: >> + items: >> + - description: Counter clock >> + - description: Module clock >> + - description: Register clock >> + minItems: 1 > > Why clocks are flexible? The SoC does not change between boards. It > should be a fixed list - block receives that number of clocks or does > not... unless you meant that different instances of the block have > different clocks? The documentation describe the watchdog module with a clock for the counter, a clock for the register and the last one for the module. IIUC, these clocks are enabled when the system is powered-on or exits suspend. The driver does not have a control on them. The only usage of the clock is to retrieve the rate of the counter in order to compute the maximum timeout. So only one is needed. However Ghennadi would like to describe the register and the module clocks in case there is SoC variant where it is possible to have control on them [1] The goal is to give the description the flexibility to describe just one because the other ones are not needed for this s32g2/3 platform. [1] https://lore.kernel.org/all/93d83df2-d3bc-e32d-70a6-158571504275@oss.nxp.com/ -- <http://www.linaro.org/> Linaro.org │ Open source software for ARM SoCs Follow Linaro: <http://www.facebook.com/pages/Linaro> Facebook | <http://twitter.com/#!/linaroorg> Twitter | <http://www.linaro.org/linaro-blog/> Blog
On 08/04/2025 11:03, Daniel Lezcano wrote: > On 08/04/2025 10:21, Krzysztof Kozlowski wrote: >> On 07/04/2025 18:03, Daniel Lezcano wrote: >>> + >>> +allOf: >>> + - $ref: watchdog.yaml# >>> + >>> +properties: >>> + compatible: >>> + oneOf: >>> + - const: nxp,s32g2-swt >>> + - items: >>> + - const: nxp,s32g3-swt >>> + - const: nxp,s32g2-swt >>> + >>> + reg: >>> + maxItems: 1 >>> + >>> + clocks: >>> + items: >>> + - description: Counter clock >>> + - description: Module clock >>> + - description: Register clock >>> + minItems: 1 >> >> Why clocks are flexible? The SoC does not change between boards. It >> should be a fixed list - block receives that number of clocks or does >> not... unless you meant that different instances of the block have >> different clocks? > > The documentation describe the watchdog module with a clock for the > counter, a clock for the register and the last one for the module. > > IIUC, these clocks are enabled when the system is powered-on or exits > suspend. > > The driver does not have a control on them. > > The only usage of the clock is to retrieve the rate of the counter in > order to compute the maximum timeout. So only one is needed. > > However Ghennadi would like to describe the register and the module > clocks in case there is SoC variant where it is possible to have control > on them [1] Different SoC means different compatible, so I don't get why this is relevant here. Either these clocks inputs are there in the hardware or not. > > The goal is to give the description the flexibility to describe just one > because the other ones are not needed for this s32g2/3 platform. But bindings are not meant to be flexible but accurately describe the hardware. If hardware always has these clock inputs, then they are supposed to be always provided. Best regards, Krzysztof
On 4/8/2025 12:39 PM, Krzysztof Kozlowski wrote: > On 08/04/2025 11:03, Daniel Lezcano wrote: >> On 08/04/2025 10:21, Krzysztof Kozlowski wrote: >>> On 07/04/2025 18:03, Daniel Lezcano wrote: >>>> + >>>> +allOf: >>>> + - $ref: watchdog.yaml# >>>> + >>>> +properties: >>>> + compatible: >>>> + oneOf: >>>> + - const: nxp,s32g2-swt >>>> + - items: >>>> + - const: nxp,s32g3-swt >>>> + - const: nxp,s32g2-swt >>>> + >>>> + reg: >>>> + maxItems: 1 >>>> + >>>> + clocks: >>>> + items: >>>> + - description: Counter clock >>>> + - description: Module clock >>>> + - description: Register clock >>>> + minItems: 1 >>> >>> Why clocks are flexible? The SoC does not change between boards. It >>> should be a fixed list - block receives that number of clocks or does >>> not... unless you meant that different instances of the block have >>> different clocks? >> >> The documentation describe the watchdog module with a clock for the >> counter, a clock for the register and the last one for the module. >> >> IIUC, these clocks are enabled when the system is powered-on or exits >> suspend. >> >> The driver does not have a control on them. >> >> The only usage of the clock is to retrieve the rate of the counter in >> order to compute the maximum timeout. So only one is needed. >> >> However Ghennadi would like to describe the register and the module >> clocks in case there is SoC variant where it is possible to have control >> on them [1] > > Different SoC means different compatible, so I don't get why this is > relevant here. Either these clocks inputs are there in the hardware or not. > >> >> The goal is to give the description the flexibility to describe just one >> because the other ones are not needed for this s32g2/3 platform. > > But bindings are not meant to be flexible but accurately describe the > hardware. If hardware always has these clock inputs, then they are > supposed to be always provided. > Indeed, as mentioned in my previous replies, the SWT hardware module has three clocks as inputs: counter, module, and register. > > Best regards, > Krzysztof > > -- Regards, Ghennadi
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