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[PATCH v2 3/3] arm64: dts: add imx8mp-libra-rdk-fpsc LVDS panel overlay

Yannic Moog posted 3 patches 10 months, 1 week ago
There is a newer version of this series
[PATCH v2 3/3] arm64: dts: add imx8mp-libra-rdk-fpsc LVDS panel overlay
Posted by Yannic Moog 10 months, 1 week ago 
The Libra board has an LVDS connector. Add an overlay for an
etml1010g3dra LVDS panel supported for the phyCORE-i.MX 8M Plus that may
be connected to it.

Signed-off-by: Yannic Moog <y.moog@phytec.de>
---
 arch/arm64/boot/dts/freescale/Makefile             |  2 +
 .../imx8mp-libra-rdk-fpsc-lvds-etml1010g3dra.dtso  | 44 ++++++++++++++++++++++
 2 files changed, 46 insertions(+)

diff --git a/arch/arm64/boot/dts/freescale/Makefile b/arch/arm64/boot/dts/freescale/Makefile
index df792553be479afcb6fa50dcd25a7eb63b67bc44..aa349ee35d5b310512f05c92390d5c2a27df81bb 100644
--- a/arch/arm64/boot/dts/freescale/Makefile
+++ b/arch/arm64/boot/dts/freescale/Makefile
@@ -201,6 +201,8 @@ dtb-$(CONFIG_ARCH_MXC) += imx8mp-kontron-dl.dtb
 
 dtb-$(CONFIG_ARCH_MXC) += imx8mp-kontron-smarc-eval-carrier.dtb
 dtb-$(CONFIG_ARCH_MXC) += imx8mp-libra-rdk-fpsc.dtb
+imx8mp-libra-rdk-fpsc-lvds-dtbs += imx8mp-libra-rdk-fpsc.dtb imx8mp-libra-rdk-fpsc-lvds-etml1010g3dra.dtbo
+dtb-$(CONFIG_ARCH_MXC) += imx8mp-libra-rdk-fpsc-lvds.dtb
 dtb-$(CONFIG_ARCH_MXC) += imx8mp-msc-sm2s-ep1.dtb
 dtb-$(CONFIG_ARCH_MXC) += imx8mp-navqp.dtb
 dtb-$(CONFIG_ARCH_MXC) += imx8mp-nitrogen-smarc-universal-board.dtb
diff --git a/arch/arm64/boot/dts/freescale/imx8mp-libra-rdk-fpsc-lvds-etml1010g3dra.dtso b/arch/arm64/boot/dts/freescale/imx8mp-libra-rdk-fpsc-lvds-etml1010g3dra.dtso
new file mode 100644
index 0000000000000000000000000000000000000000..1dcf249ca90d2b4d9720a55de39e3f8564780dc3
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/imx8mp-libra-rdk-fpsc-lvds-etml1010g3dra.dtso
@@ -0,0 +1,44 @@
+// SPDX-License-Identifier: (GPL-2.0-or-later OR MIT)
+/*
+ * Copyright (C) 2025 PHYTEC Messtechnik GmbH
+ */
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/clock/imx8mp-clock.h>
+
+/dts-v1/;
+/plugin/;
+
+&backlight_lvds0 {
+	brightness-levels = <0 8 16 32 64 128 255>;
+	default-brightness-level = <8>;
+	enable-gpios = <&gpio5 23 GPIO_ACTIVE_LOW>;
+	num-interpolated-steps = <2>;
+	pwms = <&pwm1 0 66667 0>;
+	status = "okay";
+};
+
+&lcdif2 {
+	status = "okay";
+};
+
+&lvds_bridge {
+	assigned-clocks = <&clk IMX8MP_CLK_MEDIA_LDB>, <&clk IMX8MP_VIDEO_PLL1>;
+	assigned-clock-parents = <&clk IMX8MP_VIDEO_PLL1_OUT>;
+	/*
+	 * The LVDS panel uses 72.4 MHz pixel clock, set IMX8MP_VIDEO_PLL1 to
+	 * 72.4 * 7 = 506.8 MHz so the LDB serializer and LCDIFv3 scanout
+	 * engine can reach accurate pixel clock of exactly 72.4 MHz.
+	 */
+	assigned-clock-rates = <0>, <506800000>;
+	status = "okay";
+};
+
+&panel0_lvds {
+	compatible = "edt,etml1010g3dra";
+	status = "okay";
+};
+
+&pwm1 {
+	status = "okay";
+};

-- 
2.49.0
Re: [PATCH v2 3/3] arm64: dts: add imx8mp-libra-rdk-fpsc LVDS panel overlay
Posted by Frank Li 10 months, 1 week ago 
On Thu, Apr 03, 2025 at 01:29:29PM +0200, Yannic Moog wrote:
> The Libra board has an LVDS connector. Add an overlay for an
> etml1010g3dra LVDS panel supported for the phyCORE-i.MX 8M Plus that may
> be connected to it.
>
> Signed-off-by: Yannic Moog <y.moog@phytec.de>
> ---
>  arch/arm64/boot/dts/freescale/Makefile             |  2 +
>  .../imx8mp-libra-rdk-fpsc-lvds-etml1010g3dra.dtso  | 44 ++++++++++++++++++++++
>  2 files changed, 46 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/freescale/Makefile b/arch/arm64/boot/dts/freescale/Makefile
> index df792553be479afcb6fa50dcd25a7eb63b67bc44..aa349ee35d5b310512f05c92390d5c2a27df81bb 100644
> --- a/arch/arm64/boot/dts/freescale/Makefile
> +++ b/arch/arm64/boot/dts/freescale/Makefile
> @@ -201,6 +201,8 @@ dtb-$(CONFIG_ARCH_MXC) += imx8mp-kontron-dl.dtb
>
>  dtb-$(CONFIG_ARCH_MXC) += imx8mp-kontron-smarc-eval-carrier.dtb
>  dtb-$(CONFIG_ARCH_MXC) += imx8mp-libra-rdk-fpsc.dtb
> +imx8mp-libra-rdk-fpsc-lvds-dtbs += imx8mp-libra-rdk-fpsc.dtb imx8mp-libra-rdk-fpsc-lvds-etml1010g3dra.dtbo
> +dtb-$(CONFIG_ARCH_MXC) += imx8mp-libra-rdk-fpsc-lvds.dtb
>  dtb-$(CONFIG_ARCH_MXC) += imx8mp-msc-sm2s-ep1.dtb
>  dtb-$(CONFIG_ARCH_MXC) += imx8mp-navqp.dtb
>  dtb-$(CONFIG_ARCH_MXC) += imx8mp-nitrogen-smarc-universal-board.dtb
> diff --git a/arch/arm64/boot/dts/freescale/imx8mp-libra-rdk-fpsc-lvds-etml1010g3dra.dtso b/arch/arm64/boot/dts/freescale/imx8mp-libra-rdk-fpsc-lvds-etml1010g3dra.dtso
> new file mode 100644
> index 0000000000000000000000000000000000000000..1dcf249ca90d2b4d9720a55de39e3f8564780dc3
> --- /dev/null
> +++ b/arch/arm64/boot/dts/freescale/imx8mp-libra-rdk-fpsc-lvds-etml1010g3dra.dtso
> @@ -0,0 +1,44 @@
> +// SPDX-License-Identifier: (GPL-2.0-or-later OR MIT)
> +/*
> + * Copyright (C) 2025 PHYTEC Messtechnik GmbH
> + */
> +
> +#include <dt-bindings/gpio/gpio.h>
> +#include <dt-bindings/clock/imx8mp-clock.h>
> +
> +/dts-v1/;
> +/plugin/;
> +
> +&backlight_lvds0 {
> +	brightness-levels = <0 8 16 32 64 128 255>;
> +	default-brightness-level = <8>;
> +	enable-gpios = <&gpio5 23 GPIO_ACTIVE_LOW>;
> +	num-interpolated-steps = <2>;
> +	pwms = <&pwm1 0 66667 0>;
> +	status = "okay";
> +};
> +
> +&lcdif2 {
> +	status = "okay";
> +};
> +
> +&lvds_bridge {
> +	assigned-clocks = <&clk IMX8MP_CLK_MEDIA_LDB>, <&clk IMX8MP_VIDEO_PLL1>;
> +	assigned-clock-parents = <&clk IMX8MP_VIDEO_PLL1_OUT>;
> +	/*
> +	 * The LVDS panel uses 72.4 MHz pixel clock, set IMX8MP_VIDEO_PLL1 to
> +	 * 72.4 * 7 = 506.8 MHz so the LDB serializer and LCDIFv3 scanout
> +	 * engine can reach accurate pixel clock of exactly 72.4 MHz.
> +	 */
> +	assigned-clock-rates = <0>, <506800000>;

why assin IMX8MP_CLK_MEDIA_LDB rate to 0?

Frank
> +	status = "okay";
> +};
> +
> +&panel0_lvds {
> +	compatible = "edt,etml1010g3dra";
> +	status = "okay";
> +};
> +
> +&pwm1 {
> +	status = "okay";
> +};
>
> --
> 2.49.0
>
Re: [PATCH v2 3/3] arm64: dts: add imx8mp-libra-rdk-fpsc LVDS panel overlay
Posted by Yannic Moog 10 months ago 
On Thu, 2025-04-03 at 14:31 -0400, Frank Li wrote:
> On Thu, Apr 03, 2025 at 01:29:29PM +0200, Yannic Moog wrote:
> > The Libra board has an LVDS connector. Add an overlay for an
> > etml1010g3dra LVDS panel supported for the phyCORE-i.MX 8M Plus that may
> > be connected to it.
> > 
> > Signed-off-by: Yannic Moog <y.moog@phytec.de>
> > ---
> >  arch/arm64/boot/dts/freescale/Makefile             |  2 +
> >  .../imx8mp-libra-rdk-fpsc-lvds-etml1010g3dra.dtso  | 44 ++++++++++++++++++++++
> >  2 files changed, 46 insertions(+)
> > 
> > diff --git a/arch/arm64/boot/dts/freescale/Makefile b/arch/arm64/boot/dts/freescale/Makefile
> > index df792553be479afcb6fa50dcd25a7eb63b67bc44..aa349ee35d5b310512f05c92390d5c2a27df81bb 100644
> > --- a/arch/arm64/boot/dts/freescale/Makefile
> > +++ b/arch/arm64/boot/dts/freescale/Makefile
> > @@ -201,6 +201,8 @@ dtb-$(CONFIG_ARCH_MXC) += imx8mp-kontron-dl.dtb
> > 
> >  dtb-$(CONFIG_ARCH_MXC) += imx8mp-kontron-smarc-eval-carrier.dtb
> >  dtb-$(CONFIG_ARCH_MXC) += imx8mp-libra-rdk-fpsc.dtb
> > +imx8mp-libra-rdk-fpsc-lvds-dtbs += imx8mp-libra-rdk-fpsc.dtb imx8mp-libra-rdk-fpsc-lvds-
> > etml1010g3dra.dtbo
> > +dtb-$(CONFIG_ARCH_MXC) += imx8mp-libra-rdk-fpsc-lvds.dtb
> >  dtb-$(CONFIG_ARCH_MXC) += imx8mp-msc-sm2s-ep1.dtb
> >  dtb-$(CONFIG_ARCH_MXC) += imx8mp-navqp.dtb
> >  dtb-$(CONFIG_ARCH_MXC) += imx8mp-nitrogen-smarc-universal-board.dtb
> > diff --git a/arch/arm64/boot/dts/freescale/imx8mp-libra-rdk-fpsc-lvds-etml1010g3dra.dtso
> > b/arch/arm64/boot/dts/freescale/imx8mp-libra-rdk-fpsc-lvds-etml1010g3dra.dtso
> > new file mode 100644
> > index 0000000000000000000000000000000000000000..1dcf249ca90d2b4d9720a55de39e3f8564780dc3
> > --- /dev/null
> > +++ b/arch/arm64/boot/dts/freescale/imx8mp-libra-rdk-fpsc-lvds-etml1010g3dra.dtso
> > @@ -0,0 +1,44 @@
> > +// SPDX-License-Identifier: (GPL-2.0-or-later OR MIT)
> > +/*
> > + * Copyright (C) 2025 PHYTEC Messtechnik GmbH
> > + */
> > +
> > +#include <dt-bindings/gpio/gpio.h>
> > +#include <dt-bindings/clock/imx8mp-clock.h>
> > +
> > +/dts-v1/;
> > +/plugin/;
> > +
> > +&backlight_lvds0 {
> > +	brightness-levels = <0 8 16 32 64 128 255>;
> > +	default-brightness-level = <8>;
> > +	enable-gpios = <&gpio5 23 GPIO_ACTIVE_LOW>;
> > +	num-interpolated-steps = <2>;
> > +	pwms = <&pwm1 0 66667 0>;
> > +	status = "okay";
> > +};
> > +
> > +&lcdif2 {
> > +	status = "okay";
> > +};
> > +
> > +&lvds_bridge {
> > +	assigned-clocks = <&clk IMX8MP_CLK_MEDIA_LDB>, <&clk IMX8MP_VIDEO_PLL1>;
> > +	assigned-clock-parents = <&clk IMX8MP_VIDEO_PLL1_OUT>;
> > +	/*
> > +	 * The LVDS panel uses 72.4 MHz pixel clock, set IMX8MP_VIDEO_PLL1 to
> > +	 * 72.4 * 7 = 506.8 MHz so the LDB serializer and LCDIFv3 scanout
> > +	 * engine can reach accurate pixel clock of exactly 72.4 MHz.
> > +	 */
> > +	assigned-clock-rates = <0>, <506800000>;
> 
> why assin IMX8MP_CLK_MEDIA_LDB rate to 0?

Because afaik we don't need it and I would like to keep the MEDIA_LDB clock entry. We only care
about the pixel clock for the panel.
The clock-rate for CLK_MEDIA_LDB is omitted in imx8mp.dtsi and the 0 makes sure it stays that way.

Yannic

> 
> Frank
> > +	status = "okay";
> > +};
> > +
> > +&panel0_lvds {
> > +	compatible = "edt,etml1010g3dra";
> > +	status = "okay";
> > +};
> > +
> > +&pwm1 {
> > +	status = "okay";
> > +};
> > 
> > --
> > 2.49.0
> >

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