Add the new binding document for MediaTek Video Companion
Processor(VCP) on MediaTek mt8196.
Signed-off-by: Xiangzhi Tang <xiangzhi.tang@mediatek.com>
---
.../remoteproc/mediatek,mt8196-vcp.yaml | 174 ++++++++++++++++++
1 file changed, 174 insertions(+)
create mode 100644 Documentation/devicetree/bindings/remoteproc/mediatek,mt8196-vcp.yaml
diff --git a/Documentation/devicetree/bindings/remoteproc/mediatek,mt8196-vcp.yaml b/Documentation/devicetree/bindings/remoteproc/mediatek,mt8196-vcp.yaml
new file mode 100644
index 000000000000..0c2926e29c02
--- /dev/null
+++ b/Documentation/devicetree/bindings/remoteproc/mediatek,mt8196-vcp.yaml
@@ -0,0 +1,174 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/remoteproc/mediatek,mt8196-vcp.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: MediaTek Video Companion Processor (VCP)
+
+maintainers:
+ - Xiangzhi Tang <Xiangzhi.Tang@mediatek.com>
+
+description:
+ The MediaTek VCP enables the SoC control the MediaTek Video Companion Risc-V coprocessor.
+
+properties:
+ compatible:
+ enum:
+ - mediatek,mt8196-vcp
+
+ reg:
+ items:
+ - description: sram base
+ - description: cfg group IO
+ - description: cfg core group IO
+ - description: cfg sec group IO
+ - description: vcp rdy group IO
+
+ reg-names:
+ items:
+ - const: sram
+ - const: cfg
+ - const: cfg_core
+ - const: cfg_sec
+ - const: vcp_vlp_ao_rsvd7
+
+ interrupts:
+ maxItems: 1
+
+ mboxes:
+ description:
+ Using mailbox to communicate with VCP, it should have this
+ property and list of phandle, mailbox specifiers. See
+ Documentation/devicetree/bindings/mailbox/mediatek,mt8196-vcp-mbox.yaml
+ for details.
+ $ref: /schemas/types.yaml#/definitions/phandle-array
+
+ mbox-names:
+ maxItems: 5
+
+ power-domains:
+ description:
+ A phandle and PM domain specifier as defined by bindings
+ of the power controller specified by phandle. See
+ Documentation/devicetree/bindings/power/power-domain.yaml for details.
+ maxItems: 1
+
+ iommus:
+ description:
+ Using MediaTek iommu to apply larb ports for Multimedia Memory
+ Management Unit and address translation
+ Documentation/devicetree/bindings/iommu/arm,smmu-v3.yaml
+
+ memory-region:
+ maxItems: 1
+
+ vcp-mem-tbl:
+ description:
+ Manage reserved memory for VCP RTOS FW and various features.
+ $ref: /schemas/types.yaml#/definitions/uint32-array
+ minItems: 2
+ maxItems: 12
+
+patternProperties:
+ "^vcp_[a-f0-9]+$":
+ type: object
+ description:
+ The MediaTek VCP integrated to SoC might be a multi-core version.
+ The other cores are represented as child nodes of the boot core.
+ There are some integration differences for the IP like the usage of
+ address translator for translating SoC bus addresses into address
+ space for the processor.
+
+ The SRAM are shared by all cores, each VCP core only using a piece
+ SRAM memory. The power of SRAM should be enabled before booting VCP cores.
+ The size of SRAM are varied on differnt SoCs.
+
+ The VCP cores has differences on different SoCs to support for
+ Hart.
+
+ properties:
+ compatible:
+ enum:
+ - mediatek,vcp-core
+ - mediatek,mmup-core
+
+ twohart:
+ enum: [0, 1]
+ $ref: /schemas/types.yaml#/definitions/uint32
+
+ sram-offset:
+ description:
+ Allocated SRAM memory for each VCP core used.
+ $ref: /schemas/types.yaml#/definitions/uint32
+
+ required:
+ - compatible
+ - twohart
+ - sram-offset
+
+ additionalProperties: false
+
+required:
+ - compatible
+ - reg
+ - reg-names
+ - interrupts
+ - mboxes
+ - mbox-names
+ - power-domains
+ - iommus
+ - memory-region
+ - vcp-mem-tbl
+
+additionalProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+ #include <dt-bindings/interrupt-controller/irq.h>
+ #include <dt-bindings/power/mt8196-power.h>
+
+ vcp: vcp@31800000 {
+ compatible = "mediatek,mt8196-vcp";
+ reg = <0x31800000 0x60000>,
+ <0x31a04000 0xa000>,
+ <0x31bd0000 0x1000>,
+ <0x31a70020 0x100>,
+ <0x1c00091c 0x4>;
+ reg-names = "sram",
+ "cfg",
+ "cfg_core",
+ "cfg_sec",
+ "vcp_vlp_ao_rsvd7";
+
+ interrupts = <GIC_SPI 787 IRQ_TYPE_LEVEL_HIGH 0>;
+
+ mboxes = <&vcp_mailbox0>,
+ <&vcp_mailbox1>,
+ <&vcp_mailbox2>,
+ <&vcp_mailbox3>,
+ <&vcp_mailbox4>;
+ mbox-names = "mbox0", "mbox1", "mbox2", "mbox3", "mbox4";
+
+ power-domains = <&scpsys MT8196_POWER_DOMAIN_MM_PROC_DORMANT>;
+ iommus = <&mm_smmu 160>;
+ memory-region = <&vcp_resv_mem>;
+ vcp-mem-tbl = <0 0x1a00000>,
+ <1 0x30000>,
+ <2 0x12000>,
+ <3 0x1000>,
+ <4 0x1000>,
+ <5 0x1000>;
+ vcp_0 {
+ compatible = "mediatek,vcp-core";
+ twohart = <1>;
+ sram-offset = <0x0>;
+ };
+
+ vcp_1 {
+ compatible = "mediatek,mmup-core";
+ twohart = <0>;
+ sram-offset = <0x31000>;
+ };
+ };
--
2.45.2
On Wed, 02 Apr 2025 17:19:24 +0800, Xiangzhi Tang wrote:
> Add the new binding document for MediaTek Video Companion
> Processor(VCP) on MediaTek mt8196.
>
> Signed-off-by: Xiangzhi Tang <xiangzhi.tang@mediatek.com>
> ---
> .../remoteproc/mediatek,mt8196-vcp.yaml | 174 ++++++++++++++++++
> 1 file changed, 174 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/remoteproc/mediatek,mt8196-vcp.yaml
>
My bot found errors running 'make dt_binding_check' on your patch:
yamllint warnings/errors:
dtschema/dtc warnings/errors:
Documentation/devicetree/bindings/remoteproc/mediatek,mt8196-vcp.example.dts:26:18: fatal error: dt-bindings/power/mt8196-power.h: No such file or directory
26 | #include <dt-bindings/power/mt8196-power.h>
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
compilation terminated.
make[2]: *** [scripts/Makefile.dtbs:131: Documentation/devicetree/bindings/remoteproc/mediatek,mt8196-vcp.example.dtb] Error 1
make[2]: *** Waiting for unfinished jobs....
make[1]: *** [/builds/robherring/dt-review-ci/linux/Makefile:1522: dt_binding_check] Error 2
make: *** [Makefile:248: __sub-make] Error 2
doc reference errors (make refcheckdocs):
Warning: Documentation/devicetree/bindings/remoteproc/mediatek,mt8196-vcp.yaml references a file that doesn't exist: Documentation/devicetree/bindings/mailbox/mediatek,mt8196-vcp-mbox.yaml
Documentation/devicetree/bindings/remoteproc/mediatek,mt8196-vcp.yaml: Documentation/devicetree/bindings/mailbox/mediatek,mt8196-vcp-mbox.yaml
See https://patchwork.ozlabs.org/project/devicetree-bindings/patch/20250402092134.12293-2-xiangzhi.tang@mediatek.com
The base for the series is generally the latest rc1. A different dependency
should be noted in *this* patch.
If you already ran 'make dt_binding_check' and didn't see the above
error(s), then make sure 'yamllint' is installed and dt-schema is up to
date:
pip3 install dtschema --upgrade
Please check and re-submit after running the above command yourself. Note
that DT_SCHEMA_FILES can be set to your schema file to speed up checking
your schema. However, it must be unset to test all examples with your schema.
On Wed, 2025-04-02 at 07:55 -0500, Rob Herring (Arm) wrote: > External email : Please do not click links or open attachments until > you have verified the sender or the content. > > > On Wed, 02 Apr 2025 17:19:24 +0800, Xiangzhi Tang wrote: > > Add the new binding document for MediaTek Video Companion > > Processor(VCP) on MediaTek mt8196. > > > > Signed-off-by: Xiangzhi Tang <xiangzhi.tang@mediatek.com> > > --- > > .../remoteproc/mediatek,mt8196-vcp.yaml | 174 > > ++++++++++++++++++ > > 1 file changed, 174 insertions(+) > > create mode 100644 > > Documentation/devicetree/bindings/remoteproc/mediatek,mt8196- > > vcp.yaml > > > > My bot found errors running 'make dt_binding_check' on your patch: > > yamllint warnings/errors: > > dtschema/dtc warnings/errors: > Documentation/devicetree/bindings/remoteproc/mediatek,mt8196- > vcp.example.dts:26:18: fatal error: dt-bindings/power/mt8196-power.h: > No such file or directory > 26 | #include <dt-bindings/power/mt8196-power.h> > | ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ > compilation terminated. > make[2]: *** [scripts/Makefile.dtbs:131: > Documentation/devicetree/bindings/remoteproc/mediatek,mt8196- > vcp.example.dtb] Error 1 > make[2]: *** Waiting for unfinished jobs.... > make[1]: *** [/builds/robherring/dt-review-ci/linux/Makefile:1522: > dt_binding_check] Error 2 > make: *** [Makefile:248: __sub-make] Error 2 > > doc reference errors (make refcheckdocs): > Warning: > Documentation/devicetree/bindings/remoteproc/mediatek,mt8196-vcp.yaml > references a file that doesn't exist: > Documentation/devicetree/bindings/mailbox/mediatek,mt8196-vcp- > mbox.yaml > Documentation/devicetree/bindings/remoteproc/mediatek,mt8196- > vcp.yaml: Documentation/devicetree/bindings/mailbox/mediatek,mt8196- > vcp-mbox.yaml > > See > https://patchwork.ozlabs.org/project/devicetree-bindings/patch/20250402092134.12293-2-xiangzhi.tang@mediatek.com > > The base for the series is generally the latest rc1. A different > dependency > should be noted in *this* patch. > > If you already ran 'make dt_binding_check' and didn't see the above > error(s), then make sure 'yamllint' is installed and dt-schema is up > to > date: > > pip3 install dtschema --upgrade > > Please check and re-submit after running the above command yourself. > Note > that DT_SCHEMA_FILES can be set to your schema file to speed up > checking > your schema. However, it must be unset to test all examples with your > schema. > I run test "make dt_binding_check DT_SCHEMA_FILES=Documentation/devicetree/bindings/remoteproc/mediatek,m t8196-vcp.yaml", And, I have to cherry-pick first " https://lore.kernel.org/all/20250307032942.10447-1-guangjie.song@mediatek.com/ " and " https://patchwork.kernel.org/project/linux-mediatek/patch/20250317110331.2776-4-jjian.zhou@mediatek.com/ " >
On 02/04/2025 11:19, Xiangzhi Tang wrote:
> +
> +description:
> + The MediaTek VCP enables the SoC control the MediaTek Video Companion Risc-V coprocessor.
Wrap at coding style.
> +
> +properties:
> + compatible:
> + enum:
> + - mediatek,mt8196-vcp
> +
> + reg:
> + items:
> + - description: sram base
> + - description: cfg group IO
> + - description: cfg core group IO
> + - description: cfg sec group IO
> + - description: vcp rdy group IO
> +
> + reg-names:
> + items:
> + - const: sram
> + - const: cfg
> + - const: cfg_core
> + - const: cfg_sec
> + - const: vcp_vlp_ao_rsvd7
> +
> + interrupts:
> + maxItems: 1
> +
> + mboxes:
> + description:
> + Using mailbox to communicate with VCP, it should have this
> + property and list of phandle, mailbox specifiers. See
> + Documentation/devicetree/bindings/mailbox/mediatek,mt8196-vcp-mbox.yaml
> + for details.
Drop entire description, redundant.
> + $ref: /schemas/types.yaml#/definitions/phandle-array
> +
No, you do not get your own type. Instead list items or just maxItems.
> + mbox-names:
> + maxItems: 5
No, you must list the items.
> +
> + power-domains:
> + description:
> + A phandle and PM domain specifier as defined by bindings
> + of the power controller specified by phandle. See
> + Documentation/devicetree/bindings/power/power-domain.yaml for details.
Look how other bindings do it. Do not repeat obvious stuff, do not
develop bindings entirely different than all others.
> + maxItems: 1
> +
> + iommus:
> + description:
> + Using MediaTek iommu to apply larb ports for Multimedia Memory
> + Management Unit and address translation
> + Documentation/devicetree/bindings/iommu/arm,smmu-v3.yaml
Really, look at other code first.
> +
> + memory-region:
> + maxItems: 1
> +
> + vcp-mem-tbl:
> + description:
> + Manage reserved memory for VCP RTOS FW and various features.
No, reserved memory is in memory-region. Drop property.
> + $ref: /schemas/types.yaml#/definitions/uint32-array
> + minItems: 2
> + maxItems: 12
> +
> +patternProperties:
> + "^vcp_[a-f0-9]+$":
Follow DTS coding style.
Heh, nothing here was really tested and you have obvious bugs pointed
out by simple testing of DTS.
Why these children are needed in the first place? Offsets are implied by
parent compatible.
> + type: object
> + description:
> + The MediaTek VCP integrated to SoC might be a multi-core version.
> + The other cores are represented as child nodes of the boot core.
> + There are some integration differences for the IP like the usage of
> + address translator for translating SoC bus addresses into address
> + space for the processor.
> +
> + The SRAM are shared by all cores, each VCP core only using a piece
> + SRAM memory. The power of SRAM should be enabled before booting VCP cores.
> + The size of SRAM are varied on differnt SoCs.
> +
> + The VCP cores has differences on different SoCs to support for
> + Hart.
> +
> + properties:
> + compatible:
> + enum:
> + - mediatek,vcp-core
> + - mediatek,mmup-core
> +
> + twohart:
Missing vendor prefix, look at writing bindings and other examples.
> + enum: [0, 1]
> + $ref: /schemas/types.yaml#/definitions/uint32
> +
> + sram-offset:
> + description:
> + Allocated SRAM memory for each VCP core used.
> + $ref: /schemas/types.yaml#/definitions/uint32
> +
> + required:
> + - compatible
> + - twohart
> + - sram-offset
> +
> + additionalProperties: false
> +
> +required:
> + - compatible
> + - reg
> + - reg-names
> + - interrupts
> + - mboxes
> + - mbox-names
> + - power-domains
> + - iommus
> + - memory-region
> + - vcp-mem-tbl
> +
> +additionalProperties: false
> +
> +examples:
> + - |
> + #include <dt-bindings/interrupt-controller/arm-gic.h>
> + #include <dt-bindings/interrupt-controller/irq.h>
> + #include <dt-bindings/power/mt8196-power.h>
> +
> + vcp: vcp@31800000 {
> + compatible = "mediatek,mt8196-vcp";
> + reg = <0x31800000 0x60000>,
> + <0x31a04000 0xa000>,
> + <0x31bd0000 0x1000>,
> + <0x31a70020 0x100>,
> + <0x1c00091c 0x4>;
Quite different address, are you sure this is still part of this
device? Looks like on register.
Best regards,
Krzysztof
On Wed, 2025-04-02 at 13:11 +0200, Krzysztof Kozlowski wrote:
> External email : Please do not click links or open attachments until
> you have verified the sender or the content.
>
>
> On 02/04/2025 11:19, Xiangzhi Tang wrote:
> > +
> > +description:
> > + The MediaTek VCP enables the SoC control the MediaTek Video
> > Companion Risc-V coprocessor.
>
> Wrap at coding style.
> Thanks comment, I will fix it on v1 version.
>
> > +
> > +properties:
> > + compatible:
> > + enum:
> > + - mediatek,mt8196-vcp
> > +
> > + reg:
> > + items:
> > + - description: sram base
> > + - description: cfg group IO
> > + - description: cfg core group IO
> > + - description: cfg sec group IO
> > + - description: vcp rdy group IO
> > +
> > + reg-names:
> > + items:
> > + - const: sram
> > + - const: cfg
> > + - const: cfg_core
> > + - const: cfg_sec
> > + - const: vcp_vlp_ao_rsvd7
> > +
> > + interrupts:
> > + maxItems: 1
> > +
> > + mboxes:
> > + description:
> > + Using mailbox to communicate with VCP, it should have this
> > + property and list of phandle, mailbox specifiers. See
> > + Documentation/devicetree/bindings/mailbox/mediatek,mt8196-
> > vcp-mbox.yaml
> > + for details.
>
> Drop entire description, redundant.
> Thanks comment, I will fix it on v1 version.
>
> > + $ref: /schemas/types.yaml#/definitions/phandle-array
> > +
>
> No, you do not get your own type. Instead list items or just
> maxItems.
> Thanks comment, I will fix it on v1 version.
>
>
> > + mbox-names:
> > + maxItems: 5
>
> No, you must list the items.
> Thanks comment, I will fix it on v1 version.
>
> > +
> > + power-domains:
> > + description:
> > + A phandle and PM domain specifier as defined by bindings
> > + of the power controller specified by phandle. See
> > + Documentation/devicetree/bindings/power/power-domain.yaml
> > for details.
>
> Look how other bindings do it. Do not repeat obvious stuff, do not
> develop bindings entirely different than all others.
> Thanks comment, I will update it on v1 version.
>
> > + maxItems: 1
> > +
> > + iommus:
> > + description:
> > + Using MediaTek iommu to apply larb ports for Multimedia
> > Memory
> > + Management Unit and address translation
> > + Documentation/devicetree/bindings/iommu/arm,smmu-v3.yaml
>
> Really, look at other code first.
> Yes, phandle reference iommu node
>
> > +
> > + memory-region:
> > + maxItems: 1
> > +
> > + vcp-mem-tbl:
> > + description:
> > + Manage reserved memory for VCP RTOS FW and various features.
>
> No, reserved memory is in memory-region. Drop property.
> Thanks comment, I will fix it on v1 version.
>
> > + $ref: /schemas/types.yaml#/definitions/uint32-array
> > + minItems: 2
> > + maxItems: 12
> > +
> > +patternProperties:
> > + "^vcp_[a-f0-9]+$":
>
> Follow DTS coding style.
>
> Heh, nothing here was really tested and you have obvious bugs pointed
> out by simple testing of DTS.
> I run test "make dt_binding_check
DT_SCHEMA_FILES=Documentation/devicetree/bindings/remoteproc/mediatek,m
t8196-vcp.yaml", And, I have to cherry-pick first "
https://lore.kernel.org/all/20250307032942.10447-1-guangjie.song@mediatek.com/
" and "
https://patchwork.kernel.org/project/linux-mediatek/patch/20250317110331.2776-4-jjian.zhou@mediatek.com/
"
>
> Why these children are needed in the first place? Offsets are implied
> by
> parent compatible.
> Thanks comment, I will check it dtb style again.
>
> > + type: object
> > + description:
> > + The MediaTek VCP integrated to SoC might be a multi-core
> > version.
> > + The other cores are represented as child nodes of the boot
> > core.
> > + There are some integration differences for the IP like the
> > usage of
> > + address translator for translating SoC bus addresses into
> > address
> > + space for the processor.
> > +
> > + The SRAM are shared by all cores, each VCP core only using a
> > piece
> > + SRAM memory. The power of SRAM should be enabled before
> > booting VCP cores.
> > + The size of SRAM are varied on differnt SoCs.
> > +
> > + The VCP cores has differences on different SoCs to support
> > for
> > + Hart.
> > +
> > + properties:
> > + compatible:
> > + enum:
> > + - mediatek,vcp-core
> > + - mediatek,mmup-core
> > +
> > + twohart:
>
> Missing vendor prefix, look at writing bindings and other examples.
> Thanks comment, I will check it dtb style again.
>
> > + enum: [0, 1]
> > + $ref: /schemas/types.yaml#/definitions/uint32
> > +
> > + sram-offset:
> > + description:
> > + Allocated SRAM memory for each VCP core used.
> > + $ref: /schemas/types.yaml#/definitions/uint32
> > +
> > + required:
> > + - compatible
> > + - twohart
> > + - sram-offset
> > +
> > + additionalProperties: false
> > +
> > +required:
> > + - compatible
> > + - reg
> > + - reg-names
> > + - interrupts
> > + - mboxes
> > + - mbox-names
> > + - power-domains
> > + - iommus
> > + - memory-region
> > + - vcp-mem-tbl
> > +
> > +additionalProperties: false
> > +
> > +examples:
> > + - |
> > + #include <dt-bindings/interrupt-controller/arm-gic.h>
> > + #include <dt-bindings/interrupt-controller/irq.h>
> > + #include <dt-bindings/power/mt8196-power.h>
> > +
> > + vcp: vcp@31800000 {
> > + compatible = "mediatek,mt8196-vcp";
> > + reg = <0x31800000 0x60000>,
> > + <0x31a04000 0xa000>,
> > + <0x31bd0000 0x1000>,
> > + <0x31a70020 0x100>,
> > + <0x1c00091c 0x4>;
>
> Quite different address, are you sure this is still part of this
> device? Looks like on register.
> Yes, It is necessary register for this device
>
>
> Best regards,
> Krzyszto
On 06/04/2025 08:46, Xiangzhi Tang (唐相志) wrote: > On Wed, 2025-04-02 at 13:11 +0200, Krzysztof Kozlowski wrote: >> External email : Please do not click links or open attachments until >> you have verified the sender or the content. >> >> >> On 02/04/2025 11:19, Xiangzhi Tang wrote: >>> + >>> +description: >>> + The MediaTek VCP enables the SoC control the MediaTek Video >>> Companion Risc-V coprocessor. >> >> Wrap at coding style. >> Thanks comment, I will fix it on v1 version. >> Please kindly trim the replies from unnecessary context. It makes it much easier to find new content. Anyway, not sure what you are referring to, but this was not fully tested and I still expect all my comments to be addressed. Best regards, Krzysztof
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