From: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com>
Add documentation for IMX AIPSTZ bridge.
Co-developed-by: Daniel Baluta <daniel.baluta@nxp.com>
Signed-off-by: Daniel Baluta <daniel.baluta@nxp.com>
Signed-off-by: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com>
---
.../bindings/bus/fsl,imx8mp-aipstz.yaml | 104 ++++++++++++++++++
include/dt-bindings/bus/imx-aipstz.h | 25 +++++
2 files changed, 129 insertions(+)
create mode 100644 Documentation/devicetree/bindings/bus/fsl,imx8mp-aipstz.yaml
create mode 100644 include/dt-bindings/bus/imx-aipstz.h
diff --git a/Documentation/devicetree/bindings/bus/fsl,imx8mp-aipstz.yaml b/Documentation/devicetree/bindings/bus/fsl,imx8mp-aipstz.yaml
new file mode 100644
index 000000000000..13b7fb39d6ac
--- /dev/null
+++ b/Documentation/devicetree/bindings/bus/fsl,imx8mp-aipstz.yaml
@@ -0,0 +1,104 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/bus/fsl,imx8mp-aipstz.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Secure AHB to IP Slave bus (AIPSTZ) bridge
+
+description:
+ The secure AIPS bridge (AIPSTZ) acts as a bridge for AHB masters issuing
+ transactions to IP Slave peripherals. Additionally, this module offers access
+ control configurations meant to restrict which peripherals a master can
+ access.
+
+maintainers:
+ - Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com>
+
+properties:
+ compatible:
+ const: fsl,imx8mp-aipstz
+
+ reg:
+ maxItems: 1
+
+ power-domains:
+ maxItems: 1
+
+ "#address-cells":
+ const: 1
+
+ "#size-cells":
+ const: 1
+
+ "#access-controller-cells":
+ const: 3
+ description:
+ The first cell consists of the consumer type (master or peripheral).
+ The second cell consists of the consumer ID.
+ The third cell consists of the configuration value.
+
+ ranges: true
+
+# borrowed from simple-bus.yaml, no additional requirements for children
+patternProperties:
+ "@(0|[1-9a-f][0-9a-f]*)$":
+ type: object
+ additionalProperties: true
+ properties:
+ reg:
+ items:
+ minItems: 2
+ maxItems: 4
+ minItems: 1
+ maxItems: 1024
+ ranges:
+ oneOf:
+ - items:
+ minItems: 3
+ maxItems: 7
+ minItems: 1
+ maxItems: 1024
+ - $ref: /schemas/types.yaml#/definitions/flag
+ anyOf:
+ - required:
+ - reg
+ - required:
+ - ranges
+
+required:
+ - compatible
+ - reg
+ - power-domains
+ - "#address-cells"
+ - "#size-cells"
+ - "#access-controller-cells"
+ - ranges
+
+additionalProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/clock/imx8mp-clock.h>
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+
+ bus@30df0000 {
+ compatible = "fsl,imx8mp-aipstz";
+ reg = <0x30df0000 0x10000>;
+ power-domains = <&pgc_audio>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ #access-controller-cells = <3>;
+ ranges = <0x30c00000 0x30c00000 0x400000>;
+
+ dma-controller@30e00000 {
+ compatible = "fsl,imx8mp-sdma", "fsl,imx8mq-sdma";
+ reg = <0x30e00000 0x10000>;
+ #dma-cells = <3>;
+ clocks = <&audio_blk_ctrl IMX8MP_CLK_AUDIOMIX_SDMA3_ROOT>,
+ <&clk IMX8MP_CLK_AUDIO_ROOT>;
+ clock-names = "ipg", "ahb";
+ interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
+ fsl,sdma-ram-script-name = "imx/sdma/sdma-imx7d.bin";
+ };
+ };
diff --git a/include/dt-bindings/bus/imx-aipstz.h b/include/dt-bindings/bus/imx-aipstz.h
new file mode 100644
index 000000000000..b81b4654e00f
--- /dev/null
+++ b/include/dt-bindings/bus/imx-aipstz.h
@@ -0,0 +1,25 @@
+/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
+/*
+ * Copyright 2025 NXP
+ */
+
+#ifndef _DT_BINDINGS_BUS_IMX_AIPSTZ_H
+#define _DT_BINDINGS_BUS_IMX_AIPSTZ_H
+
+/* consumer type - master or peripheral */
+#define IMX_AIPSTZ_MASTER 0x0
+#define IMX_AIPSTZ_PERIPH 0x1
+
+/* master configuration options */
+#define IMX_AIPSTZ_MPL 0x1
+#define IMX_AIPSTZ_MTW 0x2
+#define IMX_AIPSTZ_MTR 0x4
+#define IMX_AIPSTZ_MBW 0x8
+
+/* peripheral configuration options */
+#define IMX_AIPSTZ_TP 0x1
+#define IMX_AIPSTZ_WP 0x2
+#define IMX_AIPSTZ_SP 0x4
+#define IMX_AIPSTZ_BW 0x8
+
+#endif /* _DT_BINDINGS_BUS_IMX_AIPSTZ_H */
--
2.34.1
On Tue, Apr 01, 2025 at 11:43:59AM -0400, Laurentiu Mihalcea wrote: > +examples: > + - | > + #include <dt-bindings/clock/imx8mp-clock.h> > + #include <dt-bindings/interrupt-controller/arm-gic.h> > + > + bus@30df0000 { > + compatible = "fsl,imx8mp-aipstz"; > + reg = <0x30df0000 0x10000>; > + power-domains = <&pgc_audio>; > + #address-cells = <1>; > + #size-cells = <1>; > + #access-controller-cells = <3>; > + ranges = <0x30c00000 0x30c00000 0x400000>; > + > + dma-controller@30e00000 { > + compatible = "fsl,imx8mp-sdma", "fsl,imx8mq-sdma"; > + reg = <0x30e00000 0x10000>; > + #dma-cells = <3>; > + clocks = <&audio_blk_ctrl IMX8MP_CLK_AUDIOMIX_SDMA3_ROOT>, > + <&clk IMX8MP_CLK_AUDIO_ROOT>; > + clock-names = "ipg", "ahb"; > + interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>; > + fsl,sdma-ram-script-name = "imx/sdma/sdma-imx7d.bin"; > + }; > + }; > diff --git a/include/dt-bindings/bus/imx-aipstz.h b/include/dt-bindings/bus/imx-aipstz.h > new file mode 100644 > index 000000000000..b81b4654e00f > --- /dev/null > +++ b/include/dt-bindings/bus/imx-aipstz.h Filename matching compatible, if this stays. But more important, I do not see this being used - neither here in example nor in the driver, so not a binding. > @@ -0,0 +1,25 @@ > +/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */ > +/* > + * Copyright 2025 NXP > + */ > + > +#ifndef _DT_BINDINGS_BUS_IMX_AIPSTZ_H > +#define _DT_BINDINGS_BUS_IMX_AIPSTZ_H > + > +/* consumer type - master or peripheral */ > +#define IMX_AIPSTZ_MASTER 0x0 > +#define IMX_AIPSTZ_PERIPH 0x1 > + > +/* master configuration options */ > +#define IMX_AIPSTZ_MPL 0x1 > +#define IMX_AIPSTZ_MTW 0x2 > +#define IMX_AIPSTZ_MTR 0x4 > +#define IMX_AIPSTZ_MBW 0x8 IDs are not hex values. What do you exactly represent here? Best regards, Krzysztof
On Tue, Apr 01, 2025 at 11:43:59AM -0400, Laurentiu Mihalcea wrote: > From: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com> Subject suggest "dt-bindings: bus: add i.MX AIPSTZ bridge support" because dt-binding already indicate it is document. > > Add documentation for IMX AIPSTZ bridge. > > Co-developed-by: Daniel Baluta <daniel.baluta@nxp.com> > Signed-off-by: Daniel Baluta <daniel.baluta@nxp.com> > Signed-off-by: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com> > --- > .../bindings/bus/fsl,imx8mp-aipstz.yaml | 104 ++++++++++++++++++ > include/dt-bindings/bus/imx-aipstz.h | 25 +++++ > 2 files changed, 129 insertions(+) > create mode 100644 Documentation/devicetree/bindings/bus/fsl,imx8mp-aipstz.yaml > create mode 100644 include/dt-bindings/bus/imx-aipstz.h > > diff --git a/Documentation/devicetree/bindings/bus/fsl,imx8mp-aipstz.yaml b/Documentation/devicetree/bindings/bus/fsl,imx8mp-aipstz.yaml > new file mode 100644 > index 000000000000..13b7fb39d6ac > --- /dev/null > +++ b/Documentation/devicetree/bindings/bus/fsl,imx8mp-aipstz.yaml > @@ -0,0 +1,104 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/bus/fsl,imx8mp-aipstz.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Secure AHB to IP Slave bus (AIPSTZ) bridge > + > +description: > + The secure AIPS bridge (AIPSTZ) acts as a bridge for AHB masters issuing > + transactions to IP Slave peripherals. Additionally, this module offers access > + control configurations meant to restrict which peripherals a master can > + access. > + > +maintainers: > + - Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com> > + > +properties: > + compatible: > + const: fsl,imx8mp-aipstz > + > + reg: > + maxItems: 1 > + > + power-domains: > + maxItems: 1 > + > + "#address-cells": > + const: 1 > + > + "#size-cells": > + const: 1 > + > + "#access-controller-cells": > + const: 3 > + description: > + The first cell consists of the consumer type (master or peripheral). > + The second cell consists of the consumer ID. > + The third cell consists of the configuration value. items: - description: the consumer type (master or peripheral). - description: the consumer ID - description: the configuration value. > + > + ranges: true > + > +# borrowed from simple-bus.yaml, no additional requirements for children > +patternProperties: > + "@(0|[1-9a-f][0-9a-f]*)$": > + type: object > + additionalProperties: true > + properties: > + reg: > + items: > + minItems: 2 > + maxItems: 4 > + minItems: 1 > + maxItems: 1024 > + ranges: > + oneOf: > + - items: > + minItems: 3 > + maxItems: 7 > + minItems: 1 > + maxItems: 1024 > + - $ref: /schemas/types.yaml#/definitions/flag > + anyOf: > + - required: > + - reg > + - required: > + - ranges > + > +required: > + - compatible > + - reg > + - power-domains > + - "#address-cells" > + - "#size-cells" > + - "#access-controller-cells" > + - ranges > + > +additionalProperties: false > + > +examples: > + - | > + #include <dt-bindings/clock/imx8mp-clock.h> > + #include <dt-bindings/interrupt-controller/arm-gic.h> > + > + bus@30df0000 { > + compatible = "fsl,imx8mp-aipstz"; > + reg = <0x30df0000 0x10000>; > + power-domains = <&pgc_audio>; > + #address-cells = <1>; > + #size-cells = <1>; > + #access-controller-cells = <3>; > + ranges = <0x30c00000 0x30c00000 0x400000>; generally, ranges just after reg > + > + dma-controller@30e00000 { > + compatible = "fsl,imx8mp-sdma", "fsl,imx8mq-sdma"; > + reg = <0x30e00000 0x10000>; > + #dma-cells = <3>; > + clocks = <&audio_blk_ctrl IMX8MP_CLK_AUDIOMIX_SDMA3_ROOT>, > + <&clk IMX8MP_CLK_AUDIO_ROOT>; > + clock-names = "ipg", "ahb"; > + interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>; Does it need access-controllers here? Frank > + fsl,sdma-ram-script-name = "imx/sdma/sdma-imx7d.bin"; > + }; > + }; > diff --git a/include/dt-bindings/bus/imx-aipstz.h b/include/dt-bindings/bus/imx-aipstz.h > new file mode 100644 > index 000000000000..b81b4654e00f > --- /dev/null > +++ b/include/dt-bindings/bus/imx-aipstz.h > @@ -0,0 +1,25 @@ > +/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */ > +/* > + * Copyright 2025 NXP > + */ > + > +#ifndef _DT_BINDINGS_BUS_IMX_AIPSTZ_H > +#define _DT_BINDINGS_BUS_IMX_AIPSTZ_H > + > +/* consumer type - master or peripheral */ > +#define IMX_AIPSTZ_MASTER 0x0 > +#define IMX_AIPSTZ_PERIPH 0x1 > + > +/* master configuration options */ > +#define IMX_AIPSTZ_MPL 0x1 > +#define IMX_AIPSTZ_MTW 0x2 > +#define IMX_AIPSTZ_MTR 0x4 > +#define IMX_AIPSTZ_MBW 0x8 > + > +/* peripheral configuration options */ > +#define IMX_AIPSTZ_TP 0x1 > +#define IMX_AIPSTZ_WP 0x2 > +#define IMX_AIPSTZ_SP 0x4 > +#define IMX_AIPSTZ_BW 0x8 > + > +#endif /* _DT_BINDINGS_BUS_IMX_AIPSTZ_H */ > -- > 2.34.1 >
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