[PATCH 0/6] clk: renesas: rzv2h: Add clock and reset entries for USB2 and GBETH

Prabhakar posted 6 patches 8 months, 3 weeks ago
There is a newer version of this series
drivers/clk/renesas/r9a09g057-cpg.c           | 92 ++++++++++++++++++-
drivers/clk/renesas/rzv2h-cpg.c               | 36 +++++++-
drivers/clk/renesas/rzv2h-cpg.h               | 39 +++++++-
.../dt-bindings/clock/renesas,r9a09g057-cpg.h |  4 +
4 files changed, 162 insertions(+), 9 deletions(-)
[PATCH 0/6] clk: renesas: rzv2h: Add clock and reset entries for USB2 and GBETH
Posted by Prabhakar 8 months, 3 weeks ago
From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>

Hi All,

This patch series adds clock and reset entries for USB2 and GBETH in the
R9A09G057 SoC. Support for ignoring the monitoring of CLK_MON bits for
external clocks is also added and the logic to ensure that module clock
is ON now checks both CLK_ON and CLK_MON bits. Also the core clocks for
USB2 and GBETH are added in the device tree bindings.

Note, these patch apply on top of the following patch series:
https://lore.kernel.org/all/20250228202655.491035-1-prabhakar.mahadev-lad.rj@bp.renesas.com/

Cheers,
Prabhakar

Lad Prabhakar (6):
  clk: renesas: rzv2h-cpg: Use str_on_off() helper in
    rzv2h_mod_clock_endisable()
  clk: renesas: rzv2h-cpg: Use both CLK_ON and CLK_MON bits for clock
    state validation
  clk: renesas: rzv2h-cpg: Ignore monitoring CLK_MON bits for external
    clocks
  dt-bindings: clock: renesas,r9a09g057-cpg: Add USB2 PHY and GBETH PTP
    core clocks
  clk: renesas: r9a09g057: Add clock and reset entries for USB2
  clk: renesas: r9a09g057: Add clock and reset entries for GBETH0/1

 drivers/clk/renesas/r9a09g057-cpg.c           | 92 ++++++++++++++++++-
 drivers/clk/renesas/rzv2h-cpg.c               | 36 +++++++-
 drivers/clk/renesas/rzv2h-cpg.h               | 39 +++++++-
 .../dt-bindings/clock/renesas,r9a09g057-cpg.h |  4 +
 4 files changed, 162 insertions(+), 9 deletions(-)

-- 
2.49.0
Re: [PATCH 0/6] clk: renesas: rzv2h: Add clock and reset entries for USB2 and GBETH
Posted by Geert Uytterhoeven 8 months, 2 weeks ago
Hi Prabhakar (and Biju),

On Fri, 28 Mar 2025 at 21:01, Prabhakar <prabhakar.csengg@gmail.com> wrote:
> Note, these patch apply on top of the following patch series:
> https://lore.kernel.org/all/20250228202655.491035-1-prabhakar.mahadev-lad.rj@bp.renesas.com/

That patch series was ultimately ignored because it was not clear how
it related to other similar patches for the same driver.  So please
coordinate and resend, based on renesas-clk-for-v6.16, or even better,
v6.15-rc1 next week.

I may still review some clock patches (the ones that do not depend
on pending new constructs) in this series this week, if time permits,
but I won't apply them.

Thanks!

Gr{oetje,eeting}s,

                        Geert

-- 
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds